Patent Application
20160189954
The present invention relates to semiconductor fabrication techniques and, more particularly, to methods of forming semiconductor layers on a growth substrate.
Semiconductor devices are typically fabricated using so-called epitaxial growth techniques, whereby thin semiconductor “epitaxial” layers are formed on an underlying crystalline substrate. The crystalline substrate may comprise, for example, a semiconductor substrate (e.g., a silicon substrate), a non-semiconductor substrate such as, for example, a glass or sapphire substrate, or a combination of the two (e.g., a silicon-on-insulator substrate). Typically, the crystalline substrate is substantially thicker than the epitaxial layers that are grown thereon. The epitaxial layers may be grown on the substrate using, for example, vapor-phase, liquid-phase or solid-phase epitaxy techniques. Many commercial semiconductor fabrication operations use vapor-phase epitaxial growth techniques.
Vapor-phase semiconductor epitaxial growth processes are high temperature growth processes in which the semiconductor epitaxial layers are grown on the crystalline substrate in a high temperature growth reactor. The crystalline substrate is placed in the reactor and the reactor is heated to a high temperature (e.g., greater than 500° C.). Source gases (e.g., ammonia, tri-methyl gallium, etc.) that include the constituent elements of the epitaxial layers that are to be grown (e.g., gallium, nitrogen, etc.) are allowed to flow into the reactor and are broken down into their constituent elements at high temperatures. The constituent elements may reform into crystalline structures on an exposed upper surface of a crystalline growth substrate that is mounted in the growth reactor. For example, gallium atoms from a tri-methyl gallium source gas and nitrogen atoms from an ammonia source gas may deposit onto a sapphire substrate to grow a gallium nitride layer on the sapphire substrate. Non-semiconductor layers, such as metal layers, insulating layers (e.g., silicon oxide, silicon nitride, etc.) and the like may also be deposited on the substrate either in the growth reactor or during subsequent processing.
Pursuant to embodiments of the present invention, methods of fabricating semiconductor devices are provided in which a growth substrate is provided that has a thickness within a preselected range. A lower surface of the growth substrate is bonded to an upper surface of the carrier substrate to form a composite substrate. A semiconductor growth process is performed at a growth temperature of at least 500° C. to form a semiconductor layer on an upper surface of the growth substrate. The growth substrate may be separated from the carrier substrate after the one or more semiconductor growth processes are completed.
In some embodiments, after the above describe method is performed a second growth substrate may be provided that has a thickness within a preselected range. A lower surface of the second growth substrate may be bonded to the upper surface of the carrier substrate to provide a second composite substrate. A second semiconductor growth process may then be performed on the second composite substrate at a temperature of at least 500° C. to form a second semiconductor layer on an upper surface of the second growth substrate. The second growth substrate may be separated from the carrier substrate after the semiconductor growth process is completed.
In some embodiments, the upper surface of the carrier substrate may be patterned prior to bonding the lower surface of the growth substrate to the carrier substrate. In such embodiments, the upper surface of the carrier substrate may be patterned to have a recessed upper surface, and a plurality of protrusions may extend upwardly from the recessed upper surface, and a plurality of recessed regions may be provided between the protrusions. The upper surfaces of the protrusions may define a bonding surface that contacts the lower surface of the growth substrate when the lower surface of the growth substrate is bonded to the upper surface of the carrier substrate, and this bonding surface may have a surface area that is less than 50% of the surface area of the lower surface of the growth substrate. recessed regions may define a non-contact region where the carrier substrate does not contact the lower surface of the growth substrate, and in a central region of the upper surface of the carrier substrate the ratio of the surface area of the bonding surface to the surface area of the non-contact region is less than the ratio of the surface area of the bonding surface to the surface area of the non-contact region in a peripheral region of the upper surface of the carrier substrate that surrounds the central region.
In some embodiments, a thickness of the first growth substrate may be selected based on a desired substrate thickness for the semiconductor device. The growth substrate may be diced after it is separated from the carrier substrate without any thinning of the growth substrate.
In some embodiments, the first growth substrate may be a first silicon carbide growth substrate and the carrier substrate may be a silicon carbide carrier substrate. In such embodiments, the first silicon carbide growth substrate may be bonded to the upper surface of the silicon carbide carrier substrate using at least one of carbon, silicon oxide, and/or silicon. In other embodiments, the first growth substrate may be a first sapphire growth substrate and the carrier substrate may be a sapphire carrier substrate or an alumina carrier substrate.
In some embodiments, a thickness of the carrier substrate may be at least three times a thickness of the first growth substrate and at least three times a thickness of the second growth substrate. The semiconductor growth process may be an epitaxial growth process, and at the epitaxial layer may have a different coefficient of thermal expansion than does the growth substrate.
Pursuant to further embodiments of the present invention, methods of fabricating semiconductor devices are provided in which a plurality of semiconductor layers are epitaxially grown on a composite substrate that includes a growth substrate having a lower surface that is bonded to an upper surface of a carrier substrate. The upper surface of the carrier substrate includes recesses therein that define voids at the interface between the carrier substrate and the growth substrate. The growth substrate is separated from the carrier substrate by filling the voids with a fluid that is subsequently used to generate an expanding force that separates the growth substrate from the carrier substrate. The expanding force may comprise, for example, a force due to hydraulic pressure and/or a force resulting from a phase change from a liquid fluid to a gaseous fluid.
In some embodiments, the fluid may be a fluid that is inserted into the voids as a liquid and the expanding force may be generated by changing the phase of the liquid to create increased pressure. For example, liquid water may be converted to a gas phase (steam) or to a solid phase (ice) to create the increased pressure. The water may be inserted into the voids, for example, by submerging the composite substrate in water.
Pursuant to still further embodiments of the present invention, composite substrates are provided that include a first substrate that has a first major surface that is patterned to include at least one protrusion that extends away from the first major surface and a second major surface that is opposite the first major surface. These composite substrates also have a second substrate that has first and second opposed major surfaces, and the second major surface of the second substrate is mated with the first major surface of the first substrate. A plurality of semiconductor epitaxial layers are formed on either the second major surface of the first substrate or the first major surface of the second substrate. A distal end of the at least one protrusion is joined to the second major surface of the second substrate.
In some embodiments, the first substrate may be a carrier substrate and the second substrate may be a growth substrate. In other embodiments, the first substrate may be a growth substrate and the second substrate may be a carrier substrate. The composite substrate may also include one or more bonding materials that are disposed between the first substrate and the second substrate that bond the first substrate to the second substrate. The at least one protrusion may be a plurality of protrusions which each have a distal end having a flat surface that is parallel to the second major surface of the first substrate, where the distal end of each protrusion may be bonded to the second major surface of the second substrate.
In some embodiments, a combined surface area of the flat surfaces of the plurality of protrusions may be less than 50% of the surface area of the second major surface of the first substrate. The second substrate may have a diameter that exceeds a thickness of the second substrate by at least a factor of 500. The first substrate may have a thickness that exceeds a thickness of the second substrate by at least a factor of two. A first of the semiconductor epitaxial layers may have a coefficient of thermal expansion that is the same as the coefficient of thermal expansion of the substrate or may have a coefficient of thermal expansion that differs from a coefficient of thermal expansion of the second substrate by, for example, a factor of as much as six (or even higher in some cases).
b are schematic side-view diagrams illustrating a method of separating a growth substrate from a carrier substrate according to still further embodiments of the present invention.
As the diameter of the substrates (e.g., wafers) that are used in semiconductor epitaxial growth processes increases, there may be an increased tendency for the substrate to warp (i.e., bow, bend or otherwise deform) during the high temperature semiconductor growth processes and/or the cool down therefrom. This tendency is particularly strong in situations where the substrate comprises a first material and the epitaxial layers comprise one or more second materials that have different thermal properties (e.g., different coefficients of thermal expansion) than the first material, as the differences in the thermal properties of the materials may generate stress in at least one of the two materials.
By way of example, a thin semiconductor layer having a first thermal expansion coefficient may be grown at high temperature on a thick substrate that has a second thermal expansion coefficient that is greater than the first thermal expansion coefficient. When the substrate with the epitaxial layer grown thereon is cooled, both the substrate and the epitaxial layer will tend to shrink in size, but the substrate will “want” to shrink more than the epitaxial layer because it has a higher coefficient of thermal expansion. If the epitaxial layer is strongly adhered to the substrate, as is typically the case, then both the substrate and the epitaxial layer must maintain the same lateral size. Since the substrate typically is far thicker than the epitaxial layer, the epitaxial layer is forced to shrink more during cooling than it would were it not on the substrate. As this occurs, a significant strain can be produced in the epitaxial layer and/or the substrate.
If the strain that builds up in the epitaxial layer is too great, then a number of things can happen. In some cases, where adhesion between the two materials is very good, the epitaxial layer may buckle and/or crack in order to relieve the strain. In other cases where the adhesion between the materials is not as strong, the epitaxial layer may partially detach from the substrate to relieve the strain. In still other cases, the strain may warp the underlying substrate if the underlying substrate is not sufficiently thick to resist such warpage.
In many semiconductor growth systems, the substrate may be the same material as the epitaxial layers that are grown at high temperature on the substrate in the growth reactor. However, this is not always the case. For example, many Group III-nitride semiconductor materials such as gallium nitride-based semiconductor materials are typically grown via vapor-phase epitaxy techniques on either silicon carbide or sapphire (Al2O3) substrates. The coefficients of thermal expansion for gallium nitride and silicon carbide are not well-matched, and the coefficients of thermal expansion for gallium nitride and sapphire are even farther apart. Accordingly, if the growth substrate is too thin, then the strain that builds up in the gallium nitride-based layer due to the tendency of the epitaxial layer and the growth substrate to shrink by different amounts during cooling may be sufficient to warp the underlying substrate. Such warpage may cause substantial processing difficulties such as, for example, difficulties in achieving uniform epitaxial growth across a substrate, which may be very important for achieving high production yields. To reduce the amount of warpage that occurs, complicated changes may be made to the growth apparatus, such as designing substrate carriers to conform to the warping of the substrate and/or forming the growth substrate may be formed to an increased thickness to reduce the warpage by confining most of the strain in the epitaxially grown layers.
Unfortunately, a number of commonly-used semiconductor growth substrates such as sapphire and silicon carbide may be relatively expensive, as are various other growth substrate materials such as, for example, aluminum nitride, gallium nitride and diamond substrates. If these growth substrates must be made thick to reduce warping during cool-down, then this results in a corresponding increase in material costs, as all else being equal, thicker growth substrates are generally more expensive than thin substrates. Worse yet, in many applications, the substrate of the finished semiconductor device may need to be quite thin in order to, for example, reduce the size of the finished chip. In such applications, it is often necessary to perform backend substrate thinning operations where all or part of the growth substrate is removed via, for example, a grinding operation. Such thinning operations are often labor-intensive, require expensive consumable materials (e.g., a diamond slurry, grinding wheels) and capital equipment such as lapping or grinding tools and hence can be expensive to perform. Thus, the use of thicker growth substrates also increases production costs.
As an example, typical thicknesses for 2″, 100 mm (about 4″) and 150 mm (about 6″) sapphire substrates that are used as growth substrates for gallium nitride based semiconductor devices are 0.43 mm, 0.65 mm and 1.3 mm, respectively. A typical thickness for the end semiconductor device, however, may only be about 0.15 mm in many applications. Thus, approximately 65-85% of the growth substrate may be removed by back-end substrate thinning operations. Moreover, as larger diameter substrates are used (which in general can reduce production costs), the warping problem increases (requiring even thicker growth substrates), as does the cost of thinning the substrates post-growth.
Pursuant to embodiments of the present invention, methods of fabricating semiconductor devices are provided in which a relatively thin growth substrate is bonded to a thicker carrier substrate, and semiconductor epitaxial layers are then formed on an upper surface of the growth substrate. After the epitaxial growth is completed (and either before or after other post-growth processing steps such as metallization, passivation, etc.), the carrier substrate may be separated from the growth substrate via a separate operation. The carrier substrate may then be reused with a second growth substrate to epitaxially grow semiconductor layers on the second growth substrate. Thus, pursuant to the techniques according to embodiments of the present invention, a reusable carrier substrate may be used to grow epitaxial layers on thin growth substrates. This approach may significantly reduce the material costs for growth substrates as each growth substrate may be thinner than normal, and may also significantly reduce backend processing costs, as significantly less substrate thinning may be required. In fact, in some embodiments, the growth substrate may have a thickness that is appropriate for the final product in order to remove any need to perform backend substrate thinning.
In some embodiments, an upper surface of the carrier substrate may be patterned to facilitate separating the growth substrates from the carrier substrate. For example, grooves or other recesses may be formed in the upper surface of the carrier substrate so that the carrier substrate has a recessed upper surface with a plurality of protrusions extending upwardly therefrom. The recesses may separate the protrusions from one another. By patterning the upper surface of the carrier substrate in this fashion, the surface area of the upper surface of the carrier substrate that contacts the lower surface of the growth substrate may be reduced. This reduced amount of contact area may, in turn, reduce the strength of the bond between the two substrates. While it may be desirable that the two substrates bond together sufficiently so that the bonded substrates will appear as a single substrate during the high temperature epitaxial growth processes (in order to provide high production yields), it may also be desirable to ensure that the bonding operation can be consistently reversed without damage to the semiconductor devices that are formed on the growth substrate. The sizes of the recesses and the protrusions may be adjusted so that the strength of the bonds holding the substrates together may meet these criteria. The grooves or other recesses may also advantageously provide paths for injecting fluids and/or etchants in between the two substrates that may be used to degrade or break the bonds between the substrates, as will be discussed in greater detail below.
Example embodiments of the present invention will now be described with reference to the attached drawings.
As shown in
The carrier substrate has an upper surface 32 that is bonded to the lower surface 24 of the growth substrate 20. The lower surface 24 of the growth substrate 20 may be bonded directly to the upper surface 32 of the carrier substrate 30, or intervening material(s) such as a bonding material 40 may be interposed between the growth substrate 20 and the carrier substrate 30. Although it need not be, the carrier substrate 30 will typically be thicker than the growth substrate 20. In some cases the carrier substrate 30 may be substantially thicker than the growth substrate 20 (e.g., three times, five times, ten times or even more). The carrier substrate 30 may comprise, for example, a sapphire (Al2O3) substrate, a monocrystalline silicon carbide substrate, a polycrystalline silicon carbide substrate (formed by, for example, chemical vapor deposition or sintering), an aluminum nitride substrate, a gallium nitride substrate, a silicon substrate, a diamond substrate, a silicon-germanium substrate or various other II-VI or III-V semiconductor substrates. The carrier substrate 30 may be the same material as the growth substrate 20. For example, if the growth substrate 20 is a sapphire growth substrate, the carrier substrate 30 may be a sapphire carrier substrate 32. However, it will also be appreciated that in some embodiments the carrier substrate 30 and the growth substrate 20 may be formed of different materials. When this is the case, preferably the carrier substrate 30 and the growth substrate 20 will have coefficients of thermal expansion that are relatively closely matched. For example, in one specific embodiment, the growth substrate 20 may comprise a sapphire growth substrate 20 and the carrier substrate may comprise an alumina carrier substrate 30. In another specific embodiment, the growth substrate 20 may comprise a monocrystalline silicon carbide growth substrate 20 and the carrier substrate may comprise a polycrystalline silicon carbide carrier substrate 30. The use of alumina and polycrystalline silicon carbide carrier substrates 30 may be desirable as alumina and polycrystalline silicon carbide are less expensive than sapphire and monocrystalline silicon carbide, respectively.
In some embodiments, the upper surface 32 of the carrier substrate 30 may be a patterned surface. The use of such a patterned surface may facilitate separating the growth substrate 20 from the carrier substrate 30 after the semiconductor growth processes are completed. While the patterned surface is not illustrated in
In the embodiment of
The bonding material 40 may comprise a separate material that is deposited and/or formed between the carrier substrate 30 and the growth substrate 20. Appropriate bonding materials 40 may be selected based on the materials of the growth substrate 20 and the carrier substrate 30. In some embodiments, the bonding material may include oxide. For example, AlO2, SiO2, SiO2/Si and SiO2/Si/SiO2 may comprise suitable bonding materials 40. In other embodiments, silicon or carbon based glue or bonding materials 40 may be used. If the carrier substrate 30 and/or the growth substrate 20 includes oxide or has a surface which may readily be oxidized, then the native oxide material may be sufficient to bond the substrates 20, 30 together and it may not be necessary to include a separate bonding material 40. For example, the oxygen atoms in a sapphire (Al2O3) carrier substrate 30 will naturally bond with the oxygen atoms in a sapphire growth substrate 20.
In some embodiments, the growth substrate 20 may be bonded to the carrier substrate 30 at room temperature. Prior to bonding, the upper surface 32 of the carrier substrate and the lower surface 24 of the growth substrate may be cleaned and subjected to one or more polishing steps such as, for example, chemical mechanical polishing. The upper surface 32 of the carrier substrate and the lower surface 24 of the growth substrate 20 may be cleaved along the same crystallographic axes to enhance bonding. The bonding may be performed in a clean room environment. With many substrate materials, if the mating surfaces of the growth and carrier substrates 20, 30 are sufficiently smoothed (e.g., RMS roughness of preferably less than 1 nm), then a sufficient bond may be obtained using room temperature bonding. Typically, the strength of the bond increases if the composite substrate 10 is heat treated, as is the case when the composite substrate 10 is used as a substrate for epitaxial semiconductor growth. By way of example, room temperature bonding of two smooth sapphire substrates may result in a bonding energy of about 150 mJ/m2. If the composite substrate is annealed at 1100° C., the bonding energy may increase to approximately 3000 mJ/m2.
As discussed above, the upper surface 32 of the carrier substrate 30 may be patterned in some embodiments. Such patterning may provide multiple benefits. For example, by patterning the upper surface 32 of the carrier substrate 30, the amount of surface area where the carrier substrate 30 contacts (i.e., either directly or through a bonding material 40) the growth substrate 20 may be decreased, which may weaken the bond between the two substrates 20, 30. As techniques according to some embodiments of the present invention include the step of separating the growth substrate 20 from the carrier substrate 30, it may be desirable to have a relatively weak bond between the two substrates, so long as the bond is sufficiently strong to withstand the semiconductor growth environment so that the epitaxial growth process is as consistent (or nearly as consistent) as growth processes that use a single, thicker, growth substrate. Additionally, the recesses in the patterned upper surface 32 of the carrier substrate 30 may form voids at the interface between the upper surface 32 of the carrier substrate and the lower surface 24 of the growth substrate 20 when the growth substrate is bonded to the carrier substrate 30. Openings may be provided that allow liquids or gases to flow into these voids which may then be used to separate the growth substrate 20 from the carrier substrate 30 as will be discussed in greater detail below.
As shown in
While the use of the carrier substrates 30 according to embodiments of the present invention may be particularly advantageous when the growth substrate 20 and the epitaxial layers 50 are formed using different materials (as differences in the coefficients of thermal expansion of the different materials may lead to warping), it will be appreciated that in some embodiments the growth substrate 20 and the epitaxial layers 50 may comprise the same material. For example, in some embodiments, gallium nitride based epitaxial layers 50 may be grown on a gallium nitride growth substrate 20 that is bonded to a gallium nitride, sapphire or silicon carbide carrier substrate 30. The growth substrate 20 may, for example, have a thickness based on a desired or required thickness of the final semiconductor devices, and the carrier substrate 30 may be provided so that the overall thickness of the substrate is increased during manufacture, which may have certain advantages.
In some embodiments, the upper surfaces 138 of the pillars 134 may be at a height of between about 100 Angstroms to about 2000 Angstroms (or more) from the recessed surface 132′. In some embodiments, the spacing between adjacent pillars 134 may be between 2 microns and 100 microns. In some embodiments, the upper surfaces 138 of the pillars 134 may have a surface area of between 2 and 500 microns. In some cases, the upper surfaces 138 of the pillars 134 may be polished after the patterning process that is used to form the pillars 134 and recessed regions 136 is performed, while in other embodiments such polishing may not be necessary. The pillars 134 may be sufficiently tall such that when a growth substrate is placed on the upper surface 132 of the carrier substrate 130 the lower surface of the growth substrate will only contact the pillars 134 and will not contact the recessed surface 132′ that defines the bottom of the recessed regions 136. In some embodiments, pillars/protrusions 134 of differing heights may be provided so that the growth substrate 120 does not necessarily contact every pillar/protrusion 134. As is discussed herein, in some embodiments, the bottom surface of the growth substrate may be patterned instead of the upper surface 138 of the carrier substrate 130. In such embodiments, the bottom surface of the growth substrate may be patterned, for example, to have protrusions that are identical to the above-described protrusions 134.
A growth substrate may be bonded to the upper surfaces 138 of the pillars 134 to provide a composite substrate. As is readily apparent from
As is shown in
A lower surface of the growth substrate is then bonded to the carrier substrate to form a composite substrate (block 230). In some embodiments, the growth substrate may be bonded directly to the carrier substrate. In such embodiments, elements of the growth substrate and the carrier substrate such as, for example, oxygen atoms, may bond together to bond the growth substrate to the carrier substrate. In other embodiments, a separate bonding material may be interposed between the growth substrate and the carrier substrate. Next, one or more semiconductor growth processes may be performed on the composite substrate at a growth temperature of at least 500° C. to form one or more semiconductor layers on an upper surface of the growth substrate (block 240). After the composite substrate is removed from the growth reactor (and either or after various post-growth processing steps are performed), the growth substrate may be separated from the carrier substrate (block 250).
After the growth substrate is separated from the carrier substrate, a second growth substrate having a thickness within a preselected range may be provided (block 260). A lower surface of the second growth substrate may then be bonded to the carrier substrate to provide a second composite substrate (block 270). At least one semiconductor growth process may then be performed on the second composite substrate to form one or more semiconductor layers on an upper surface of the second composite substrate (block 280). Then, the second growth substrate may be separated from the carrier substrate (block 290).
Referring first to
Referring to
As shown in
One potential advantage of using liquid carbon dioxide as the fluid that is flowed into the voids is that liquid carbon dioxide may exhibit substantially less surface tension as compared to water. As the openings into the voids may be small, surface tension of the water molecules may make it difficult to fill the voids with water. As liquid carbon dioxide exhibits substantially less surface tension, smaller openings and/or voids may be used and it may still be possible to substantially fill the voids with the liquid carbon dioxide.
As discussed above, in some embodiments of the present invention, the upper surface of a carrier substrate (e.g., carrier substrate 130) may be patterned to form one or more recesses 136 that define one or more upwardly extending protrusions 134. A wide variety of different patterns may be used.
As discussed above, in some embodiments a growth substrate may be separated from a carrier substrate by flowing a fluid into voids that are provided at the junction of a lower surface of a growth substrate and the upper surface of a carrier substrate due to a pattern formed in the upper surface of the carrier substrate that includes one or more recesses. The fluid in the voids may be caused to change from a liquid state to a gaseous state by modifying the temperature and/or pressure conditions. As the fluid expands during this state change, it generates pressure that is used to separate the growth substrate from the carrier substrate. The increased pressure will tend to force the fluid out of the recesses through the openings 135-3, and this escaping volume of material in turn decreases the pressure. Thus, if the openings are too big and/or to numerous, it may be more difficult to generate a sufficient pressure differential. The embodiment of
In each of the above examples, the upper surface of the carrier substrate is patterned so that one or more recesses are provided therein. The recesses may extend into the center of the upper surface of the carrier substrate. When a growth substrate is bonded to the upper surface of the carrier substrate to form a composite substrate, these recesses become voids 138. Openings 135 may be provided along the periphery of the interface between the carrier substrate and the growth substrate. The openings 135 may be in fluid communication with the voids 138 and may be used, for example, to allow a fluid to flow into the voids 138 so as to fill the voids 138. Once the voids 138 are filled, the pressure may be changed so that the fluid expands (e.g., by converting from a liquid to a gas). As the fluid expands, a pressure differential may be created between the carrier substrate and the growth substrate that is sufficient to break the bonds therebetween so that the growth substrate is separated from the carrier substrate.
With some materials, there is a possibility that the patterning of the upper surface of the carrier substrate may negatively affect the epitaxial growth of semiconductor layers on the upper surface of the growth substrate. For example, the voids at the interface between the carrier substrate and the growth substrate may impact the temperature at the upper surface of the growth substrate, particularly if the growth substrate is relatively thin. If such temperature differentials exist, it may affect epitaxial growth in a variety of ways, as is known to those of skill in the art. As one example, in the growth of gallium nitride-based light emitting diodes, such temperature differentials can affect the percentage of indium and aluminum that are included in various gallium nitride-based layers of the device, so that these layers may have slightly differing amounts of indium and/or aluminum as a function of location on the substrate. This can impact, for example, the wavelength of the light emitting diodes that are formed from the substrate. In some embodiments, a large number of protrusions may be provided with small recesses between the protrusions, as such a design may help reduce temperature differentials at the upper surface of the growth substrate.
As discussed above, in some embodiments, the upper surface of the carrier substrate may be patterned using, for example, photolithography and etching processes or other substrate patterning processes known to those of skill in the art. In further embodiments, of the present invention, the upper surface of the carrier substrate may instead (or additionally) be intentionally roughened so that voids will be present when the growth substrate is bonded to the upper surface of the carrier substrate. For example, as shown in
Referring to
In some embodiments, the lower surface of the growth substrate and/or the upper surface of the carrier substrate may be polished via CMP and/or other suitable polishing techniques. By polishing one or both of these surfaces, improved bonding may be achieved between the carrier substrate and the growth substrate. The bonding strength of such polished surfaces may also be more predictable. While it may be difficult with some materials to separate a growth substrate from a carrier substrate if the mating surfaces are polished surfaces, this potential problem can be avoided, as discussed above, by patterning one or both surfaces so that only a pre-selected percentage of the surface area of the bottom of the growth substrate contacts (and hence bonds to) the upper surface of the carrier substrate. This percentage can be selected in advance so that (1) the composite substrate comprising a growth substrate bonded to a carrier substrate will be stable and appear as a single substrate during the semiconductor growth processes and (2) the growth substrate can readily be separated from the carrier substrate after removal from the growth reactor without damaging the growth substrate, the semiconductor layers grown on the growth substrate or the carrier substrate. Since the polished surfaces may provide a predictable bond strength, the polishing step may allow the growth substrate to be bonded to the carrier substrate with strength within a desirable range that meets the above criteria, as the percentage of the surface area of the bottom of the growth substrate that is bonded to the carrier substrate may be selected so that the bond strength falls within a desired range.
In some embodiments, the percentage of the surface area of the lower surface of the growth substrate that is bonded to the carrier substrate may be less than 60%. In other embodiments, the percentage may be less than 50%. In still other embodiments, the percentage may be less than 35%. In some embodiments, the percentage may even be less than 25%. As discussed above, in some embodiments a smaller percentage of the central region of the lower surface of the growth substrate may be bonded to the carrier substrate than the percentage of the peripheral region of the lower surface of the growth substrate (i.e., the size and/or number of voids in the central region is greater than in the peripheral region). Having increased voids in the central region may make it easier to generate a pressure differential between the growth substrate and the carrier substrate that is used to cleanly separate the growth substrate from the carrier substrate.
Pursuant to still further embodiments of the present invention, the carrier substrate may include one or more perforations. For example, as shown in
In some embodiments, the perforations 731 may provide paths that allow etchants to be deposited at the locations where the upper surface of the carrier substrate 730 bonds to the lower surface of the growth substrate 720. These etchants may be used to remove some of the material that bonds the growth substrate to the carrier substrate. The use of etchants may be particularly useful when the growth substrate and the carrier substrate comprise different materials, as the etchants may, for example, remove some of the lower surface of the growth substrate without significantly etching the carrier substrate. In this manner, the etchants may be used to separate the two substrates without significantly damaging the upper surface of the carrier substrate so that the carrier substrate may be reused.
In still other embodiments, suction may be applied to the lower of the carrier substrate to facilitate drawing etchants into the voids through, for example, the openings 135 that are discussed above.
Moreover, as noted above, surface tension of the fluid may limit how small the openings may be that provide access to the voids and/or the size of the voids, as the surface tension of the fluid may make it more difficult to fill the voids with fluid. If one or more perforations are provided in the carrier substrate, a vacuum may be used to draw the fluid into the voids through the openings.
Example methods of separating the growth substrate from the carrier substrate have been described above. These methods include various methods that generate a pressure differential at the interface of the growth substrate and the carrier substrate and methods that etch the areas where the growth substrate bonds to the carrier substrate. It may be particularly effective if the pressure differential may be generated near the middle of the upper surface of the carrier substrate as this may be more effective at breaking the bonds between the carrier substrate and the growth substrate as compared to pressure that is generated closer to or at the periphery of the upper surface of the carrier substrate. It will also be appreciated that any appropriate method of separating the growth substrate from the carrier substrate may be used. For example, in further embodiments, spalling techniques as described, for example, in U.S. Patent Publication No. 2010/0310775 may be used to more readily separate a growth substrate from a carrier substrate. In still other embodiments, ultraviolet lasers may be used to decompose the material at the interface where the growth wafer bonds to the carrier wafer to separate the growth wafer from the carrier wafer.
In some embodiments, the upper surface of the carrier substrate may be implanted with ions prior to the bonding operation. For example, hydrogen ions may be implanted into the upper surface of the carrier substrate. The implantation of ions may be used to embrittle the upper surface of the carrier substrate, which may make it easier to cleanly separate the growth substrate from the carrier substrate.
As discussed above, in some embodiments, the upper surface of the carrier substrate may be patterned in order to create recesses. When the growth substrate is placed on top of the carrier substrate, these recesses become voids that may receive a fluid that is used to create a pressure differential to separate the growth substrate from the carrier substrate. It will be appreciated, however, that in further embodiments of the present invention, the lower surface of the growth substrate may be patterned instead of, or in addition to, the upper surface of the carrier substrate to create such voids.
For example,
The carrier substrate 930 has an upper surface 932 that may be bonded to the lower surface 924 of the growth substrate 920. The lower surface 924 of the growth substrate 920 may be bonded directly to the upper surface 932 of the carrier substrate 930, or intervening material(s) such as a bonding material may be interposed between the growth substrate 920 and the carrier substrate 930. In the depicted embodiment, no bonding material is used, and the growth substrate 920 is in the process of being separated from the carrier substrate 930.
In some embodiments, the protrusions 926 extending downwardly from the lower surface 924 of the growth substrate 920 may comprise light extraction structures. As known to those of skill in the art, certain geometric shapes may be patterned into light emitting surfaces of a light emitting diode (LED) in order to enhance the amount of light that is generated by the LED through the surface. In, for example, applications where LEDs are mounted in a so-called “flip-chip” arrangement where the light emitting layers of the LED are sandwiched between a mounting substrate and the growth substrate so that light is emitted through the growth substrate, the bottom surface of the growth substrate may be patterned to include such light extraction structures. Pursuant to embodiments of the present invention, the bottom surface 924 of a growth substrate 920 may be patterned both for purposes of enhancing light extraction from LED chips that are ultimately singulated from the growth substrate 920 and for purposes of facilitating separation of the growth substrate 920 from a carrier substrate 930 in order to allow, for example, the use of thinner growth substrates.
As either the upper surface of the carrier substrate or the lower surface of the growth substrate (or both) may be patterned, the composite substrates according to embodiments of the present invention may be viewed as having (1) a first substrate that has a first major surface that is patterned to include protrusions that extend away from the first major surface and a second major surface that is opposite the first major surface and (2) a second substrate that has opposed first and second major surfaces. The second major surface of the second substrate is mated with the first major surface of the first substrate. The semiconductor epitaxial layers may be formed on (1) the second major surface of the first substrate (when the growth substrate includes a patterned lower surface) or the first major surface of the second substrate (when the carrier substrate includes a patterned upper surface). Distal ends of the protrusions are joined to the second major surface of the second substrate.
As discussed above, the methods and substrates according to embodiments of the present invention may provide a number of advantages. First, the growth substrates that are used may be substantially thinner than conventional growth substrates for the same applications, as the problems caused by the potential for the substrate to warp during cool-down from crystal growth may be reduced by the provision of a relatively thick carrier substrate. The use of thinner growth substrates may result in significantly reduced material costs, and may also reduce or eliminate the need for costly back-end grinding operations that are conventionally used to reduce the thickness of the growth substrate to a desired thickness for the application at issue. Second, the provision of the thick carrier substrate may allow for even less substrate warping than is experienced in conventional processes, as the techniques according to embodiments of the present invention may remove the tradeoff between warping and substrate thickness. Accordingly, it is expected that the techniques according to embodiments of the present invention may result in improved consistency in crystal growth and in improved production yields. Third, in some cases, the growth substrate may be cut to a desired thickness so that no back-end grinding operations are required at all.
Embodiments of the present invention have been described above with reference to the accompanying drawings, in which embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein. Rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. Like numbers refer to like elements throughout.
It will be understood that, although the terms first, second, etc. may be used herein to describe various elements, these elements should not be limited by these terms. These terms are only used to distinguish one element from another. For example, a first element could be termed a second element, and, similarly, a second element could be termed a first element, without departing from the scope of the present invention. As used herein, the term “and/or” includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element such as a layer, region or substrate is referred to as being “on” or extending “onto” another element, it can be directly on or extend directly onto the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” or extending “directly onto” another element, there are no intervening elements present. It will also be understood that when an element is referred to as being “connected” or “coupled” to another element, it can be directly connected or coupled to the other element or intervening elements may be present. In contrast, when an element is referred to as being “directly connected” or “directly coupled” to another element, there are no intervening elements present. Other words used to describe the relationship between elements should be interpreted in a like fashion (i.e., “between” versus “directly between”, “adjacent” versus “directly adjacent”, etc.).
Relative terms such as “below” or “above” or “upper” or “lower” or “horizontal” or “vertical” may be used herein to describe a relationship of one element, layer or region to another element, layer or region as illustrated in the figures. It will be understood that these terms are intended to encompass different orientations of the device in addition to the orientation depicted in the figures.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the singular forms “a”, “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will be further understood that the terms “comprises” “comprising,” “includes” and/or “including” when used herein, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
A variety of different example embodiments have been described above. It will be appreciated that features of the different embodiments can be combined in different ways and/or combinations to provide additional embodiments.
Certain of the embodiments of the present invention are described above with reference to flowchart illustrations. It will be understood that the operations described in various of the blocks of these flowcharts may be carried out simultaneously as opposed to sequentially and that various of the operations may be performed in a different order than shown in the example flowchart illustrations.
