This application is based on Japanese Patent Application No. 2013-94373 filed on Apr. 26, 2013 and Japanese Patent Application No. 2013-124970 filed on Jun. 13, 2013, the disclosures of which are incorporated herein by reference.
The present disclosure relates to a multi-layer substrate having a land on which electronic components are mounted through soldering, an electronic device using the multi-layer substrate, a method of manufacturing the multi-layer substrate, a substrate, and an electronic device using the substrate.
Up to now, as the electronic device of this type, the following device has been proposed (for example, refer to PTL 1).
Specifically, the electronic device includes a multi-layer substrate in which a core layer and a build-up layer made of resin are laminated, an inner layer wire is formed between the core layer and the build-up layer, and a land is formed on one surface of the build-up layer opposite to the core layer. The land includes a metal film formed into a plate-shape, and a metal plating that is higher in solder wettability than the metal film, and formed on one surface of the metal film opposite to the build-up layer, and an overall side surface of the metal film. Electronic components such as a power element and a control element are mounted over the land through the solder. One surface side of the multi-layer substrate including the electronic components is covered with a mold resin for improving an environmental (corrosion) resistance to configure the electronic device.
A substrate disclosed in PTL 2 has been proposed. The substrate includes an insulating layer in which both surfaces of a glass cloth are sealed with a resin material, a first conductor disposed on a front surface side of the insulating layer, and a second conductor disposed on a rear surface side of the insulating layer.
The insulating layer includes the glass cloth, a first resin layer made of a resin material and sealing a first conductor side of the glass cloth, and a second resin layer made of a resin material and sealing a second conductor side of the glass cloth.
For example, as illustrated in
In other words, a stress caused by peeling off the mold resin J1 from the solder J6 is propagated to the build-up layer J7, and the crack J8 is generated in the build-up layer J7.
Because a displacement of the land J5 cannot be suppressed by the mold resin J1 if the mold resin J1 is peeled off, the land J5 can be expanded and contracted according to a use environment. Because the land J5 and the build-up layer J7 are different in thermal expansion coefficient from each other, the stress is applied to the build-up layer J7. In particular, in a low-temperature use environment, with the contraction of the land J5, a significant tensile stress is applied to an end of the interface of the build-up layer J7 with the land J5, and the crack J8 is generated in the build-up layer J7.
When the crack J8 generated in the build-up layer J7 reaches the inner layer wire, if foreign matter such as water enters the crack J8, the land J5 and the inner layer wire are likely to be short-circuited.
The present inventors have focused on a linear expansion coefficient of the first resin layer and a liner expansion coefficient of the first conductor in the substrate of the above PTL 2, and studied that the generation of the crack is suppressed.
The linear expansion coefficient of the glass cloth is smaller than the linear expansion coefficient of the first resin layer. For that reason, when the glass cloth large in thickness is used for the purpose of enhancing a strength of the insulating layer, a rate of the glass cloth to the insulating layer increases. As a result, the linear expansion coefficient of the insulating layer on the first conductor side is affected by the linear expansion coefficient of the glass cloth, and lowered. The linear expansion coefficient of the insulating layer on the first conductor side represents a rate of a change in a length of a portion of the insulating layer on the first conductor side to a temperature rise. For that reason, when the rate of the glass cloth to the insulating layer increases, a difference between the linear expansion coefficient of the insulating layer on the first conductor side and the linear expansion coefficient of the first conductor becomes larger. Therefore, a larger internal stress may be generated in the interface between the insulating layer and the first conductor with a change in temperature. For that reason, when the change in temperature is repetitively generated, a crack (hereinafter, the crack thus generated in the interface between the insulating layer and the first conductor is called “first conductor side starting point crack”) caused by the internal stress may be generated, in the first resin layer of the insulating layer.
On the other hand, the glass cloth is woven with multiple horizontal yarns made of multiple glass fibers extending in a horizontal direction, and multiple vertical yarns made of multiple glass fibers extending in a vertical direction. In the glass cloth, the respective adjacent two horizontal yarns of the multiple horizontal yarns and the respective adjacent two vertical yarns of the multiple vertical yarns are configured to surround a basket hall.
For example, when the first conductor side starting point crack is generated, the crack may progress to a second resin layer through the basket hall (between the adjacent two glass fibers of the multiple glass fibers) of the glass cloth.
On the contrary, as described above, the glass cloth is woven with the multiple horizontal yarns and the multiple vertical yarns. For that reason, the multiple glass fibers configuring the multiple horizontal yarns or the multiple vertical yarns have a bridge effect of reducing a progress rate of the first conductor side starting point crack in the second resin layer. The progress rate represents a rate at which the crack progresses to the second conductor side from the glass cross side in the second resin layer.
In order to reduce a difference between the linear expansion coefficient of the insulating layer on the first conductor side and the linear expansion coefficient of the first conductor described above, it is proposed that the thickness of the first resin layer increases to reduce an influence of the linear expansion coefficient of the glass cloth as compared with the linear expansion coefficient of the insulating layer on the first conductor side. However, on the other hand, when the thickness of the insulating layer is kept constant, and the thickness of the first resin layer unnecessarily increases, the thickness of the second resin layer decreases. For that reason, the thickness of the second resin layer having the above bridge effect decreases. In other words, the thickness of a region in which the progress rate of the first conductor side starting point crack is reduced due to the bridge effect in the insulating layer decreases. Therefore, a time required since the first conductor side starting point crack progresses to the second resin layer until the crack reaches a surface of the second resin layer on the second conductor side becomes shorter. In other words, there is a concern about a reduction in the strength to the first conductor side starting point crack as the entire substrate.
It is a first object of the present disclosure to provide a multi-layer substrate that can restrict a land and an inner layer wire from being short-circuited even if a crack is generated in a build-up layer, an electronic device using the multi-layer substrate, and a method of manufacturing the multi-layer substrate. Further, it is a second object of the present disclosure to provide a substrate that performs both of the suppression of the generation of a first conductor side starting point crack and an improvement in the strength of the overall substrate to the first conductor side starting point crack, and an electronic device using the substrate.
According to a first aspect of the present disclosure, a multi-layer substrate includes: a core layer having a front surface; an inner layer wire formed on the front surface of the core layer; a build-up layer that is arranged on the front surface of the core layer in a state where the build-up layer covers the inner layer wire, and includes a glass cloth woven with glass fibers into a film shape, and a resin layer that covers both of front and rear surfaces of the glass cloth; and a land that is formed on a surface of the build-up layer opposite to the core layer, over which an electronic component is mounted through a solder. In a portion of the build-up layer, which is located between the land and the core layer, the glass cloth is extruded toward the land, and a thickness of the resin layer from the glass cloth to the surface adjacent to the land is smaller than a dimension from the glass cloth to the front surface of the core layer in the portion.
According to the above configuration, the glass cloth of the build-up layer between the land and the core layer is deformed toward the land. The thickness of the resin layer from the glass cloth to the surface adjacent to the land is smaller than the dimension from the glass cloth to the front surface of the core layer. With the above configuration, a progress or an enlargement of a crack can be suppressed from a stage in which the crack is smaller. Therefore, the progress and the enlargement of the crack can be delayed. As a result, even if the crack is generated, an insulating property between the land and an inner layer wire is ensured, and the land and the inner layer wire can be restricted from being short-circuited.
For example, a method of manufacturing the multi-layer substrate includes: preparing a core layer having an inner layer wire on a front surface of the core layer; preparing a build-up layer having a glass cloth and a resin layer having the same thickness on both surfaces of the glass cloth; laminating the build-up layer on the front surface of the core layer; laminating a metal plate on a surface of the build-up layer opposite to the core layer; deforming a portion of the glass cloth corresponding to the inner layer wire in a direction away from the core layer so that the portion of the glass cloth is extruded toward the metal plate by the inner layer wire than a portion of the glass cloth without corresponding to the inner layer wire while allowing a resin forming the resin layer of the build-up layer to flow around the inner layer wire by heating a laminated body having the core layer, the build-up layer, and the metal plate while pressurizing the laminated body in a laminating direction; and forming a surface layer wire in a portion of the metal plate corresponding to the inner layer wire by patterning the metal plate.
According to a second aspect of the present disclosure, a substrate includes: an insulating layer; a first conductor arranged on one side of the insulating layer in a thickness direction of the insulating layer; and a second conductor arranged on the other side of the insulating layer in the thickness direction. The insulating layer includes a glass cloth, and a resin layer that seals a surface of the glass cloth adjacent to the first conductor and a surface of the glass cloth adjacent to the second conductor with an electrically insulating resin material. A linear expansion coefficient of the glass cloth is lower than a linear expansion coefficient of the first conductor, and lower than a linear expansion coefficient of a portion of the resin layer adjacent to the first conductor. A dimension between the first conductor and the glass cloth in the thickness direction of the insulating layer is defined as A. A dimension of the glass cloth in the thickness direction is defined as B. A dimension between a surface of the insulating layer adjacent to the second conductor and the glass cloth in the thickness direction is defined as C. The dimensions A, B, and C satisfy a size relationship of C>A>B. The thickness direction of the insulating layer represents a direction orthogonal to a direction along a surface of the insulating layer.
According to the above configuration, the size relationship of A>B is first satisfied. For that reason, as compared with a case in which a size relationship of A<B is satisfied, a distance between the first conductor and the glass cloth can be increased. Therefore, an influence of the linear expansion coefficient of the glass cloth can be reduced as compared with the linear expansion coefficient of the portion of the insulating layer adjacent to the first conductor. As a result, a difference between the linear expansion coefficient of the portion of the insulating layer adjacent to the first conductor and the linear expansion coefficient of the first conductor can be reduced. For that reason, an internal stress can be restricted from being generated on an interface between the insulating layer and the first conductor due to a temperature change. As a result, the first conductor side starting point crack can be primarily restricted from being generated on the portion of the resin layer (hereinafter called “first resin layer”) adjacent to the first conductor due to the temperature change.
If the first conductor side starting point crack is generated in the first resin layer of the resin layer in the thickness direction, there is a risk that the first conductor side starting point crack progresses to the portion of the resin layer (hereinafter referred to as “second resin layer”) adjacent to the second conductor.
According to a third aspect of the present disclosure, in the substrate of the second aspect, the glass cloth is woven with a plurality of first yarns each made of a glass fiber extending in a first direction, and a plurality of second yarns each made of a glass fiber extending in a second direction orthogonal to the first direction. For that reason, the glass fibers configuring the plurality of first yarns or the plurality of second yarns have a bridge effect of reducing a progress rate at which the first conductor side starting point crack progresses in the second resin layer. That is, the glass cloth has the bridge effect of reducing the progress rate at which the first conductor side starting point crack progresses in the second resin layer. The progress rate of the first conductor side starting point crack represents a rate at which the first conductor side starting point crack progresses to the surface of the second conductor side from the glass cross side in the second resin layer.
In the substrate according to the second and third aspects, the size relationship of A>B as well as C>A is satisfied. For that reason, as compared with a case in which the size relationship of A>C is satisfied when the thickness of the substrate is kept constant, a thickness of a region in which the progress rate of the first conductor side starting point crack is reduced due to the bridge effect becomes large. As a result, a time required since the first conductor side starting point crack is generated in the second resin layer until the crack progresses to the surface of the second resin layer on the second conductor side can be lengthened. Therefore, the strength of the overall substrate against the first conductor side starting point crack can be improved.
As described above, the substrate that performs both of the suppression of the generation of the first conductor side starting point crack and the improvement in the strength of the overall substrate against the first conductor side starting point crack can be provided.
The above and other objects, features and advantages of the present disclosure will become more apparent from the following detailed description made with reference to the accompanying drawings, in which:
Hereinafter, embodiments according to the present disclosure will be described with reference to the drawings. In each of the following embodiments, the description will be provided using the same reference numerals for the same or equivalent portions.
A first embodiment of the present disclosure will be described. An electronic device according to the present embodiment is mounted on a vehicle such as an automobile, and applied for driving various electronic devices for the vehicle.
As illustrated in
The multi-layer substrate 10 is a laminated substrate including a core layer 20 as an insulating resin layer, a build-up layer 30 disposed on a front surface 20a of the core layer 20, a build-up layer 40 disposed on a rear surface 20b of the core layer 20, and inner layer wires 51, 52.
The core layer 20 and the build-up layers 30, 40 are each made of prepreg obtained by sealing both surfaces of a glass cloth woven with glass fibers into a film shape with a thermosetting resin, and the resin of the prepreg is epoxy resin or the like. A filler excellent in electric insulation and heat radiation such as alumina or silica may be contained in the resin of the prepreg as occasion demands.
The patterned front surface side inner layer wire 51 (hereinafter referred to merely as “inner layer wire 51”) is formed on an interface of the core layer 20 and the build-up layer 30. Likewise, the patterned rear surface side inner layer wire 52 (hereinafter referred to merely as “inner layer wire 52”) is formed on an interface of the core layer 20 and the build-up layer 40.
Patterned front surface side surface layer wires 61 to 63 (hereinafter referred to simply as “surface layer wires 61 to 63”) are formed on a surface 30a of the build-up layer 30. In the present embodiment, the surface layer wires 61 to 63 include mounting lands 61 on which the electronic components 121 to 123 are mounted, bonding lands 62 that are electrically connected to the respective electronic components 121 and 122 through bonding wires 141 and 142, and a surface pattern 63 that is electrically connected to an external circuit.
Likewise, patterned rear surface side surface layer wires 71 and 72 (hereinafter referred to simply as “surface layer wires 71 and 72”) are formed on a surface 40a of the build-up layer 40. In the present embodiment, the surface layer wires 71 and 72 include a rear surface pattern 71 connected to the inner layer wire 52 through a filled via to be described later, and a heat sink pattern 72 (hereinafter referred to merely as “HS pattern 72”) having a heat radiation heat sink.
The surface 30a of the build-up layer 30 means one surface of the build-up layer 30 opposite to the core layer 20, which is a surface forming the one surface 10a of the multi-layer substrate 10. The surface 40a of the build-up layer 40 means one surface of the build-up layer 40 opposite to the core layer 20, which is a surface forming the other surface 10b of the multi-layer substrate 10. The inner layer wires 51, 52, the surface layer wires 61 to 63, and the surface layer wires 71 and 72 are configured by appropriately laminating metal foils or metal plating made of copper on each other, which will be described in detail later.
The inner layer wire 51 and the inner layer wire 52 are electrically and thermally connected to each other through a through-via 81 that penetrates through the core layer 20. Specifically, the through-via 81 is configured in such a manner that a through-electrode 81b made of copper is formed on a wall surface of a through-hole 81a that penetrates through the core layer 20 in a thickness direction of the core layer 20, and an interior of the through-hole 81a is filled with a filler 81c.
The inner layer wire 51 as well as the surface layer wires 61 to 63, and the inner layer wire 52 as well as the surface layer wires 71 and 72 are electrically and thermally connected to each other through filled vias 91 and 101 that appropriately penetrate through the build-up layers 30 and 40 in the thickness direction of those layers, respectively. Specifically, the filled vias 91 and 101 are configured in such a manner that through-holes 91a and 101a that penetrate through the build-up layers 30 and 40 in the thickness direction are filled with through-electrodes 91b and 101b made of copper or the like.
The filler 81c is made of resin, ceramic, or metal, and made of epoxy resin in the present embodiment. The through-electrodes 81b, 91b, and 101b are made of metal plating made of copper or the like.
The surfaces 30a and 40a of the respective build-up layers 30 and 40 are formed with a solder resist 110 that covers the front surface pattern 63 and the rear surface pattern 71. An opening is defined in the solder resist 110 that covers the front surface pattern 63 in a cross-section different from that in
The electronic components 121 to 123 include a power element 121 large in heat generation such as an IGBT (insulated gate bipolar transistor) or a MOSFET (metal oxide semiconductor field effect transistor), a control element 122 such as a microcomputer, and a passive element 123 such as a chip capacitor or a resistor. The respective electronic components 121 to 123 are mounted on the lands 61 through solders 130, and electrically and mechanically connected to the lands 61. The power element 121 and the control element 122 are also electrically connected to the lands 62 formed around the power element 121 and the control element 122 through the bonding wires 141 and 142 made of aluminum, gold or the like.
In the above description, the electronic components 121 to 123 are exemplified by the power element 121, the control element 122, and the passive element 123, but the electronic components 121 to 123 are not limited to those components.
The mold resin 150 is configured to seal the lands 61, 62, and the electronic components 121 to 123, and formed with general mold material such as epoxy resin through a transfer mold technique or a compression mold technique using a mold.
In the present embodiment, the mold resin 150 is formed on only the one surface 10a of the multi-layer substrate 10. In other words, the electronic device according to the present embodiment is of a so-called half-mold structure. On the other surface 10b side of the multi-layer substrate 10, a heat sink is disposed on the HS pattern 72 through a heat radiation grease although not particularly shown.
A basic configuration of the electronic device according to the present embodiment is described above. Subsequently, a description will be given of a structure of the build-up layer 30 below the lands 61 on which the electronic components 121 to 123 are mounted, which is features of the present embodiment.
As illustrated in
On the other hand, as described above, the build-up layer 30 is made of prepreg in which both surfaces of a glass cloth 30b are sealed with thermosetting resin layers 30c. A portion of the glass cloth 30b disposed in the build-up layer 30, which is located below each of the lands 61, that is, between the land 61 and the core layer 20, is deformed toward the land 61. With the above configuration, a thickness S1 of the resin layer 30c from the glass cloth 30b to a surface of the resin layer 30c adjacent to the land 61 (the surface opposite to the core layer 20) is set to be thinner than a thickness (dimension) T1 from the glass cloth 30b to the core layer 20. Specifically, the inner layer wire 51 is disposed at a position below each land 61, and the glass cloth 30b is extruded by the inner layer wire 51, and approaches toward the land 61. The thickness S1 of a portion corresponding to the land 61 from the glass cloth 30b to a surface of the resin layer 30c adjacent to the land 61 is set to be smaller than a thickness S2 of a portion not corresponding to the land 61 (a portion corresponding to an outside of the land 61) from the glass cloth 30b to the surface of the resin layer 30c adjacent to the land 61.
When the glass cloth 30b is disposed in the build-up layer 30, since the glass cloth 30b is provided for the purpose of ensuring a strength of the build-up layer 30, the glass cloth 30b has a sufficient thickness to ensure the strength. For that reason, even when the build-up layer 30 is brought in close contact with the core layer 20, the glass cloth 30b is kept flat and hardly deformed. As will be described later, the build-up layer 30 is manufactured by disposing the resin layers 30c having substantially the same thickness on both surfaces of the glass cloth 30b. When the build-up layer 30 is brought into close contact with the core layer 20, the inner layer wire 51 is embedded in the resin layer 30c. For that reason, due to the nature, as illustrated in
On the contrary, in the present embodiment, with a reduction in the strength of the glass cloth 30b while the strength of the build-up layer 30 is kept to some degree, the glass cloth 30b is deformed at a lower position of the land 61, and the glass cloth 30b approaches the land 61 side. Specifically, the thickness of the glass cloth 30b is set to be equal to or larger than 10 μm and equal to or smaller than 30 μm, for example, as thin as 20 μm, to reduce the strength of the glass cloth 30b. With the above configuration, the glass cloth 30b can approach the land 61 to obtain the following advantages.
For example, when the mold resin 150 is peeled off from the solder 130 that connects the passive element 123 to the land 61, and a crack is generated in the build-up layer 30 through an interface of those components, the crack gradually progresses to the glass cloth 30b. In this situation, the progress of the crack cannot perfectly stop in the glass cloth 30b. However, since the strength of the glass cloth 30b is sufficiently higher than the strength of the resin layer 30c, and the glass cloth 30b is woven with the glass fibers, the crack can progress from only a gap of the glass cloth 30b. For that reason, a crack width is smaller below the glass cloth 30b. The application of a stress to the resin layer 30c is reduced due to the presence of the glass cloth 30b high in strength, and the progress or enlargement of the crack from the glass cloth 30b toward the core layer 20 can be suppressed.
The above advantage is obtained by the provision of the glass cloth 30b, but the progress or the enlargement of the crack can be suppressed from a stage where the crack is smaller as the glass cloth 30b is closer to the land 61. For that reason, the progress and the enlargement of the crack can be delayed. Therefore, even if the crack is generated, an insulating property between the land and an inner layer wire is ensured, and the land and the inner layer wire can be restricted from being short-circuited.
If the glass cloth 30b is set closer to the land 61, it is conceivable that the entirety of the glass cloth 30b may be set closer to the land 61. However, the manufacture in which the thicknesses of the resin layers 30c disposed on both surfaces of the glass cloth 30b are made different from each other causes a manufacturing process to be complicated, and is not preferable. In the manufacture, a process of bringing the build-up layer 30 into close contact with the core layer 20 must be performed while recognizing the front and rear surfaces. Further, when the thickness of the resin layer 30c adjacent to the land 61 is thinned, a filling shortage of the resin layer 30c occurs at a position outside of the land 61 as illustrated in
Therefore, in the present embodiment, the resin layer 30c on the side adjacent to the land 61 and below the land 61 is basically thinned while using the build-up layer 30 having the resin layers 30c of the same thickness on both of the front and rear surfaces of the glass cloth 30b. This makes it possible to restrict the land and the inner layer wire 51 from being short-circuited even if the crack is generated in the build-up layer 30. The filling shortage of the resin layer 30c can be restricted from occurring outside of the land 61.
The configuration of the electronic device according to the present embodiment is described above. Subsequently, a method of manufacturing the above electronic device will be described with reference to
First, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Thereafter, as illustrated in
Then, as illustrated in
In
Thereafter, as illustrated in
The build-up layers 30 and 40 are manufactured as follows for preparation. Specifically, in preparing the build-up layer 30, as illustrated in
Further, the build-up layers 30 and 40 prepared in the above manner are disposed on both surfaces of the core layer 20 together with the metal plates 166 and 167, respectively, to configure the laminated body 168 as illustrated in
In this situation, since the inner layer wire 51 is disposed at a position to be formed with the land 61 on which the passive element 123 is mounted, the glass cloth 30b is extruded by the inner layer wire 51 together with the resin forming the resin layer 30c, and deformed in a direction away from the core layer 20, as illustrated in
Then, as illustrated in
Further, as illustrated in
Then, as illustrated in
When the land 61 of the surface layer wires 61 to 63 is formed, for example, the electroless plating or the electroplating is performed in a state where a side surface 64c of the metal plate 166 forming the metal film 64 is covered with a mask with the result that the metal plating 65 is formed on only one surface 64a of the metal film 64.
Subsequently, as illustrated in
Thereafter, although not particularly shown, the electronic components 121 to 123 are mounted on the lands 61 through the solders 130. Wire bonding is performed between the power element 121 as well as the control element 122, and the lands 62, and the power element 121 and the control element 122 are electrically connected to the respective lands 62. Subsequently, the mold resin 150 is formed through the transfer mold technique or the compression mold technique using the mold so as to seal the lands 61, 62, and the electronic components 121 to 123. With the above process, the electronic device in which the mold resin 150 comes into close contact with a side surface 61c of each land 61 is manufactured.
As described above, in the present embodiment, the glass cloth 30b within the build-up layer 30 below the lands 61 is deformed toward the lands 61. The thickness S1 of the resin layer 30c from the glass cloth 30b to the surface adjacent to the land 61 is set to be smaller than the thickness (dimension) T1 from the glass cloth 30b to the core layer 20. With the above configuration, a progress or an enlargement of a crack can be suppressed from a stage in which the crack is smaller. Therefore, the progress and enlargement of the crack can be delayed. As such, even if the crack is generated, an insulating property between the land and an inner layer wire is ensured, and the land and the inner layer wire can be restricted from being short-circuited.
An electronic device according to a second embodiment of the present disclosure will be described with reference to
As illustrated in
The multi-layer substrate 210 is a laminated substrate including a core layer 220, a front surface side build-up layer 230 disposed on a front surface 220a of the core layer 220, and a rear surface side build-up layer 240 disposed on a rear surface 220b of the core layer 220.
The core layer 220 is configured as a prepreg layer made of prepreg. As illustrated in
The build-up layers 230 and 240 are each formed of a prepreg layer made of prepreg. As illustrated in
As illustrated in
A thermosetting resin material (for example, epoxy resin) having an electric insulating property is used as the resin material forming the resin layers 241 and 242. The resin material of the resin layers 241 and 242 is mixed with the filler 203 made of ceramic having an electric insulating property and a thermal conductivity and excellent in heat radiation such as alumina or silica. The glass clothes 201a, 201b, and 201c according to the present embodiment each have an electric insulating property.
The multiple front surface side inner layer wires 2511 and 2512 in
The build-up layer 230 is laminated on the core layer 220 so as to cover the front surface 220a of the core layer 220 together with the multiple front surface side inner layer wires 2511 and 2512. The build-up layer 240 is laminated on the core layer 220 so as to cover the rear surface 220b of the core layer 220 together with the multiple rear surface side inner layer wires 2521 and 2522.
On the front surface 220a of the core layer 220, the resin layer 232 (refer to
The multiple front surface side surface layer wires 261 to 263 are formed on the front surface 230a of the build-up layer 230. In other words, the multiple front surface side surface layer wires 261 to 263 are disposed on a side of the build-up layer 230 opposite to the core layer 220 in the thickness direction. In the present embodiment, the multiple front surface side surface layer wires 261 to 263 include mounting lands 261 on which electronic components 2121 to 2123 are mounted, bonding lands 262 that are electrically connected to the electronic components 2121 and 2122 through bonding wires 2141 and 2142, and a surface pattern 263 that is electrically connected to the external circuit.
Likewise, the multiple rear surface side surface layer wires 271 and 272 are formed on the surface 240a of the build-up layer 240. In other words, the multiple rear surface side surface layer wires 271 and 272 are disposed on a side of the build-up layer 240 opposite to the core layer 220 in the thickness direction. In the present embodiment, the multiple rear surface side surface layer wires 271 and 272 include a rear surface pattern 271 connected to the rear surface side inner layer wires 2521 and 2522 through a filled via to be described later, and a heat sink pattern 272 having a heat radiation heat sink.
The surface layer wires 261 to 263, 271, and 272 configure a first conductor. The inner layer wires 2511, 2512, 2521, and 2522 configure a second conductor. The front surface 230a of the build-up layer 230 means one surface of the build-up layer 230 adjacent to the front surface side surface layer wires 261 to 263, which is a surface forming the one surface 210a of the multi-layer substrate 210. The surface 240a of the build-up layer 240 means one surface of the build-up layer 240 adjacent to the rear surface side surface layer wires 271 and 272, which is a surface forming the other surface 210b of the multi-layer substrate 210.
The inner layer wires 2511, 2512, 2521, 2522, the front surface side surface layer wires 261 to 263, and the rear surface side surface layer wires 271 and 272 are conductors configured by appropriately laminating metal foils or metal platings made of copper on each other, which will be described in detail later.
The front surface side inner layer wires 2511, 2512 and the rear surface side inner layer wires 2521 and 2522 are electrically and thermally connected to each other through a through-via 281 that penetrates through the core layer 220. Specifically, the through-via 281 is configured in such a manner that a through-electrode 281b made of copper is formed on a wall surface of a through-hole 281a that penetrates through the core layer 220 in the thickness direction of the core layer 220, and an interior of the through-hole 281a is filled with a filler 281c.
The front surface side inner layer wires 2511 and 2512 as well as the front surface side surface layer wires 261 to 263, and the rear surface side inner layer wires 2521 and 2522 as well as the rear surface side surface layer wires 271 and 272 are electrically and thermally connected to each other through filled vias 291 and 2101 that appropriately penetrate through the build-up layers 230 and 240 in the thickness direction of those layers, respectively.
Specifically, the filled vias 291 and 2101 are configured in such a manner that through-holes 291a and 2101a that penetrate through the build-up layers 230 and 240 in the thickness direction are filled with through-electrodes 291b and 2101b made of copper or the like.
The filler 281c is made of resin, ceramic, or metal, and made of epoxy resin in the present embodiment. The through-electrodes 281b, 291b, and 2101b are made of metal plating made of copper or the like.
The surfaces 230a and 240a of the respective build-up layers 230 and 240 are formed with a solder resist 2110 that covers the front surface pattern 263 and the rear surface pattern 271. An opening is defined in the solder resist 2110 that covers the front surface pattern 263 in a cross-section different from that in
The electronic components 2121 to 2123 include a power element 2121 large in heat generation such as an IGBT (insulated gate bipolar transistor) or an MOSFET (metal oxide semiconductor field effect transistor), a control element 2122 such as a microcomputer, and a passive element 2123 such as a chip capacitor or a resistor.
The respective electronic components 2121 to 2123 are mounted on the lands 261 through solders 2130, and electrically and mechanically connected to the lands 261. The power element 2121 and the control element 2122 are also electrically connected to the lands 262 formed around the power element 2121 and the control element 2122 through the bonding wires 2141 and 2142 made of Al, Au or the like.
In this example, the above-mentioned first wiring groups 2511 and 2521 are the front and rear inner layer wires 2511 and 2521 connected to the power element 2121 of a relatively large current. On the other hand, the above-mentioned second wiring groups 2512 and 2522 are the front and rear inner layer wires 2512 and 2522 connected to the control element 2122 and the passive element 2123 of a relatively small current.
In this example, the electronic components 2121 to 2123 are exemplified by the power element 2121, the control element 2122, and the passive element 2123, but the electronic components 2121 to 2123 are not limited to those components.
The mold resin member 2150 is configured to seal the lands 261, 262, and the electronic components 2121 to 2123, and formed with general mold material such as epoxy resin through a transfer mold technique or a compression mold technique using a mold.
In the present embodiment, the mold resin 2150 is formed on only the one surface 210a of the multi-layer substrate 210. In other words, the electronic device according to the present embodiment is of a so-called half-mold structure. On the other surface 210b side of the multi-layer substrate 210, a heat sink is disposed on the heat sink pattern 272 through a heat radiation grease although not particularly shown.
Subsequently, a structure of the build-up layers 230 and 240 according to the present embodiment will be described in detail with reference to
It is assumed that a dimension between the front surface side surface layer wires 261 to 263 (that is, the front surface 230a of the build-up layer 230) and the glass cloth 201b is A1 in the thickness direction of the build-up layer 230 in
In the present embodiment, a reference position of the glass cloth 201b for setting the dimension A1 is set to an upper end of the glass cloth 201b. A reference position of the glass cloth 201b for setting the dimension C1 is set to a lower end of the glass cloth 201b. Hereinafter, the upper end and the lower end of the glass cloth 201b will be described.
As illustrated in
Each of the vertical yarns 234 is largest in the thickness of a center of the vertical yarn 234 in a width direction (refer to
Under the circumstances, in the present embodiment, the planar center portion 235a of the bellies 235 adjacent to the front surface side surface layer wires 261 to 263 in the multiple bellies 235 of the glass cloth 201b is set to an upper end of the glass cloth 201b. The planar center portion 235a of the bellies 235 adjacent to the front surface side inner layer wires 2511 and 2512 in the multiple bellies 235 of the glass cloth 201b is set to a lower end of the glass cloth 201b. It is assumed that a thickness of the planar center portion 235a (refer to
It is assumed that a dimension between the rear surface side surface layer wires 271, 272 (that is, the surface 240a of the build-up layer 240) and the glass cloth 201c is A2 in the thickness direction of the build-up layer 240 in
In this example, the dimension A2 is a dimension between a lower end of the glass cloth 201c and the rear surface side surface layer wires 271, 272. The lower end of the glass cloth 201c represents the planar center portion of the bellies adjacent to the rear surface side surface layer wires 271 and 272 in the multiple bellies of the glass cloth 201c. The planar center portion of the bellies represents a portion of the belly largest in the thickness as described above. The dimension C2 is a dimension of the glass cloth 201c between an upper end of the glass cloth 201c and the rear surface side inner layer wires 2521, 2522. The upper end of the glass cloth 201c represents the planar center portion of the bellies adjacent to the rear surface side inner layer wires 2521 and 2522 in the multiple bellies of the glass cloth 201c. A thickness of the planar center portion 235a of the bellies 235 in the glass cloth 201c is set as a dimension B2.
In the build-up layer 230 according to the present embodiment, when a crack is generated in the resin layer 231, the crack may progress to the resin layer 232 through the basket halls 236 of the glass cloth 201b (or between the multiple glass fibers configuring the multiple horizontal yarns 233 and the multiple vertical yarns 234). On the contrary, the glass cloth 201b is woven with the multiple horizontal yarns 233 and the multiple vertical yarns 234. For that reason, when the crack generated in the resin layer 231 progresses to the resin layer 232, the multiple glass fibers configuring the multiple horizontal yarns 233 or the multiple vertical yarns 234 have the bridge effect of reducing the progress rate at which the crack progresses in the resin layer 232. In other words, when the crack generated in the resin layer 231 progresses to the resin layer 232, the glass cloth 201b has the bridge effect of reducing the progress rate at which the crack progresses in the resin layer 232. The progress rate represents a rate at which the crack progresses towards the rear surface 230b from the glass cloth 201b.
The glass cloth 201c is woven with the multiple horizontal yarns 233 and the multiple vertical yarns 234 as with the glass cloth 201b. For that reason, when the crack generated in the resin layer 241 progresses to the resin layer 242, the glass cloth 201c has the bridge effect of reducing the progress rate at which the crack progresses in the resin layer 242. The progress rate represents a rate at which the crack progresses toward the rear surface 240b from the glass cloth 201c.
A dimension L1 (refer to
The dimensions A1 and A2 of the present embodiment are set to 20 μm to 100 μm, the dimensions B1 and B2 are set to 10 μm to 30 μm, and the dimensions C1 and C2 are set to 45 μm to 160 μm.
In the present embodiment, a rate (wt %) of the mass of the resin material to the mass of the build-up layers 230 and 240 is larger than a rate (wt %) of the mass of the resin material to the mass of the core layer 220. Specifically, the rate (wt %) of the mass of the resin material to the mass of the build-up layers 230 and 240 is equal to or larger than 80%.
The thicknesses (dimensions B1 and B2 in
In the present embodiment, the thickness of the planar center portion in any one belly of the multiple bellies configuring the glass cloth 201a is set as the thickness of the glass cloth 201a. The thicknesses of the glass clothes 201b and 201c of the build-up layers 230 and 240 are set to 10 μm to 30 μm. A rate (wt %) of the mass of the filler 203 to the mass of the build-up layers 230 and 240 is larger than a rate (wt %) of the mass of the filler 203 to the mass of the core layer 220. The rate of the filler 203 to the build-up layers 230 and 240 is set for ensuring the sufficient thermal conductivities of the build-up layers 230 and 240.
The thicknesses of the glass clothes 201b and 201c are set for keeping a constant thermal conductivity or higher while ensuring a strength for preventing the glass clothes 201b and 201c from being broken. The glass clothes 201b and 201c having the thermal conductivity of 0.5 to 0.8 (W/m·k) are used.
The linear expansion coefficient of the resin layers 231 and 232 of the build-up layer 230 is set to be smaller than the linear expansion coefficient of the wires 2511, 2512, 2521, 2522, and 261 to 263. The linear expansion coefficient of the resin layers 240a and 240b of the build-up layer 240 is set to be smaller than the linear expansion coefficient of the wires 2511, 2512, 2521, 2522, 271, and 272. The linear expansion coefficient represents a rate at which a length of an object expands due to an increase in the temperature.
The linear expansion coefficient of the resin material (for example, epoxy resin) configuring the resin layers 231, 232, 241, and 242 according to the present embodiment is set to be larger than the linear expansion coefficient of the wires 2511, 2512, 2521, 2522, 261 to 263, 271, and 272. The linear expansion coefficient of the filler 203 configuring the resin layers 231, 232, 241, and 242 is smaller than the linear expansion coefficient of the resin material. The linear expansion coefficient of the resin layers 231 and 232 is set by regulating the rate of the filler 203 contained in the resin layers 231 and 232. The linear expansion coefficient of the resin layers 241 and 242 is set by regulating the rate of the filler 203 contained in the resin layers 241 and 242.
The configuration of the electronic device according to the present embodiment is described above. Subsequently, a method of manufacturing the above electronic device will be described with reference to
First, as illustrated in
Thereafter, as illustrated in
Subsequently, as illustrated in
Thereafter, as illustrated in
In this way, as illustrated in
Then, as illustrated in
In other words, in the present embodiment, the front surface inner layer wires 2511 and 2512 are configured by the metal layer M1 in which the metal foil 2161, the metal plating 2163, and the metal plating 2164 are laminated on each other, and the rear surface side inner layer wires 2521 and 2522 are configured by the metal layer M2 in which the metal foil 2162, the metal plating 2163, and the metal plating 2165 are laminated on each other. In
Thereafter, as illustrated in
In the above manner, a laminated body 2168 in which the metal plate 2166, the build-up layer 230, the front surface side inner layer wires 2511, 2512, the core layer 220, the rear surface side inner layer wires 2521, 2522, the build-up layer 230, and the metal plate 2167 are laminated on each other in order from the top is configured. Incidentally, the build-up layers 230 and 240 are temporarily cured, and have a fluidity in this state.
Subsequently, as illustrated in
Then, as illustrated in
Further, as illustrated in
Then, as illustrated in
In other words, in the present embodiment, the front surface side surface layer wires 261 to 263 are configured to have the metal plate 2166 and the metal plating 2169, and the rear surface side surface layer wires 271 and 272 are configured to have the metal plate 2167 and the metal plating 2169.
Subsequently, as illustrated in
Thereafter, although not particularly shown, the electronic components 2121 to 2123 are mounted on the lands 261 through the solders 2130. Wire bonding is performed between the power element 2121 as well as the control element 2122, and the lands 262, and the power element 2121 and the control element 2122 are electrically connected to the respective lands 262. Subsequently, the mold resin member 2150 is formed through the transfer mold technique or the compression mold technique using the mold so as to seal the lands 261, 262, and the electronic components 2121 to 2123.
According to the present embodiment described above, in the multi-layer substrate 210, the front surface side surface layer wires 261 to 263 are disposed on one side of the build-up layer 30 in the thickness direction (that is, the front surface 230a side). The front surface side inner layer wires 2511 and 2512 are disposed on the other side of the build-up layer 230 in the thickness direction (that is, the rear surface 230b side). The rear surface side surface layer wires 271 and 272 are disposed on one side of the build-up layer 240 in the thickness direction (that is, the front surface 240a side). The rear surface side inner layer wires 2521 and 2522 are disposed on the other side of the build-up layer 240 in the thickness direction (that is, the rear surface 240b side). The linear expansion coefficient of the resin layers 231 and 241 of the build-up layers 230 and 240 is lower than the linear expansion coefficient of the surface layer wires 261 to 263, 271, and 272, and the linear expansion coefficient of the glass clothes 201b and 201c is lower than the linear expansion coefficient of the resin layers 231 and 241. It is assumed that a dimension in the thickness direction between the front surface side surface layer wires 261 to 263 and the glass cloth 201b is A1, a thickness of the glass cloth 201b is B1, and a dimension between the rear surface 230b (that is, a surface on the front surface side inner layer wires 2511 and 2512 side) of the build-up layer 230 and the glass cloth 201b is C1. In this case, A1, B1, and C1 satisfy a size relationship of C1>A1>B1.
With the above configuration, in the build-up layer 230, the size relationship of A1>B1 is satisfied. Therefore, in the build-up layers 230 and 1230A having the same thickness (refer to
The linear expansion coefficient of the build-up layer 230 on the front surface side surface layer wires 261 to 263 side represents a rate at which a length of the build-up layer 230 on the front surface side surface layer wires 261 to 263 side changes due to an increase in the temperature. For that reason, when a distance between the front surface side surface layer wires 261 to 263 and the glass cloth 201b is set to be larger, a difference between the linear expansion coefficient of the build-up layer 230 on the front surface side surface layer wires 261 to 263 side and the linear expansion coefficient of the front surface side surface layer wires 261 to 263 can be reduced. For that reason, an internal stress can be restricted from being generated due to a change in the temperature on the interface between the build-up layer 230 and the front surface side surface layer wires 261 to 263. As a result, the crack (that is, a first conductor side starting point crack) can be restricted from being generated in the resin layer 231 due to the internal stress caused by the change in the temperature.
It is assumed that a dimension between the rear surface side surface layer wires 271, 272 and the glass cloth 201c in the build-up layer 240 is A2, and a thickness of the glass cloth 201c is B2. When it is assumed that a dimension between the surface 240b (that is, the rear surface side inner layer wires 2521 and 2522 side) of the build-up layer 240 and the glass cloth 201c is C2, A2, B2, and C2 satisfy the size relationship of C2>A2>B2.
As described above, in the build-up layer 240, the size relationship of A2>B2 is satisfied. For that reason, as with the build-up layer 230, as compared with a case in which the size relationship of A2<B2 is satisfied when the thickness of the build-up layer 240 is kept constant, an influence of the linear expansion coefficient of the glass cloth 201c can be reduced more than the linear expansion coefficient of the build-up layer 240 adjacent to the rear surface side surface layer wires 271 and 272.
The linear expansion coefficient of the build-up layer 240 adjacent to the rear surface side surface layer wires 271 and 272 represents a rate at which a length of the build-up layer 240 adjacent to the rear surface side surface layer wires 271 and 272 changes due to an increase in the temperature.
Therefore, when the size relationship of A2>B2 is satisfied in the build-up layer 240, the crack (that is, a first conductor side starting point crack) can be restricted from being generated in the resin layer 241 due to the internal stress caused by the change in the temperature, in the interface between the build-up layer 240 and the rear surface side surface layer wires 271, 272.
In the present embodiment, the size relationship of C1>A1 is satisfied. For that reason, as compared with a case in which the size relationship of A1>C1 is satisfied when the thickness of the build-up layer 230 is kept constant, a thickness of a region in which the progress rate of the crack is reduced due to the bridge effect of the glass cloth 201b becomes large. For that reason, when the crack generated by the internal stress progresses to the resin layer 232 from the resin layer 231 in the interface between the build-up layer 230 and the front surface side surface layer wires 261 to 263, a time required for the crack to progress to the rear surface 230b in the resin layer 232 is lengthened. Therefore, the strength of the overall build-up layer 230 against the crack (that is, the first conductor side starting point crack) generated by the internal stress can be improved.
In the present embodiment, the size relationship of C2>A2 is satisfied. For that reason, as compared with a case in which the size relationship of A2>C2 is satisfied when the thickness of the build-up layer 240 is kept constant, a thickness of a region in which the progress rate of the crack is reduced due to the bridge effect of the glass cloth 201c becomes large. For that reason, when the crack generated by the internal stress progresses to the resin layer 242 from the resin layer 241 in the interface between the build-up layer 240 and the rear surface side surface layer wires 271 to 272, a time required for the crack to progress to the rear surface 240b in the resin layer 242 is lengthened. Therefore, the strength of the overall build-up layer 240 against the crack (that is, the first conductor side starting point crack) generated by the internal stress can be improved.
With the above configuration, the multi-layer substrate 210 and the electronic device that perform both of the suppression of the generation of the crack (first conductor side starting point crack) generated by the internal stress and an improvement in the strength of the overall build-up layer 230 (240) against the crack can be provided.
In the present embodiment, if the crack is generated in the resin layer 231 of the build-up layer 230, there is a risk that the internal stress is generated in the resin layer 232 due to the crack of the resin layer 231, and the crack is generated in the resin layer 232. On the contrary, the build-up layer 230 satisfies the size relationship of C1>A1. For that reason, the strength of the resin layer 232 becomes large as compared with the build-up layer 230A (refer to
In the build-up layer 240, the size relationship of C2>A2 is satisfied. For that reason, if the crack is generated in the resin layer 241 of the build-up layer 240, the crack can be restricted from being generated in the resin layer 242 due to the crack of the resin layer 241 as with the build-up layer 230. With the above configuration, the crack can be restricted from being generated in the multi-layer substrate 210.
In addition, the build-up layer 230 satisfies the size relationship of C1>A1. Hence, when the crack is generated in the resin layer 231 in the thickness direction, as compared with the build-up layer 230 that satisfies the size relationship of A1>C1, the build-up layer 230 according to the present embodiment can reduce the dimension of the crack in the resin layer 231 in the thickness direction. Hence, a reduction in the electric insulating property of the build-up layer 230 due to the crack can be suppressed. Likewise, the build-up layer 240 according to the present embodiment satisfies the size relationship of C2>A2. A reduction in the electric insulating property of the build-up layer 240 due to the crack can be suppressed. With the above configuration, a reduction in the electric insulating property of the multi-layer substrate 210 due to the crack can be suppressed.
The present disclosure is not limited to the above embodiments, but can appropriately change within a scope of the claims.
For example, in the above first embodiment, in particular, the surroundings of the land 61 on which the passive element 123 is mounted are exemplified as a location where the crack is liable to be generated. The same is applied to the lands 61 on which the power element 121 or the control element 122 other than the passive element 123 is mounted. Therefore, the same advantages as those in the above embodiment can be obtained by deforming the glass cloth 30b within the build-up layer 30 toward the land 61 side at a position below the land 61 on which the power element 121 or the control element 122 is mounted.
In the above first embodiment, as an extrusion member for pushing up the glass cloth 30b toward the land 61 side, the inner layer wire 51 disposed below the land 61 is used. Alternatively, a member different from the inner layer wire 51, for example, a protruded member used only for extruding the glass cloth 30b, that is, a structure protruded from the front surface of the core layer 20 may be disposed as the extrusion member. For example, the structure forming the extrusion member can be made of resin. However, if the inner layer wire 51 is used as the extrusion member, because there is no need to provide the structure used only for extrusion of the glass cloth 30b, the manufacturing process can be simplified.
In the above respective embodiments, the core layer 20 and the build-up layers 30, 40 are each formed of a single layer of prepreg. Alternatively, the core layer 20 and the build-up layers 30, 40 may be each formed of multiple layers of prepreg.
In the above second embodiment, an example using the core layer 220 formed of the prepreg layer is described. Alternatively, the insulating layer may be formed of the core layer 220 made of ceramic.
In the second embodiment, the example in which the linear expansion coefficient of the respective resin layers 231 and 241 of the build-up layers 230 and 240 is set to be lower than the linear expansion coefficient of the surface layer wires 261 to 263, 271, and 272 is described. Alternatively, the linear expansion coefficient of the respective resin layers 231 and 241 of the build-up layers 230 and 240 may be set to be higher than the linear expansion coefficient of the surface layer wires 261 to 263, 271, and 272.
In the above second embodiment, the example in which the dimensions A1, B1, and C1 satisfy the size relationship of C1>A1>B1 is described. Alternatively, the dimensions A1, B1, and C1 may be set to satisfy the size relationship of C1≧A1≧B1. Alternatively, the dimensions A1, B1, and C1 may be set to satisfy the size relationship of C1>A1≧B1 or C1≧A1>B1.
In the above second embodiment, the example in which the dimensions A2, B2, and C2 satisfy the size relationship of C2>A2>B2 is described. Alternatively, the dimensions A2, B2, and C2 may be set to satisfy any one of the size relationships of C2>A2≧B2, C2≧A2>B2, and C2≧A2≧B2.
As described above, the present disclosure is not limited to the above embodiments, but can appropriately change without departing from a scope of the claims. The above respective embodiments are not irrelevant to each other, and can be appropriately combined with each other except that the combination is clearly improper, and the respective embodiments are not limited to the above illustrated examples.
Number | Date | Country | Kind |
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2013-094373 | Apr 2013 | JP | national |
2013-124970 | Jun 2013 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2014/002233 | 4/21/2014 | WO | 00 |