Patent Grant
8217270
This application is the National Phase of PCT/JP2006/316239, filed Aug. 18, 2006, which claims priority to Japanese Application No. 2005-241059, filed Aug. 23, 2005 and Japanese Application No. 2006-028655, filed Feb. 6, 2006, the disclosures of which are hereby incorporated by reference in their entirety.
This invention relates to a multilayer circuit board, and particularly relates to a multilayer circuit board for use in mounting thereon a large-scale integrated circuit element (LSI) and so on of an electronic device and to an electronic device using such a multilayer circuit board.
A signal rise speed has increased due to an improvement in operating speed of LSIs, such as central processing units (CPUs) and, in a wiring in packages and printed boards where those LSIs are mounted and input/output signals propagate, fine wiring lines each having a width of about 1 μm to several tens of μm have come to be often used in terms of a requirement for an increase in wiring density. Inevitably, interlayer insulating films in the packages and the printed boards have also come to be required to decrease in permittivity in terms of shortening charge/discharge times.
As a technique for reducing the permittivity of an interlayer insulating film of a multilayer circuit board such as a package or a printed board, it is considered to carry out a reduction in permittivity by dispersing hollow particles or porous particles in a resin forming the interlayer insulating film or causing a large number of pores to be contained in the resin. As such a technique, Patent Document 1 discloses a method of forming a film mixed with the foregoing hollow particles or porous particles at a portion where the reduction in permittivity is to be achieved.
However, according to studies by the inventors of this invention, if a technique described in Patent Document 1 is simply applied to an interlayer insulating film forming a package or a printed board, a large number of irregularities are formed on a surface due to porous bodies, hollow particles, or pores exposed on the surface and thus, in the package or printed board wiring particularly required to be miniaturized, a problem arises which includes pattern shape failure, such as disconnection or defect, and a problem also arises that a current path in the wiring is prolonged due to irregularities caused in the wiring by the foregoing irregularities, thus leading to an increase in loss. Since Patent Document 1 refers to nothing about them and also describes nothing about a relationship between the sizes or the like of the wiring and the porous bodies to be dispersed/mixed, no solving method has been found from this document.
It is therefore an object of this invention to provide a multilayer circuit board that comprises a low-permittivity interlayer insulating film and that can significantly improve the performance such as signal transmission characteristics of the multilayer circuit board, such as a package or a printed board because the surface in contact with the interlayer insulating film has no irregularities so that no reduction occurs in production yield or no degradation occurs in high-frequency signal transmission characteristics.
Further, it is another object of this invention to provide an electronic device using the multilayer circuit board having the foregoing advantage.
According to one aspect of this invention, there is provided a multilayer circuit board which includes, on a base member, plural of wiring layers and at least one insulating layer located between the plural wiring layers. At least part of the insulating layer includes a porous insulating layer and a non-porous insulating layer formed on at least one surface of the porous insulating layer. In the multilayer circuit board, the porous insulating layer contains at least any of materials selected from a porous material group consisting of a porous substance, an aerogel, a porous silica, a porous polymer, a hollow silica, and a hollow polymer. The non-porous insulating layer is free from the porous material group.
Herein, in the present invention, the porous insulating layer and the non-porous insulating layer satisfy a relationship of ε1/d1<ε2/d2, wherein a relative permittivity and a thickness of the porous insulating layer are given by ε1 and d1, respectively, and a relative permittivity and a thickness of the non-porous insulating layer are given by ε2 and d2, respectively. Preferably, the thickness d1 of the porous insulating layer and the thickness d2 of the non-porous insulating layer satisfy a relationship of d1>d2.
Furthermore, in the porous insulating layer used in the multilayer circuit board, it is preferable that the material selected from the porous material group is a particulate material having a diameter d satisfying d<0.1×dc, where a minimum wiring thickness t1 or a minimum wiring width W1 of the wiring layer in contact with the insulating layer, whichever is smaller, is given by dc, and that the particulate material is dispersed in a synthetic resin to thereby form the porous insulating layer.
In the present invention, it is preferable that the synthetic resin is at least one selected from the group consisting of an epoxy resin, a phenol resin, a polyimide resin, a polyester resin, a fluorine resin, a denatured polyphenylether resin, a bismaleimide triazine resin, a denatured polyphenylene oxide resin, a silicon resin, an acrylic resin, a benzocyclobutene resin, a polyethylene naphthalate resin, a polycycloolefin resin, a polyolefin resin, a cyanate ester resin, a melamine resin, and an acrylic resin.
In the multilayer circuit board according to this invention, the insulating layer and the wiring layer have a relationship of R<0.5×δ, where R represents a mean square surface roughness, formed in a wiring width direction, of a portion of the insulating layer that is in contact with a wiring line of the wiring layer and δ represents a skin depth of a current flowing in the wiring line.
In the multilayer circuit board according to this invention, it is preferable that signal attenuation in a microstrip line is 0.5 dB/cm or less at an operating frequency of 10 GHz.
According to another aspect of this invention, there is provided an electronic device which uses the multilayer circuit board described above.
According to a multilayer circuit board of this invention, since a non-porous insulating film is formed at the surface, in contact with a wiring line, of a low-permittivity interlayer insulating film made of a porous substance, no reduction occurs in production yield or no degradation occurs in high-frequency signal transmission characteristics and, therefore, it is possible to significantly improve the performance, such as signal transmission characteristics of the multilayer circuit board, such as a package or a printed board.
Hereinbelow, a description will be made as regards one example of a preferred embodiment of a multilayer circuit board according to this invention. This board is configured such that a non-porous insulating layer is formed on one side or both sides of a porous insulating layer containing a porous substance in its structure.
As schematically shown in
With this configuration, since the porous material is not exposed at a interface between the wiring layer 3 laminated on the insulating layer and the insulating layer 2, it is possible to suppress occurrence of irregularities in the wiring caused by the porous material and thus to suppress pattern shape failure such as disconnection, defect, or swelling of the wiring.
In order to avoid degradation of characteristics of a signal propagating in the wiring with such a configuration, given that a relative permittivity and a thickness of the porous insulating layer 1 are ε1 and d1, respectively, and the relative permittivity and the thickness of the non-porous insulating layer 2 are ε2 and d2, respectively, it is preferable to satisfy a relationship of ε1/d1<ε2/d2 and, further, it is preferable to satisfy a relationship of d1>d2 between the thickness d1 of the porous insulating layer 1 and the thickness d2 of the non-porous insulating layer 2.
This will be explained using
It is seen that when ε1/d1<ε2/d2 (i.e. (ε2/d2)/(ε1/d1)>1), it is possible to obtain a permittivity reduction effect in this invention. That is, it is possible to obtain the permittivity reduction effect while suppressing the influence of irregularities caused by the porous material.
Although the permittivity reduction effect tends to be obtained as the thickness d2 of the non-porous insulating layer decreases, this is not preferable because the influence of irregularities by the porous material tends to increase as d2 decreases. As a preferable range of d2, it is preferable that d2 be as small as possible with respect to the thickness d1 of the porous insulating layer, while, it is preferable that d2 be greater than the pore size in the porous insulating layer or the particle diameter when the porous material is in the form of particles. That is, given that the pore size (or the particle size when the porous particles are used as the porous material) is dp, it is preferable that dp<d2<d1. With this configuration, it is possible to minimize the irregularities caused by the porous material.
As the surface roughness of the non-porous insulating layer, it is preferable that R<0.5×δ where R represents the mean square surface roughness, formed in a wiring width direction, of a portion of the insulating layer that is in contact with a wiring line of the wiring layer and δ represents a skin depth of a current flowing in the wiring line. Herein, given that the frequency of a signal is f, the magnetic permeability of a wiring material is μ, and the conductivity of the wiring material is σ, the skin depth δ is expressed as δ=√{square root over ((1/(πfμσ)))}.
With this configuration, it is possible to minimize the signal attenuation caused by a prolongation of a current path of a skin current due to the irregularities, thereby providing a multilayer circuit board excellent in high-frequency characteristics. dp<d2 is preferable also for realizing such a surface roughness.
Further, another configuration of this invention is such that the material selected from the foregoing porous material group is a particulate material having a diameter d where d<0.1×dc, wherein a minimum wiring thickness t1 or a minimum wiring width W1 of the wiring layer 3 in contact with the insulating layer, whichever is smaller, is given by dc, and this particulate material is dispersed in a synthetic resin to thereby form the porous insulating layer.
Even when the porous material is a non-particulate material such as a porous polymer, the function of this invention is not impeded. However, when a particulate material is used, the porous insulating layer can be formed by mixing the particulate material into a synthetic resin and therefore it is preferable in view of simplifying a manufacturing process. In this case, in order to uniformly expect an effect of the particulate material from the wiring line formed in the wiring layer, it is preferable that the particulate material be sufficiently small with respect to the wiring width and, according to the studies by the inventors of this invention, it is sufficient if d<0.1×dc.
In order to sufficiently obtain the effect of the porous material, it is preferable that the relative permittivity of the synthetic resin itself be small. Such a material may be preferably one of an epoxy resin, a phenol resin, a polyimide resin, a polyester resin, a fluorine resin, a denatured polyphenylether resin, a bismaleimide triazine resin, a denatured polyphenylene oxide resin, a silicon resin, an acrylic resin, a benzocyclobutene resin, a polyethylene naphthalate resin, a polycycloolefin resin, a polyolefin resin, a cyanate ester resin, a melamine resin, and an acrylic resin. Among these materials, the polyolefin resin, the polycycloolefin resin, the fluorine resin, or the like is more preferable because the water absorbency is small and the time-dependent change in relative permittivity is small.
Now, specific examples of this invention will be described.
Example 1 of this invention will be described with reference to the figures.
At first, as shown in
Then, as shown in
The laminate of the porous insulating layer 1 and the non-porous insulating layer 2 was formed in the following manner.
At first, a porous material, such as a porous silica or a hollow silica, having pores inside was mixed and dispersed, along with a surfactant, into a 1:1 volume ratio mixed solvent of xylene and methyl ethyl ketone, thereby obtaining a porous material slurry. In this example, porous silica particles with a particle size of 50 nm were used. For the mixing/dispersion, a planetary stirrer, a homogenizer, or ultrasonic irradiation can be suitably used. Then, using a planetary stirrer, the porous material slurry was mixed into a resin varnish obtained by dissolving a precursor of a thermosetting polyolefin resin into a 1:1 volume ratio mixed solvent of xylene and methyl ethyl ketone. In the mixing, the porous silica was in an amount of 70 parts by weight with respect to 100 parts by weight of the solid resin varnish. Although the mixing ratio can be optionally adjusted depending on the effective permittivity of a porous insulating layer to be obtained, 10 parts by weight to 100 parts by weight are preferable. If the mixing amount of the porous silica is small, it is difficult to obtain the permittivity reduction effect of this invention, while, if it is large, breakage or the like occurs, thus not preferable in terms of workability. An obtained porous material-dispersed resin varnish was cast-molded using a doctor blade or the like and treated in a 90° C. N2 oven for 30 minutes to evaporate the excessive solvent, thereby obtaining a 25 μm porous insulating layer dry film. Then, a resin varnish obtained by dissolving a precursor of a thermosetting polyolefin resin into a 1:1 volume ratio mixed solvent of xylene and methyl ethyl ketone was laminated on the dry film by the casting method and treated in a 90° C. N2 oven for 30 minutes to evaporate the excessive solvent, thereby obtaining a laminate of a porous insulating layer 1 and a non-porous insulating layer 2 having a total thickness of 30 μm. In the formation of this laminate, relative permittivities ε1 and ε2 of individual cured bodies of a porous insulating layer 1 and a non-porous insulating layer 2 separately formed by the same methods (individual cured bodies obtained by curing a porous insulating layer 1 of 100 μm and a non-porous insulating layer dry film at 150° C., respectively) were measured by a cavity resonator perturbation method to be ε1=1.6 and ε2=2.5 at 10 GHz. In Example 1 of this invention, the porous insulating layer 1 and the non-porous insulating layer 2 were laminated by the casting method, but use may be made of lamination by a roll-to-roll method or of a technique of breeding out a resin single layer at the surface layer using the convection or flow of a resin generated by heat treatment in curing baking. Further, although the non-porous insulating layer 2 was provided on one side of the porous insulating layer 1 in Example 1 of this invention, the function of this invention can be achieved even if provided on both sides thereof.
A via hole leading to the first wiring layer 3a was formed in the formed first insulating layer 5 by a known technique. As the known technique, use can be preferably made of a carbon dioxide laser, a YAG laser, a harmonic YAG laser, an excimer laser, or the like. Then, as shown in
After obtaining second insulating layers 5b, third wiring layers 3c, and third insulating layers 5c by repeatedly using the foregoing techniques, via holes were formed by the foregoing laser, a through hole for achieving electrical connection between the front and back sides of the base member was processed using a drill, a router, or the like, and fourth wiring layers were obtained by the same techniques as described above, thereby obtaining the structure shown in
Thereafter, solder resists were coated on both surfaces of the obtained circuit board, openings were provided at external take-out terminal portions by a photolithography method, and terminal electrodes (not shown) were formed by a known nickel plating method or metal plating method, thereby obtaining a multilayer circuit board of this example.
In Example 1 described above, use was made of the technique of dispersing the particulate substance such as the porous silica or the hollow silica into the resin to form the porous insulating layer. However, use may be made of a plate-like molded product of the porous silica, the hollow silica, or the like having a plate shape or a film shape. In this case, the plate-like molded product is used as a porous insulating layer and a non-porous insulating layer of a resin or the like is formed on at least one surface thereof by a lamination method or the like, thereby obtaining an insulating layer of the example of this invention.
A plate-like molded product forming method is such that the plate-like molded product is obtained by, according to a known technique, mixing hollow particles such as a hollow resin or the like, for example, the porous silica, the hollow silica, silica particles, a particulate cured resin, a resin precursor, or the like and a binder component such as silicic acid and then baking them.
With this configuration, since pores inside the particles and pores between the particles both can be used, it is possible to efficiently achieve a reduction in permittivity while maintaining the mechanical strength.
In this case, it is preferable that there be a relationship of t1<d2 between the wiring thickness t1 and the non-porous insulating layer thickness d2. With this configuration, the non-porous resin flows into between the wiring lines in the formation of the laminate as the multilayer board and thus it becomes possible to obtain excellent adhesiveness and strength.
A polyolefin resin having a relative permittivity of 2.2 was laminated to a thickness of 25 μm on each of both sides of a porous silica plate having a thickness of 100 μm and a porosity of 50% using the lamination method, thereby obtaining an insulating layer of Example 2 of this invention. The relative permittivity of this insulating layer was measured by a parallel-plate method to be 2.0. Further, the thermal expansion coefficient of this insulating layer in a direction parallel to the surface thereof was measured by a TMA method to be 10 ppm/° C. near room temperature, while it was 60 ppm/° C. in the case of the polyolefin resin alone. According to the example of this invention, it is possible to improve the thermal properties while reducing the relative permittivity.
Multilayer circuit boards were manufactured using the foregoing technique of Example 1 while changing the filling amount of the porous silica in a porous insulating layer from 0 parts by weight (no addition) to 100 parts by weight. The insulating layer thickness was set to 30 μm equal to that in Example 1 The wiring thickness was set to 15 μm. The effective relative permittivity of laminates of porous insulating layers 1 with respective parts by weight of the porous silica and non-porous insulating layers 2 was measured and the characteristics of
From
A multilayer circuit board was prepared for comparison using the same technique as that in Example 1, but with no formation of a non-porous insulating layer 2, and the signal transmission characteristics thereof were compared with those of the multilayer circuit board obtained in Example 3 described above. The content of the porous silica was set to 70 parts by weight equal to that in Example 1. In order to set the insulating layer thickness to be equal to that of the multilayer circuit board obtained in Example 3, the thickness of a porous insulating layer was set to 30 μm.
The surface roughness of a portion, in contact with a wiring line, of the insulating layer with no formation of the non-porous insulating layer 2 (i.e. only the porous insulating layer) was measured to be 2.5 μm in mean square roughness (Rrms) (Comparative Example). On the other hand, the surface roughness of a portion, in contact with a wiring line, with the formation of the non-porous insulating layer 2 was measured to be 50 nm in mean square roughness (Rrms).
As described above, a multilayer circuit board according to this invention is optimal as a circuit board, for mounting thereon circuit elements such as an LSI, of an electronic device.
| Number | Date | Country | Kind |
|---|---|---|---|
| 2005-241059 | Aug 2005 | JP | national |
| 2006-028655 | Feb 2006 | JP | national |
| Filing Document | Filing Date | Country | Kind | 371c Date |
|---|---|---|---|---|
| PCT/JP2006/316239 | 8/18/2006 | WO | 00 | 2/22/2008 |
| Publishing Document | Publishing Date | Country | Kind |
|---|---|---|---|
| WO2007/023742 | 3/1/2007 | WO | A |
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|---|---|---|---|
| 6734375 | Kawakita et al. | May 2004 | B2 |
| 7294393 | Murai et al. | Nov 2007 | B2 |
| 20030129440 | Kawashima et al. | Jul 2003 | A1 |
| 20030214042 | Miyazawa | Nov 2003 | A1 |
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| Number | Date | Country | |
|---|---|---|---|
| 20090120673 A1 | May 2009 | US |
