This application claims the priority benefit of Taiwan application serial no. 101128619, filed on Aug. 8, 2012. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
1. Field of the Invention
The invention relates to a package structure and a manufacturing method thereof, and more particularly, to a package carrier and a manufacturing method thereof.
2. Description of Related Art
The purpose of chip package is to protect exposed chips, to reduce contact density in a chip, and to provide good thermal dissipation for chips. A leadframe serving as a carrier of a chip is usually employed in a conventional wire bonding technique. As contact density in a chip gradually increases, the leadframe which is unable to satisfy current demands on the high contact density is replaced by a package carrier which can achieve favorable contact density. Besides, the chip is packaged onto the package carrier by conductive media, such as conductive wires or bumps.
Take a light-emitting diode (LED) package structure commonly used at present time as an example. A LED chip has to be packaged before used, and the LED chip generates a large amount of heat when emitting light. Therefore, if the heat generated by the LED chip cannot be dissipated and keeps accumulating in the LED package structure, a temperature of the LED package structure would keep rising. In this way, the LED chip may be overheated, which causes luminance decay and shortens operating life thereof or even causes permanent damage in server cases.
As the integration level of integrated circuits increases, due to the mismatch of thermal expansion coefficient between the LED chip and the package carrier, the phenomena of thermal stress and warpage become more and more severe, and that causes the reliability between the LED chip and the package carrier to decrease. Therefore, in addition to enhancing the light extraction efficiency, the current package technology focuses on decreasing the thermal stress of the package structure to increase the operating life and the reliability of the package structure.
The invention provides a package carrier which effectively decreases a thermal expansion difference when the package carrier carries a heating element and increases a using reliability.
The invention provides a manufacturing method of a package carrier for manufacturing the aforementioned package carrier.
The invention provides a manufacturing method of a package carrier. The manufacturing method includes the following steps. An insulation substrate is provided. The insulation substrate has an upper surface, a lower surface opposite to the upper surface, a plurality of cavities and a plurality of through holes. The cavities are located at the lower surface, and the through holes pass through the insulation substrate and respectively communicate with the cavities to define a plurality of vias. A conductive material is formed in the vias, wherein the conductive material fills up the vias to define a plurality of conductive posts. An insulation layer is formed on the upper surface of the insulation substrate. The insulation layer has a top surface relatively far from the upper surface of the insulation substrate and a plurality of blind vias extending from the top surface to the conductive posts. A patterned circuit layer is formed on the top surface of the insulation layer. The patterned circuit layer fills up the blind vias and is connected to the conductive posts. The patterned circuit layer exposes a portion of the top surface of the insulation layer. A solder mask layer is formed on the patterned circuit layer. The solder mask layer covers the patterned circuit layer and the exposed portion of the top surface of the insulation layer. The solder mask layer has a plurality of openings, wherein the openings expose a portion of the patterned circuit layer so as to define a plurality of pads.
In an embodiment of the invention, a material of the insulation substrate includes ABF resin, polymeric materials, silicon fillers or epoxy resin.
In an embodiment of the invention, a method of forming the cavities of the insulation substrate includes laser drilling or injection molding.
In an embodiment of the invention, a method of forming the through holes of the insulation substrate includes laser drilling.
In an embodiment of the invention, steps of forming the conductive material in the vias include: performing an electroless plating process to form the conductive material on the upper surface, the lower surface and in the vias of the insulation substrate, wherein the conductive material covers the upper surface and the lower surface of the insulation substrate and fills up the vias; and removing a portion of the conductive material on the upper surface and the lower surface of the insulation substrate to expose the upper surface and the lower surface of the insulation substrate so as to define the conductive posts.
In an embodiment of the invention, each of the conductive posts has a first surface and a second surface opposite to each other. The first surface of each of the conductive posts and the upper surface of the insulation substrate are coplanar, and the second surface of each of the conductive posts and the lower surface of the insulation substrate are coplanar.
In an embodiment of the invention, a method of forming the insulation layer includes thermal compression bonding.
In an embodiment of the invention, a material of the insulation layer includes ABF resin, polymeric materials, silicon fillers or epoxy resin.
In an embodiment of the invention, a method of forming the blind vias of the insulation layer includes laser drilling.
In an embodiment of the invention, a method of forming the patterned circuit layer includes electroless plating or a semi-additive process.
In an embodiment of the invention, the manufacturing method further includes forming a surface treatment layer on the pads after the solder mask layer is formed.
In an embodiment of the invention, the surface treatment layer includes an electroplated gold layer, an electroplated silver layer, a reduced gold layer, a reduced silver layer, an electroplated nickel-palladium-gold layer, a nickel-palladium-gold layer or an organic solderability preservatives (OSP) layer.
The invention provides a package carrier adapted for carrying a heating element. The package carrier includes an insulation substrate, a plurality of conductive posts, an insulation layer, a patterned circuit layer and a solder mask layer. The insulation substrate has an upper surface, a lower surface opposite to the upper surface, a plurality of cavities and a plurality of through holes. The cavities are located at the lower surface, and the through holes pass through the insulation substrate and respectively communicate with the cavities to define a plurality of vias. The conductive posts are respectively disposed in the vias, and each of the conductive posts has a first surface and a second surface opposite to each other. The first surface of each of the conductive posts and the upper surface of the insulation substrate are coplanar, and the second surface of each of the conductive posts and the lower surface of the insulation substrate are coplanar. An insulation layer is disposed on the upper surface of the insulation substrate. The insulation layer has a top surface relatively far from the upper surface of the insulation substrate and a plurality of blind vias extending from the top surface to the conductive posts. The patterned circuit layer is disposed on the top surface of the insulation layer and exposes a portion of the top surface of the insulation layer. The patterned circuit layer fills up the blind vias and is connected to the conductive posts. A solder mask layer is disposed on the patterned circuit layer. The solder mask layer covers the patterned circuit layer and the exposed portion of the top surface of the insulation layer. The solder mask layer has a plurality of openings, wherein the openings expose a portion of the patterned circuit layer so as to define a plurality of pads, and the heating element is disposed on the pads.
In an embodiment of the invention, the package carrier further includes a surface treatment layer disposed on the pads.
In an embodiment of the invention, the surface treatment layer includes an electroplated gold layer, an electroplated silver layer, a reduced gold layer, a reduced silver layer, an electroplated nickel-palladium-gold layer, a nickel-palladium-gold layer or an OSP layer.
Based on the above, the package carrier of the invention uses an insulation substrate with an ideal thermal expansion coefficient as a core. Therefore, when the package carrier is used in the package of a heating element (such as a chip) subsequently, a difference in thermal expansion coefficient between the package carrier and the heating element carried on the package carrier is reduced effectively, which prevents a stress between the heating element and the insulation substrate from increasing because of a too great difference in thermal expansion coefficient therebetween and effectively prevents the peeling and damage of the heating element from happening, thereby enhancing the using reliability of the package carrier.
In order to make the aforementioned features and advantages of the invention more comprehensible, embodiments accompanying figures are described in details below.
The accompanying drawings are included to provide further understanding and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments and, together with the description, serve to explain the principles of the invention.
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Since the present embodiment uses the insulation substrate 110 as the core of the package carrier 100, wherein the insulation substrate 110 has an ideal thermal expansion coefficient (similar to a thermal expansion coefficient of a heating element used subsequently, for example), when the package carrier 100 is used in the package of a heating element (not shown) subsequently, a difference in thermal expansion coefficient between the package carrier 100 and the heating element carried on the package carrier 100 is reduced, which prevents a stress between the heating element and the insulation substrate 110 from increasing because of a too great difference in thermal expansion coefficient therebetween and effectively prevents the peeling and damage of the heating element from happening, thereby enhancing the using reliability of the package carrier 100. In addition, since the patterned circuit layer 140 of the present embodiment is formed by electroless plating or by the semi-additive process, a width of the patterned circuit layer 140 is able to meet the specification of fine circuits.
In detail, the heating element 200 (such as a semiconductor chip) may be electrically connected to the surface treatment layer 160 by flip chip bonding. Since the present embodiment uses the insulation substrate 110 with an ideal thermal expansion coefficient as the core of the package carrier 100, a difference in thermal expansion coefficient between the package carrier 100 and the heating element 200 is gradually reduced. In this way, a stress between the heating element 200 and the package carrier 100 can be prevented from increasing because of a too great difference in thermal expansion coefficient therebetween, and the peeling and damage of the heating element 200 is effectively prevented from happening, thereby enhancing the using reliability of the package carrier 100. Furthermore, when the heating element 200 is disposed on the package carrier 100, heat generated by the heating element 200 is transmitted to the outside rapidly through the surface treatment layer 160, the patterned circuit layer 140 and the conductive posts 120a. In this way, the package carrier 100 of the present embodiment effectively dissipates the heat generated by the heating element 200, thereby enhancing the using efficiency and operating life of the heating element 200. In addition, a plurality of solder balls 210 may be disposed on the lower surface 114 of the insulation substrate 110 of the package carrier 100 of the present embodiment, and the package carrier 100 may be electrically connected to an external circuit (not shown) through the solder balls 210, which effectively enhances the application of the package carrier 100.
In summary of the above, the package carrier of the invention uses an insulation substrate with an ideal thermal expansion coefficient as a core. Therefore, when the package carrier is used in the package of a heating element (such as a chip) subsequently, a difference in thermal expansion coefficient between the package carrier and the heating element carried on the package carrier is reduced effectively, which prevents a stress between the heating element and the insulation substrate from increasing because of a too great difference in thermal expansion coefficient therebetween and effectively prevents the peeling and damage of the heating element from happening, thereby enhancing the using reliability of the package carrier.
Although the invention has been described with reference to the above embodiments, they are not intended to limit the invention. It is apparent to people of ordinary skill in the art that modifications and variations to the invention may be made without departing from the spirit and scope of the invention. In view of the foregoing, the protection scope of the invention will be defined by the appended claims.
Number | Date | Country | Kind |
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101128619 | Aug 2012 | TW | national |