This application claims the priority benefit of China application serial no. 202311025089.2, filed on Aug. 14, 2023. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of this specification.
The present disclosure relates to the field of semiconductors, and particularly relates to a package structure and a manufacturing method thereof.
Power management chips are responsible for the conversion, distribution, detection, and other power management of electrical energy in the electronic equipment systems. The power management chips are indispensable to the electronic systems, and their performance has a direct impact on the performance of the entire machine.
Traditional power management chips, adopt a package method of ECP (also referred to as Embedded Chip Package, which refers to embedding the chip or device into the substrate) in order to reduce the package size, where the inductor is then mounted on the substrate. In the prior art, the chip package structure with inductor generates a lot of heat energy during long-term use. Since the chip is embedded in the substrate, its heat dissipation performance is poor and the heat dissipation speed is low, which can easily cause chip damage or aging, greatly reducing the service life of the chip.
In view of the above problems, the present disclosure proposes a package structure and a manufacturing method thereof.
The technical solution adopted by the present disclosure is as follows:
A package structure, including:
The magnetic encapsulation layer contains soft magnetic metal powder and has strong thermal conductivity. The magnetic encapsulation layer directly encapsulates the chip and can conduct heat well. The winding and the magnetic encapsulation layer form an inductor structure to realize an integrated package of the chip and the inductor. A distance between the chip and the inductor is smaller, which can achieve better power management performance and has lower package costs.
In some embodiments, the first surface of the substrate has a first pad, a second pad, and a third pad. The winding is connected to the first pad, the chip is connected to the second pad, and the component is connected to the third pad.
The winding, the chip, and the component can be connected to corresponding pads in a variety of ways, such as by coating or printing solder paste, flux, and other materials on the corresponding connection areas, and then welding them through various welding processes, such as reflow welding.
In some embodiments, a glue material is filled between the chip and the substrate.
Filling the glue material between the chip and the substrate can make the structure stronger and more reliable.
In some embodiments, the winding has a spiral portion and a connecting portion connected to the spiral portion. The connecting portion is electrically connected to the substrate, and at least one of the chip and the component is located in a space formed by the spiral portion.
In some embodiments, the chip and the component are both located in the space formed by the spiral portion.
Such a setting can reduce the product package size and increase the product design space. Smaller distances between the chip and the winding allow for better power management performance.
In some embodiments, the winding has the spiral portion and the connecting portion connected to the spiral portion. The connecting portion includes a vertical portion and a horizontal portion connected to each other. The connecting portion is electrically connected to the substrate through the horizontal portion.
The connecting portion is a pin of the winding, which is bent 90 degrees to form the horizontal portion. The horizontal portion is used to increase a projection area of the standing pin and improve the workability of the winding mounting.
In some embodiments, an outer diameter of the spiral portion is R, a length of the horizontal portion is L, and ¼≤R≤L≤R.
The present disclosure also discloses a manufacturing method of a package structure, including the following steps:
In some embodiments, the insulating magnetic material may be a powder or a liquid, and may be formed by molding, potting, or other encapsulation methods.
In some embodiments, the step S2 further includes filling a glue material between the chip and the substrate.
In some embodiments, the winding has a spiral portion and a connecting portion connected to the spiral portion. The connecting portion is electrically connected to the first pad. At least one of the chip and the component is located in a space formed by the spiral portion.
In some embodiments, the winding has the spiral portion and the connecting portion connected to the spiral portion. The connecting portion includes a vertical portion and a horizontal portion connected to each other. The connecting portion is electrically connected to the first pad through the horizontal portion.
In some embodiments, an outer diameter of the spiral portion is R, a length of the horizontal portion is L, and ¼R≤L≤R.
The beneficial effects of the present disclosure are as follows: the magnetic encapsulation layer contains soft magnetic metal powder, the filler of the general encapsulation material is silicon dioxide, and the thermal conductivity of the soft magnetic metal powder is more than 5 times the thermal conductivity of silicon dioxide. Therefore, the magnetic encapsulation layer has strong thermal conductivity, and it directly encapsulates the chip and can conduct heat well. The winding and the magnetic encapsulation layer form the inductor structure to realize the integrated package of the chip and the inductor. The distance between the chip and the inductor is smaller, which can achieve better power management performance and has lower package costs.
In order to make the purpose, technical solutions, and advantages of the embodiments of the present disclosure clearer, the technical solutions in the embodiments of the present disclosure will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present disclosure. Evidently, the embodiments to be described are some rather than all embodiments of the present disclosure. The components of the embodiments of the present disclosure generally described and illustrated in the accompanying drawings may be arranged and designed in a variety of different configurations.
In the description of the present disclosure, it should be understood that the terms “inside,” “outside,” and the like indicate orientations or position relationships which are based on the orientations or position relationships shown in the accompanying drawings, or the orientations or position relationships in which the product of the present disclosure is usually placed when in use, and these terms are merely for ease and brevity of the description, instead of indicating or implying that the devices or elements referred to shall have a particular orientation and shall be structured and operated based on the particular orientation. Accordingly, these terms shall not be construed as limiting the present disclosure. In addition, the terms “first,” “second,” and the like are merely for illustration purpose, and shall not be construed as indicating or implying a relative importance.
In the description of the present disclosure, unless otherwise explicitly specified and defined, the terms “disposed” and “connected” shall be understood in a broad sense, e.g., a fixed connection, a detachable connection, or an integral connection; or a direct connection, an indirect connection via an intermediate medium, or an internal connection between two elements. Persons of ordinary skill in the art may understand specific meanings of the above terms in the present disclosure according to the actual circumstances and contexts.
The present disclosure is described in detail below with reference to the accompanying drawings.
As shown in
In some embodiments, the winding 2 and the magnetic encapsulation layer 5 form an inductor structure.
In some embodiments, the chip may include a power management chip.
In some embodiments, the winding may be a normal metal coil, or may be an enameled wire coated with an insulating varnish.
In some embodiments, the magnetic encapsulation layer includes soft magnetic metal powder, and the ferromagnetic material commonly includes iron (Fe), cobalt (Co), nickel (Ni), or an alloy combination thereof.
As shown in
The winding 2, the chip 3, and the component 4 can be connected to the corresponding pads in various ways, such as by coating or printing solder paste, flux, and other materials on the corresponding connection areas, and then welding them through various welding processes, such as reflow welding.
As shown in
As shown in
In some embodiments, at least one of the chip 3 and the component 4 is located in a space formed by the spiral portion 21.
As shown in
As shown in
As shown in
The embodiment also discloses a manufacturing method of a package structure, including the following steps:
In some embodiments, the insulating magnetic material may be powder or liquid, and may be formed by molding, potting, or other encapsulation methods.
As shown in
In some embodiments, the manufacturing method of the package structure is used to manufacture the package structure of
In the package structure of the present disclosure, the magnetic encapsulation layer 5 contains the soft magnetic metal powder and has strong thermal conductivity. The magnetic encapsulation layer 5 directly encapsulates the chip 3, and can conduct heat well. The winding 2 and the magnetic encapsulation layer 5 form the inductor structure to realize the integrated package of the chip 3 and the inductor. The distance between the chip and the inductor is smaller, which can achieve better power management performance and has lower package costs.
The above description is only a preferred embodiment of the present disclosure, and does not limit the patent protection scope of the present disclosure. Any equivalent structural transformation made by using the contents of the present disclosure and the drawings, directly or indirectly used in other related technical fields, is also included in the protection scope of the present disclosure.
Number | Date | Country | Kind |
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202311025089.2 | Aug 2023 | CN | national |