The present invention relates to a power semiconductor device.
A power semiconductor device for controlling and converting a high voltage and a large current has been recently widely used in the power electronics field including power, transportation, and home electric appliances and it is requested to further improve the performance of the device and further decrease the size of the device. Therefore, research and development have been positively performed in order to meet the above requests.
Moreover, the power semiconductor device 40 has electrode terminals 50 and 51 insert-formed in a case 49 as external-connection terminals and these terminals 50 and 51 are connected to the circuit patterns 43 and 45 through wires 52 and 53 respectively.
As shown in
However, to supply a large current to the circuit patterns 43 and 45 formed on the insulating substrates 41 and 42 of the conventional power semiconductor device 40 having the above structure, there are problems that it is necessary to increase the widths of the circuit patterns 43 and 45 and thereby, the device increases in width. Moreover, because bonding wires 52 and 53 are connected between the electrode terminal 50 and circuit pattern 43, and between the electrode terminal 51 and circuit pattern 45 respectively, there are problems that many wires are necessary and the time required for wire-bonding increases in order to supply a large current between them.
It is therefore an object of the present invention to provide a power semiconductor device to which a large current can be applied and which can be compactly and more simply fabricated.
In an aspect of the present invention, there is provided a power semiconductor device with an electrode structure for taking out electrodes from a power semiconductor element mounted on one of a plurality of circuit patterns formed on an insulating substrate inside of a case up to an external-connection terminal exposed outside of the case, in which the external-connection terminal is insert-formed on the case and exposed at its one end and joined at its other end to a circuit pattern different from a circuit pattern on which the power semiconductor element is mounted, and connected with the power semiconductor element through a wire member bonded to the face opposite to the junction face of the terminal. Wire member may be bonded to an external-connection terminal in an area in which the terminal connection terminal is joined to a circuit pattern. Furthermore, the external-connection terminal may be discontinuously connected to the circuit pattern. Furthermore, said external-connection terminal and the circuit pattern may be joined by a conductive material at a part of the junction face between them, and insulated from each other at remaining parts of the junction face.
Furthermore, the external-connection terminal may have a size smaller than the surface of the circuit pattern at the face to be joined to the circuit pattern. Furthermore, the external-connection terminal may have a size larger than the surface of the circuit pattern at the face to be joined to the circuit pattern.
Embodiments of the present invention are described below while referring to the accompanying drawings.
In case of first embodiment, first and second external-connection terminals 1 and 13 are insert-molded into a case 9 and exposed to the outside of the case at their one ends while they are joined at their other ends to a circuit pattern different from the second circuit pattern 5 on which the power semiconductor element 7 is mounted. Specifically, the first external-connection terminal 1 is joined to the first circuit pattern 4 through a conductive junction material 14 and the second external-connection terminal 13 is joined to the third circuit pattern 6 through a conductive junction material 16. In
As shown in
In case of the power semiconductor device 10 with above configuration, the current applied to the exposed portion 1a of the external-connection terminal 1 flows through the junction portion 1b of the terminal 1 and is supplied to the first circuit pattern 4 joined with the junction portion 1b. The current is further led to the power semiconductor element 7 mounted on the second circuit pattern 5 via the wires 11 and current-controlled by the semiconductor element 7, and then supplied to the electrode terminal 13 via the second circuit pattern 5 and the wires 12.
Moreover, in case of first embodiment, the junction portion 1b of the first external-connection terminal 1 has a size smaller than the surface of the first circuit pattern 4. In this case, it is possible to moderate the stress caused by the thermal-expansion difference between the first circuit pattern 4 and the junction portion 1b of the external-connection terminal 1. As a result, it is possible to improve the reliability of the device 10.
As described above, by directly joining the first and second external-connection terminals 1 and 13 insert-molded into the case 9 to the first and third circuit patterns 4 and 6 formed on the first and second insulating substrates 2 and 3 in the case 9, it is possible to easily fabricate a structure to which a large current can be supplied without bonding many wires. Moreover, in this case, because there are not any wires to be bonded to the first and third circuit patterns 4 and 6, it is possible to set the planar dimensions of the first and third circuit patterns 4 and 6 to small values. As a result, it is possible to provide a compact power semiconductor device 10 having a large current capacity.
Moreover, because the first and second external-connection terminals 1 and 13 are joined onto the first and third circuit patterns 4, it is unnecessary to form junction patterns for the external-connection terminals 1 and 13 on the insulating substrates 2 and 3 and it is possible to reduce the device 10 in size and cost.
Then, another embodiment of the present invention is described below. In the following description, the same components as in first embodiment are denoted by the same numerals and their explanations are omitted.
It is noted that only the first external-connection terminal 1 is described herein, however, this feature can be also applied to the junction structure of a second external-connection terminal 13.
It is noted that, in above description, the electrical connective portion between the circuit pattern 4 and the external-connection terminal 1 is limited by using the insulating material 31, however, it is also permitted to use air insulation instead of the insulating material 31. Furthermore, in above description, only the first external-connection terminal 1 is described herein, however, this feature can be also applied to the junction structure of a second external-connection terminal 13.
Although the present invention has been described in connection with the preferred embodiments thereof with reference to the accompanying drawings, it is to be noted that various changes and modifications will be apparent to those skilled in the art. Such changes and modifications are to be understood as included within the scope of the present invention as defined by the appended claims, unless they depart therefrom.
Number | Date | Country | Kind |
---|---|---|---|
2001-105046 | Apr 2001 | JP | national |
Number | Name | Date | Kind |
---|---|---|---|
5446318 | Koike et al. | Aug 1995 | A |
5559374 | Ohta et al. | Sep 1996 | A |
5585672 | Koike et al. | Dec 1996 | A |
6255585 | Jones et al. | Jul 2001 | B1 |
6320258 | Mangiagli et al. | Nov 2001 | B1 |
Number | Date | Country |
---|---|---|
43 30 070 | Mar 1994 | DE |
199 14 741 | Oct 2000 | DE |
0 752 720 | Jan 1987 | EP |
1 009 026 | Jun 2000 | EP |
62-202548 | Sep 1987 | JP |
406204398 | Jul 1994 | JP |
7-58282 | Mar 1995 | JP |
08306859 | Nov 1996 | JP |
Number | Date | Country | |
---|---|---|---|
20020140078 A1 | Oct 2002 | US |