Claims
- 1. A method for making a semiconductor device, comprising the steps of:forming an organic insulation film to cover a first interconnect or electrode formed on a substrate; forming an interconnect trench by removing said organic insulation film by etching; forming a first inorganic insulation film on said organic insulation film to cover said interconnect trench; introducing nitrogen into at least surface part of said first inorganic insulation film; forming an interlayer connection hole reaching said first interconnect or electrode by removing said first inorganic insulation film and said organic insulation film inside said interconnect trench and on said first interconnect or electrode by etching; forming a second inorganic insulation film on said first inorganic insulation film to cover said interconnect trench and said interlayer connection hole; introducing nitrogen into at least surface part of said second inorganic insulation film; removing said second inorganic insulation film on said first interconnect or electrode and leaving said second inorganic insulation film on the sidewall of said interconnect trench and said interlayer connection hole; and burying a conductive material into said interconnect trench and said interlayer connection hole, thereby forming a second interconnect or electrode in said interconnect trench, and forming a buried conductive layer connecting between said first interconnect or electrode and said second interconnect or electrode through said interlayer connection hole in said interlayer connection hole.
- 2. A method for making a semiconductor device, according to claim 1, wherein:related steps of said series of steps defined in claim 1 are repeated to form multi-layer interconnects of three or more layers.
- 3. A method for making a semiconductor device, according to claim 1, whereinsaid first inorganic insulation film and said second inorganic insulation film are of a same material.
- 4. A method for making a semiconductor device, according to claim 1, wherein:said first inorganic insulation film and said second inorganic insulation film are of silicon oxide film including fluorine.
- 5. A method for making a semiconductor device, according to claim 1, wherein:said introducing of nitrogen is conducted by exposing said part to plasma gas including nitrogen.
- 6. A method for making a semiconductor device, according to claim 1, wherein:said introducing of nitrogen is conducted by ion-implanting.
- 7. A method for making a semiconductor device, according to claim 1, wherein:said conductive material is copper, silver or gold.
- 8. A method for making a semiconductor device, according to claim 1, wherein:said second interconnect or electrode is of a same conductive material as said first interconnect or electrode.
- 9. A method for making a semiconductor device, according to claim 1, wherein:said second interconnect or electrode is formed by chemical vapor deposition, sputtering or electroless plating.
Priority Claims (1)
Number |
Date |
Country |
Kind |
10-165732 |
Jun 1998 |
JP |
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CROSS REFERENCE TO RELATED APPLICATION:
The present application is a divisional of application Ser. No. 09/329,130 on Jun. 9, 1999, now U.S. Pat. No. 6,274,923.
US Referenced Citations (4)
Foreign Referenced Citations (1)
Number |
Date |
Country |
4-28232 |
Jan 1992 |
JP |
Non-Patent Literature Citations (2)
Entry |
Edelstein, D.C., et al., Picosecond Propagation on Multilevel Copper-Polyimide Back End of the Lone Interconnections, VMIC Conference, Jun. 8-9, 1993, pp. 511-513. |
Lakshiminarayanan, S., et al., “Dual Damascene Copper Metallization Proceesing Using Chemical-Mechaincal Polishing”, Proceedings of 1994 VLSI Mutlilevel Interconnection Conference, pp. 49-55, 1994. |