BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a view for illustrating the principle of embodiments of the present invention.
FIG. 2 is a sectional view illustrating the structure of a semiconductor device according to a first embodiment of the present invention.
FIGS. 3A to 3D are sectional views illustrating the steps of a method for manufacturing the semiconductor device according to the first aspect of the present invention.
FIG. 4 is a schematic view illustrating a dicing step according to a second embodiment of the present invention.
FIG. 5 is a schematic view illustrating a dicing step according to a third embodiment of the present invention.
FIG. 6 is a schematic view illustrating a dicing step according to a fourth embodiment of the present invention.
FIG. 7 is a schematic view illustrating a dicing step according to a fifth embodiment of the present invention.
FIG. 8A is a view illustrating a conventional dicing technique and FIG. 8B is a sectional view illustrating a conventional interconnection structure.