Semiconductor device

Information

  • Patent Application
  • 20070187820
  • Publication Number
    20070187820
  • Date Filed
    February 05, 2007
    17 years ago
  • Date Published
    August 16, 2007
    17 years ago
Abstract
When a conductive layer occupying a large area is provided in a coiled antenna portion, it has been difficult to supply power stably. A memory circuit portion and a coiled antenna portion are disposed by being stacked together; therefore, it is possible to prevent a current from flowing through a conductive layer occupying a large area included in the memory circuit portion, and thus, power saving can be achieved. In addition, the memory circuit portion and the coiled antenna portion are disposed by being stacked together, and thus, it is possible to use a space efficiently. Therefore, downsizing can be realized.
Description

BRIEF DESCRIPTION OF DRAWINGS

In the accompanying drawings:



FIGS. 1A to 1C are a view for explaining a structure of a semiconductor device according to the present invention, a view for explaining a structure of a semiconductor device according to the present invention, and a view for explaining a comparative example, respectively;



FIG. 2 is a view for explaining a structure of a semiconductor device according to the present invention;



FIG. 3 is a view for explaining a structure of a semiconductor device according to the present invention;



FIG. 4 is a view for explaining a structure of a semiconductor device according to the present invention;



FIG. 5 is a view for explaining a structure of a semiconductor device according to the present invention;



FIG. 6 is a view for explaining a structure of a semiconductor device according to the present invention;



FIG. 7 is a view for explaining a structure of a semiconductor device according to the present invention;



FIGS. 8A and 8B are cross-sectional views each explaining a structure of a semiconductor device according to the present invention;



FIGS. 9A and 9B are circuit diagrams each explaining a structure of a semiconductor device according to the present invention; and



FIG. 10 is a view for explaining a structure of a semiconductor device.


Claims
  • 1. A semiconductor device comprising: an integrated circuit;an antenna having a spiral shape as its main structure; andan element, over a substrate having an insulating surface,wherein the element comprises a first electrode, a second electrode and a layer containing an organic compound interposed between the first electrode and the second electrode,wherein the antenna is electrically connected to the integrated circuit,wherein the first electrode or the second electrode is electrically connected to the integrated circuit, andwherein the antenna overlaps with the second electrode.
  • 2. A semiconductor device according to claim 1, wherein the element is memory element.
  • 3. A semiconductor device according to claim 1, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is provided in spirals from a periphery of the power feeding portion toward the power feeding portion.
  • 4. A semiconductor device according to claim 1, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is elliptical or circular.
  • 5. A semiconductor device according to claim 1, wherein the substrate having the insulating surface is glass, plastic, or paper.
  • 6. A semiconductor device comprising: an integrated circuit;a transistor;an antenna having a spiral shape as its main structure; andan element, over a substrate having an insulating surface,wherein the element comprises a first electrode, a second electrode and a layer containing an organic compound interposed between the first electrode and the second electrode,wherein the antenna is electrically connected to the integrated circuit,wherein the first electrode or the second electrode is electrically connected to the integrated circuit,wherein the transistor is electrically connected to the first electrode, andwherein the antenna overlaps with the second electrode and the transistor.
  • 7. A semiconductor device according to claim 6, wherein the element is memory element.
  • 8. A semiconductor device according to claim 6, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is provided in spirals from a periphery of the power feeding portion toward the power feeding portion.
  • 9. A semiconductor device according to claim 6, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is elliptical or circular.
  • 10. A semiconductor device according to claim 6, wherein the transistor is a thin film transistor.
  • 11. A semiconductor device according to claim 6, wherein the substrate having the insulating surface is glass, plastic, or paper.
  • 12. A semiconductor device comprising: a control circuit;an antenna having a spiral shape as its main structure; andan element, over a substrate having an insulating surface,wherein the element comprises a first electrode, a second electrode and a layer containing an organic compound interposed between the first electrode and the second electrode,wherein the first electrode or the second electrode is electrically connected to the control circuit, andwherein the antenna overlaps with the second electrode.
  • 13. A semiconductor device according to claim 12, wherein the element is memory element.
  • 14. A semiconductor device according to claim 12, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is provided in spirals from a periphery of the power feeding portion toward the power feeding portion.
  • 15. A semiconductor device according to claim 12, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is elliptical or circular.
  • 16. A semiconductor device according to claim 12, wherein the substrate having the insulating surface is glass, plastic, or paper.
  • 17. A semiconductor device comprising: an analog circuit;a digital circuit; andan antenna having a spiral shape as its main structure, over a substrate having an insulating surface,wherein the digital circuit includes an element comprising a first electrode, a second electrode and a layer containing an organic compound interposed between the first electrode and the second electrode,wherein the digital circuit is electrically connected to the analog circuit, andwherein the antenna overlaps with the second electrode.
  • 18. A semiconductor device according to claim 17, wherein the element is memory element.
  • 19. A semiconductor device according to claim 17, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is provided in spirals from a periphery of the power feeding portion toward the power feeding portion.
  • 20. A semiconductor device according to claim 17, wherein the antenna is formed of a power feeding portion and a plurality of linear or stripe-shaped antenna conductors, and the antenna conductor is elliptical or circular.
  • 21. A semiconductor device according to claim 17, wherein the substrate having the insulating surface is glass, plastic, or paper.
Priority Claims (1)
Number Date Country Kind
2006-033473 Feb 2006 JP national