The present invention relates to a semiconductor module, a semiconductor device, and a vehicle.
Some power conversion devices such as an inverter device include a semiconductor device including a circuit board on which a semiconductor element such as an insulated gate bipolar transistor (IGBT), a power metal oxide semiconductor field effect transistor (power MOSFET), and a free wheeling diode (FWD) is mounted. The circuit board includes a wiring board in which a conductor pattern is provided on a surface of an insulating substrate, and a circuit component such as a semiconductor element disposed on the wiring board.
In this type of semiconductor device, a conductor plate called a lead or the like may be used as a conductive member that electrically connects an electrode provided on a surface (upper surface) on a side opposite to a surface facing a wiring board side in electrodes of the semiconductor element and the conductor pattern of the wiring board.
In the semiconductor device in which the electrode of the semiconductor element and the conductor pattern of the wiring board are electrically connected using the lead, various measures have been proposed in order to prevent delamination at an interface between the lead and a sealing material.
For example, Patent Literature 1 describes a semiconductor device in which a side wall of a dimple formed in a lead frame has a barb portion protruding inward, and the dimples communicate with each other by a groove portion.
In addition, for example, Patent Literature 2 describes a semiconductor device in which at least four barbed portions obtained by a part of an inner peripheral wall protruding inward are formed in each of a plurality of dimples formed in a lead frame. In addition, for example, Patent Literature 3 describes a semiconductor device in which a barbed portion obtained by a part of an inner peripheral wall protruding inward is formed in each of a plurality of dimples formed in a lead frame, and the plurality of dimples includes two types of dimples having different orientation of the barbed portion.
In addition, for example, Patent Literature 4 describes a semiconductor device in which a large dimple opening at least one main surface and a small dimple opening on the inner surface of the large dimple are formed on the main surface of a die pad in a lead frame.
In addition, for example, Patent Literature 5 describes a semiconductor device in which a plurality of rectangular recesses is disposed vertically and horizontally at substantially equal intervals in a portion other than a semiconductor element mounting region on a surface of a metal plate to which a semiconductor element is fixed.
In the above-described configuration for preventing delamination at the interface between the lead and the sealing material in the semiconductor device, recesses called dimples or the like formed on the surface of the lead have a shape having a wall surface parallel to the side of the lead in plan view, or are arranged in a direction orthogonal to the side of the lead. Therefore, when delamination occurs in the sealing material at a position corresponding to the side of the lead in plan view, delamination often propagates in a direction orthogonal to the side.
The present invention has been made in view of such a point, and one object is to prevent propagation of delamination at an interface between a lead bonded to an electrode of a semiconductor element by a bonding material and a sealing material.
A semiconductor module according to one aspect of the present invention includes: a circuit board on which a semiconductor element is mounted; a lead that is bonded to an electrode on an upper surface of the semiconductor element by a bonding material; and a sealing material that seals the semiconductor element and the lead, in which the lead includes a plurality of recesses having a polygonal shape in which a bottom surface in plan view has a side extending in a direction not orthogonal to any of sides of a bonding portion on an upper surface of the bonding portion bonded to the electrode, the upper surface being opposite to a lower surface facing the electrode, and each of the plurality of recesses has a barbed portion protruding from a wall surface.
According to the present invention, it is possible to prevent propagation of delamination at an interface between a lead bonded to an electrode of a semiconductor element by a bonding material and a sealing material.
Hereinafter, an embodiment of the present invention will be described in detail with reference to the drawings. Note that the X, Y, and Z axes in each of the drawings to be referred to are illustrated for the purpose of defining a plane and a direction in an exemplified semiconductor device or the like, and the X, Y, and Z axes are orthogonal to each other and form a right-handed coordinate system. In the following description, the X direction may be referred to as a left-right direction, the Y direction may be referred to as a front-rear direction, and the Z direction may be referred to as an up-down direction. In addition, a plane including the X axis and the Y axis may be referred to as an XY plane, a plane including the Y axis and the Z axis may be referred to as a YZ plane, and a plane including the Z axis and the X axis may be referred to as a ZX plane. These directions (front-rear, left-right, and up-down directions) and planes are terms used for convenience of description, and a correspondence relationship with the XYZ directions may change depending on an attachment orientation of the semiconductor device. For example, a heat dissipation surface side (cooler side) of the semiconductor device is referred to as a lower surface side, and the opposite side is referred to as an upper surface side. In addition, in the present specification, plan view means a case where an upper surface or a lower surface (XY plane) of the semiconductor device or the like is viewed from the Z direction. In addition, an aspect ratio and a size relationship between the members in each drawing are merely schematically represented, and do not necessarily coincide with a relationship in a semiconductor device or the like actually manufactured. For convenience of description, it is also assumed that the size relationship between the members is exaggerated.
In addition, the semiconductor device exemplified in the following description is applied to, for example, a power conversion device such as an inverter of an industrial or in-vehicle motor. Thus, in the following description, detailed description of the same or similar configuration, function, operation, and the like as those of the known semiconductor device will be omitted.
As exemplified in
The cooler 3 dissipates heat of the semiconductor module 2 to the outside and has a rectangular parallelepiped shape as a whole. Although not particularly illustrated, the cooler 3 is configured by providing a plurality of fins on a lower surface side of a flat plate-shaped base portion and housing these fins in a water jacket. Note that the cooler 3 is not limited to this configuration and can be changed as appropriate.
The semiconductor module 2 includes a base 4, a circuit board 5, a case 6, a lead 7, bonding materials S1 to S4, bonding wires 8, and a sealing material 9.
The base 4 is a substrate on which the circuit board 5 is mounted, and the base 4 on which the circuit board 5 is mounted is attached to a lower surface of the case 6 with the surface on which the circuit board 5 is mounted facing upward. The case 6 includes an insulating member 601 having a rectangular annular shape whose upper surface and lower surface are opened, main terminals 602 and 603 integrated with the insulating member 601, and a plurality of control terminals 604. The circuit board 5 mounted on the base 4 is housed in a hollow portion of the insulating member 601 of the case 6. The base 4 is, for example, a metal plate such as a copper plate and conducts heat generated in the circuit board 5 to the cooler 3. This type of base 4 may be referred to as a heat dissipation plate or a heat dissipation layer. The base 4, which is a heat dissipation plate, may be disposed on the upper surface of the cooler 3, for example, via a thermal conductive material such as a thermal grease or a thermal compound. In addition, the base 4 may be omitted.
The circuit board 5 includes the wiring board 500 and a semiconductor element 510 mounted on an upper surface of the wiring board 500. The wiring board 500 includes an insulating substrate 501, conductor patterns 502 and 503 provided on an upper surface of the insulating substrate 501, and the conductor pattern 504 provided on a lower surface of the insulating substrate 501. The wiring board 500 may be, for example, a direct copper bonding (DCB) substrate or an active metal brazing (AMB) substrate. The wiring board 500 may be referred to as a stacked substrate.
The insulating substrate 501 is not limited to a specific substrate. The insulating substrate 501 may be, for example, a ceramic substrate made of a ceramic material such as aluminum oxide (Al2O3), aluminum nitride (AlN), silicon nitride (Si3N4), aluminum oxide (Al2O3), and zirconium oxide (ZrO2). The insulating substrate 501 may be, for example, a substrate obtained by molding an insulating resin such as epoxy resin, a substrate obtained by impregnating a base material such as glass fiber with an insulating resin, or a substrate obtained by coating a surface of a flat plate-shaped metal core with an insulating resin.
The conductor patterns 502 and 503 provided on the upper surface of the insulating substrate 501 are conductive members used as wiring members in the circuit board 5, and the conductor pattern 504 provided on the lower surface of the insulating substrate 501 is a conductive member used as a heat dissipation member that conducts heat generated in the circuit board 5 to the base 4. These conductor patterns 502 to 504 are formed of, for example, a metal plate such as copper or aluminum. The conductor pattern 504 provided on the lower surface of the insulating substrate 501 is bonded to the upper surface of the base 4 by the bonding material S1 such as solder. The conductor patterns 502 and 503 provided on the upper surface of the insulating substrate 501 may be each referred to as a conductor layer, a conductor plate, or a wiring pattern. The conductor pattern 504 provided on the lower surface of the insulating substrate 501 may be referred to as a heat dissipation layer, a heat dissipation plate, or a heat dissipation pattern.
As described above, the conductor patterns 502 and 503 provided on the upper surface of the insulating substrate 501 are conductive members used as wiring members in the circuit board 5. In the semiconductor module 2 exemplified in
A second main electrode (not illustrated) and control electrodes 512 are provided on the upper surface of the semiconductor element 510. These electrodes are electrically insulated by an insulating layer (not illustrated) formed on the upper surface of the semiconductor element 510. The insulating layer may be a surface protective film such as a passivation film formed on the upper surface of the semiconductor element 510. The second main electrode is electrically connected, via the lead 7, to the second conductor pattern 503 provided on the upper surface of the insulating substrate 501. The lead 7 includes a first bonding portion 701, a second bonding portion 702, and a wiring portion 703 connecting the first bonding portion 701 and the second bonding portion 702. The first bonding portion 701 is electrically connected to the second main electrode of the semiconductor element 510 by the bonding material S3. The second bonding portion 702 is bonded to the second conductor pattern 503 of the wiring board 500 by the bonding material S4. The control electrodes 512 on the upper surface of the semiconductor element 510 are electrically connected, via the bonding wires 8, to the control terminals 604 provided on the case 6.
In the semiconductor module 2 exemplified in
In the present embodiment, the semiconductor element 510 includes, for example, a reverse conducting (RC)-IGBT element in which the functions of an insulated gate bipolar transistor (IGBT) element and a free wheeling diode (FWD) element are integrated.
Note that the semiconductor element mounted on the upper surface of the wiring board 500 is not limited to a specific one. A semiconductor element as a switching element such as the IGBT or the power metal oxide semiconductor field effect transistor (MOSFET) and a semiconductor element as a diode element such as the FWD may be mounted on the upper surface of the wiring board 500. In addition, a reverse blocking (RB)-IGBT or the like having a sufficient withstand voltage against a reverse bias may be used as the semiconductor element. The semiconductor element is formed of a semiconductor substrate such as silicon (Si) or silicon carbide (SiC) in a rectangular shape in plan view. Note that the shape, disposition number, disposition location, and the like of the semiconductor element can appropriately be changed. The layout of the conductor pattern as the wiring member provided on the upper surface side of the wiring board 500 is changed according to the type and shape of the semiconductor element to be mounted, the number of the semiconductor elements to be disposed, the location of the semiconductor elements to be disposed, and the like.
When the switching element of the semiconductor element 510 is the IGBT element, the second main electrode on the upper surface side may be referred to as an emitter electrode, and the first main electrode on the lower surface side may be referred to as a collector electrode. When the switching element of the semiconductor element 510 is the MOSFET element, the second main electrode on the upper surface side may be referred to as a source electrode, and the first main electrode on the lower surface side may be referred to as a drain electrode. In addition, the control electrodes 512 provided on the upper surface of the semiconductor element 510 may include a gate electrode and an auxiliary electrode. For example, the auxiliary electrode may be an auxiliary emitter electrode or an auxiliary source electrode electrically connected to the second main electrode and serving as a reference potential with respect to a gate potential. In addition, the auxiliary electrode may be a temperature sensing electrode that is electrically connected to a temperature sensing portion and measures the temperature of the semiconductor element 510. Such electrodes (the second main electrode and the control electrodes 512 including a gate electrode and an auxiliary electrode) formed on the upper surface of the semiconductor element 510 may be generally referred to as upper surface electrodes.
The lead 7 described above is formed by bending a metal plate such as a copper plate, and may be referred to as a lead frame or a metal wiring board. On the upper surface of the semiconductor element 510, an insulating layer is formed so as to surround the second main electrode electrically connected to the first bonding portion 701 of the lead 7. The spread of the bonding material S3 with which the second main electrode and the first bonding portion 701 of the lead 7 are bonded is restricted in a plane (XY plane) at the time of melting by the insulating layer surrounding the second main electrode.
An end portion of the wiring portion 703 of the lead 7 on the first bonding portion 701 side is connected to one side surface of the first bonding portion 701 and is bent from the side surface in a direction opposite to a lower surface (in other words, a surface of the first bonding portion 701 facing the second main electrode of the semiconductor element 510) of the first bonding portion 701. Similarly, an end portion of the wiring portion 703 of the lead 7 on the second bonding portion 702 side is connected to one side surface of the second bonding portion 702 and is bent from the side surface in a direction opposite to a lower surface (in other words, a surface of the second bonding portion 702 facing the conductor pattern 503) of the second bonding portion 702.
The semiconductor element 510, the lead 7, the bonding wires 8, and the like housed in the case 6 are sealed by the sealing material 9. The sealing material 9 may be a single insulating material or a combination of a plurality of types of insulating materials having different compositions (characteristics).
Although not illustrated in
On an upper surface 710 of the first bonding portion 701 exemplified in
The plurality of recesses 720 is disposed such that one wall surface (wall surface 722 in
In the recess 720, barbed portions 727 projecting in the directions of opposing corners 724, 725, and 726 are formed on three respective wall surfaces 721, 722, and 723 (see
Further, in the first example of the plurality of recesses 720, for example, as illustrated in
The protrusion amount of the barbed portion 727 formed on the wall surfaces 721, 722, and 723 of the recess 720 from each wall surface depends on the depth of the additional recess 730. For example, a protrusion amount L1 of the barbed portion 727 formed by the additional recess 730 having the depth D2 is larger than a protrusion amount L2 of the barbed portion 727 formed by the additional recess 730 having the depth D3 (<D2).
When the plurality of recesses 720 described above is provided on the upper surface 710 of the first bonding portion 701 of the lead 7, the sealing material 9 on the first bonding portion 701 fills the recess 720, so that the contact area between the upper surface 710 of the first bonding portion 701 and the sealing material 9 increases. In addition, since the barbed portion 727 protrudes from each wall surface of the recess 720, a portion of the sealing material 9 in the recess 720 is less likely to come out of the recess 720. Therefore, as compared with the conventional example described below with reference to
Next, an example of a method of forming the recess 720 having the barbed portions 727 described above with reference to
In an example of the method, first, the first step of forming some of the plurality of recesses 720 having a triangular prism shape on the upper surface 710 of the first bonding portion 701 of the lead 7 is performed. In the first step, as exemplified in
Note that, in the first step, as exemplified in FIG. 6, the recess 720 having the depth D1 is formed by the punch 10. The depth D1 is, for example, 100 μm.
After the first step, the second step of forming the remaining recesses 720 of the plurality of recesses 720 having a triangular prism shape and the additional recesses 730 for some of the recesses 720 formed in the first step is performed. As exemplified in
Note that, in the second step, as exemplified in
When the second step is ended, as exemplified in
After the second step, the third step of forming the additional recesses 730 for the plurality of recesses 720 having a triangular prism shape in which the additional recesses 730 were not formed in the second step is performed. As exemplified in
Note that, in the third step, as exemplified in
The method described above with reference to
On the upper surface 710 of the first bonding portion 701 of the lead 7 exemplified in
In the conventional example of the semiconductor device using the lead 7 exemplified in
When the second main electrode (not illustrated) on the upper surface of the semiconductor element 510 and the first bonding portion 701 of the lead 7 are bonded by the bonding material S3 such as solder, as exemplified in
On the other hand, since the recess 720 of the present embodiment described above with reference to
Further, as described above with reference to
Note that the method of forming the barbed portion 727 on the wall surfaces 721, 722, and 723 of the recess 720 is not limited to the method described above with reference to
The method of forming the barbed portion 727 protruding toward the opposite corner on each of the wall surfaces 721, 722, and 723 of the recess 720 having a triangular prism shape is not limited to the above-described press working using the punch 10 having a triangular prism shape. For example, the additional recess 730 for forming the barbed portion 727 may be formed by press working using a punch having a Y-shaped bottom surface 11 in plan view as indicated by the dotted lines in
In addition, for the punch 10 used for forming the recess 720 and the additional recess 730, for example, as exemplified in
Note that the recess 720 described above is described assuming that the shape of the bottom surface in plan view is an equilateral triangle. However, the shape of the bottom surface of the recess 720 in plan view is not limited to an equilateral triangle, but may be another triangular shape. In addition, the shape of the bottom surface of the recess 720 in plan view is not limited to the triangular shape, but may be a polygonal shape having sides extending in directions not orthogonal to any side of the first bonding portion 701 of the lead 7. In addition, when the recess 720 and the additional recess 730 are formed using the punch 10 having a convex bottom surface described above with reference to
Note that the recesses 720 having the barbed portions 727 on the wall surfaces described in the above embodiment may be disposed in a hexagonal lattice shape on the entire upper surface 710 of the first bonding portion 701 of the lead 7, or may not be disposed in a specific region of the upper surface 710. Further, the recess 720 may be formed not only on the upper surface 710 of the first bonding portion 701 of the lead 7, but also on, for example, the upper surface of the second bonding portion 702.
As described above, the semiconductor device 1 including the semiconductor module 2 of the present embodiment can be applied to the power conversion device such as the inverter of the in-vehicle motor. A vehicle to which the semiconductor device 1 according to the present invention is applied will be described with reference to
The vehicle 2001 includes a drive unit 2003 that imparts power to the wheels 2002 and a control device 2004 that controls the drive unit 2003. The drive unit 2003 may be configured with, for example, at least one of an engine, a motor, and a hybrid of the engine and the motor.
The control device 2004 performs control (for example, power control) of the drive unit 2003 described above. The control device 2004 includes the semiconductor device 1 described above. The semiconductor device 1 may be configured to perform the power control on the drive unit 2003.
In the semiconductor module 2 of the semiconductor device 1 used for this type of vehicle 2001, when the first bonding portion 701 of the lead 7 described above is bonded to the electrode (for example, the second main electrode of the semiconductor element 510) on the upper surface of the semiconductor element by the bonding material S3, it is possible to prevent the propagation of delamination at the interface between the sealing material 9 and the upper surface 710 of the first bonding portion 701. Therefore, it is possible to reduce the frequency of inspection and replacement of the semiconductor device 1 used in the vehicle 2001.
Note that the vehicle to which the semiconductor device 1 is applied is not limited to the four-wheeled vehicle exemplified in
Although the present embodiment and the modifications have been described above, the above-described embodiment and modifications may be wholly or partially combined as another embodiment.
In addition, the present embodiment is not limited to the above-described embodiment and modifications, and various changes, substitutions, and modifications may be made without departing from the spirit of the technical idea. In addition, if the technical idea can be achieved in another manner by the progress of the technology or another derived technology, the technology may be implemented by using the method. Therefore, the claims cover all embodiments that may be included within the scope of the technical idea.
The feature points in the above embodiment will be described below.
A semiconductor module according to the above embodiment includes: a circuit board on which a semiconductor element is mounted; a lead that is bonded to an electrode on an upper surface of the semiconductor element by a bonding material; and a sealing material that seals the semiconductor element and the lead, in which the lead includes a plurality of recesses having a polygonal shape in which a bottom surface in plan view has a side extending in a direction not orthogonal to any of sides of a bonding portion on an upper surface of the bonding portion bonded to the electrode, the upper surface being opposite to a lower surface facing the electrode, and each of the plurality of recesses has a barbed portion protruding from a wall surface.
In the semiconductor module according to the above embodiment, the recess has a bottom surface having a triangular shape in plan view, and has an additional recess that is extended outward of the recess from the wall surface and shallower than a depth to the bottom surface of the recess, and the barbed portion protrudes from the wall surface at a position of a bottom surface of the additional recess.
In the semiconductor module according to the above embodiment, the recesses are disposed in a hexagonal lattice shape in plan view, and include a recess having a bottom surface having a triangular shape in a first orientation in plan view and a recess having a bottom surface having a triangular shape in plan view in a second orientation opposite to the first orientation.
In the semiconductor module according to the above embodiment, the bottom surface of the additional recess in plan view has a triangular shape.
In the semiconductor module according to the above embodiment, the plurality of recesses includes a plurality of types of recesses having different combinations of a depth to the bottom surface and a depth to the bottom surface of the additional recess.
In the semiconductor module according to the above embodiment, the bottom surface of the additional recess in plan view has a rectangular shape.
In the semiconductor module according to the above embodiment, at least one of the bottom surface of the recess and the bottom surface of the additional recess has a concave shape.
A semiconductor device according to the embodiment includes: the semiconductor module described above; and a cooler that is disposed on a surface of the circuit board of the semiconductor module on a side opposite to a surface on which the semiconductor element is mounted.
A vehicle according to the embodiment includes the semiconductor module or the semiconductor device described above.
As described above, the present invention has the effect of being able to prevent propagation of delamination at an interface between an upper surface of a bonding portion of a lead bonded to an electrode of a semiconductor element and a sealing material, and is particularly useful for a semiconductor module for industrial or electrical equipment, a semiconductor device, and a vehicle.
The present application is based on Japanese Patent Application No. 2022-161588 filed on Oct. 6, 2022. All the contents are included herein.
Number | Date | Country | Kind |
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2022-161588 | Oct 2022 | JP | national |
This application is a continuation application of PCT Application No. PCT/JP2023/031780, filed Aug. 31, 2023, which claims the benefit of priority to Japanese Patent Application No. 2022-161588, filed Oct. 6, 2022, each of which is incorporated by reference herein in its entirety.
Number | Date | Country | |
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Parent | PCT/JP2023/031780 | Aug 2023 | WO |
Child | 18902173 | US |