Through-hole-vias in multi-layer printed circuit boards

Information

  • Patent Grant
  • 9277653
  • Patent Number
    9,277,653
  • Date Filed
    Friday, January 10, 2014
    10 years ago
  • Date Issued
    Tuesday, March 1, 2016
    8 years ago
Abstract
Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of manufacturing a PCB. Embodiments include depositing upon layers of laminate printed circuit traces and joining the layers of laminate. Embodiments also include drilling at least one via hole through the layers of laminate and placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper.
Description
BACKGROUND OF THE INVENTION

1. Field of the Invention


The field of the invention is data processing, or, more specifically, methods, apparatus, and products for multi-layer printed circuit boards with through-hole vias.


2. Description of Related Art


The development of the EDVAC computer system of 1948 is often cited as the beginning of the computer era. Since that time, computer systems have evolved into extremely complicated devices. Today's computers are much more sophisticated than early systems such as the EDVAC. Computer systems typically include a combination of hardware and software components, application programs, operating systems, processors, buses, memory, input/output devices, and so on. As advances in semiconductor processing and computer architecture push the performance of the computer higher and higher, more sophisticated computer software has evolved to take advantage of the higher performance of the hardware, resulting in computer systems today that are much more powerful than just a few years ago.


One of the areas that has seen considerable development is PCB design, particularly as PCB bandwidths have advanced well into the gigahertz region. As electronic bandwidths expand, the impedances inherent in the conductive pathways on the PCBs themselves become relevant. When signal conductors change layers in multi-layer stackup applications, vias are used. However, when through-hole-vias are used for signal conductors to change layers, any unused via stub will hurt signal integrity. As frequency increases, signal performance is greatly impacted by reflections from those open stubs. A quarter-wave length resonance is particularly detrimental in high speed data transmissions. In current industry practice, termination methods using a resistor, an inductor or a capacitor are used to minimize those through-hole-via stub effects. However, the resistor termination results in undesired DC loss for the signal. The inductor/capacitor termination will shift the quarter-wave length resonance, but still have a resonance which can affect other frequency bands. Using those extra components requires real estate to mount those components which will eventually restrict the freedom of routability.


SUMMARY OF THE INVENTION

Example multi-layer printed circuit boards (‘PCBs’) are described as well as methods of manufacturing a PCB. Embodiments include depositing upon layers of laminate printed circuit traces and joining the layers of laminate. Embodiments also include drilling at least one via hole through the layers of laminate and placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper.


The foregoing and other objects, features and advantages of the invention will be apparent from the following more particular descriptions of exemplary embodiments of the invention as illustrated in the accompanying drawings wherein like reference numbers generally represent like parts of exemplary embodiments of the invention.





BRIEF DESCRIPTION OF THE DRAWINGS


FIG. 1 sets forth a cross-sectional plan view of an example multi-layer PCB according to embodiments of the present invention.



FIG. 2 sets forth an example graph of insertion loss for a via in a PCB according to embodiments of the present invention.



FIGS. 3 and 4 each sets forth a cross-sectional plan view of an additional example multi-layer PCB with a via according to embodiments of the present invention.



FIG. 5 sets forth a flow chart illustrating an example method of use of a multi-layer PCB according to embodiments of the present invention.



FIG. 6 sets forth a flow chart illustrating an example method of manufacturing a multi-layer PCB according to embodiments of the present invention.





DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTS

Example multi-layer printed circuit boards (‘PCBs’) as well as methods of making and using such PCBs in accordance with embodiments of the present invention are described with reference to the accompanying drawings, beginning with FIG. 1. FIG. 1 sets forth a cross-sectional plan view of an example multi-layer PCB (40) according to embodiments of the present invention that includes layers of laminate (30), a via hole (14) traversing the layers of laminate, and a via conductor (24, 26) contained within the via hole. The via conductor includes a used portion (12) and an unused portion (22). The via conductor is composed of copper (24) coated with a metal (26) having a conductivity lower than the conductivity of copper.


In the example of FIG. 1, the used portion (12) of the via conductor (24, 26) conducts an alternating current signal (304) from a trace (32) on one layer (42) of the PCB (40) to a trace (34) on another layer (44) of the PCB. In addition, the alternating current signal (304) is characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface (11) of the via conductor (24, 26), that is, in this example, toward the surface of the coating metal having a conductivity lower than the conductivity of copper.


Also in the example of FIG. 1, the unused portion (22) of the via conductor has no connection to any further trace, and the unused portion of the via conductor therefore implements a resonant stub that causes an insertion loss of the alternating current signal centered on a resonant frequency. Such a resonant stub can be modeled as a series resistance, inductance, and capacitance having a particular resonant frequency depending on the values of inductance and capacitance involved. The metal having a conductivity lower than the conductivity of copper increases resistive dampening of such a resonance and reduces the insertion loss of the alternating current signal as the signal traverses the used portion (12) of the via conductor between trace (32) and trace (34). The increased resistive dampening occurs because of the so-called “skin effect,” which at higher frequencies, demonstrably moves alternating electric current flows towards the surface of conductors. Hence if the resonant stub, the unused portion (22) of the via conductor in such an example is coated with a material that has higher resistance than copper (like nickel or iron), the high frequency current will actually flow through a higher resistance path. This will provide additional damping in the resonant region thereby reducing the stub impact on the desired signal. Examples of such metals having lower conductivity or higher resistivity than copper include the mentioned iron and nickel, alloys of iron and nickel, compounds of iron and nickel, as well as aluminum, tin, zinc, many of their alloys, and other metals as will occur to those of skill in the art.


For further explanation, FIG. 2 sets forth an example graph of insertion loss for a via in a PCB according to embodiments of the present invention modeled with a via conductor of copper only (54), copper with a coating of nickel (52), and copper with a coating of iron (50). For ease of explanation, the example of FIG. 2 is discussed here with reference both to FIGS. 1 and 2. The example graph of FIG. 2 illustrates insertion loss for an example via according to embodiments of the present invention, similar to the one described and illustrated above with reference to FIG. 1, of 3 millimeters height and 100 micrometer radius modeled with a three-dimensional, full wave solver. The via was modeled with a signal path (32, 12, 34) from the top layer (42) of a PCB to the third layer (44), with a ground plane (46) disposed upon the second layer (43).


The graph of FIG. 2 shows the beneficial effect of increased resistive dampening of resonance with reduced insertion loss of the alternating current signal as the signal traverses the used portion (12) of the via conductor between trace (32) and trace (34). The copper-only graph (54) in FIG. 2 shows an insertion loss of about 8.5 dB centered on the resonant frequency f3 of about 19 GHz. By comparison with copper only, the graph for insertion loss with copper coated with nickel (52) shows insertion loss reduced by 1.5 dB with center resonant frequency f2 shifted down to about 18 GHz. The graph for with copper coated with iron (50) shows an even better insertion loss reduction of 3.0 dB with the center resonant frequency f1 shifted even further down to about 15 GHz.


For further explanation, FIGS. 3 and 4 each sets forth a cross-sectional plan view of an additional example multi-layer PCB (40) with a via (10) according to embodiments of the present invention. Each such PCB (40) includes layers of laminate (30), a via hole (14) traversing the layers of laminate, and a via conductor (24, 26) contained within the via hole. Each via conductor include a used portion (12) and an unused portion (22). Each via conductor is composed of copper (24) coated with a metal (26) having a conductivity lower than the conductivity of copper. In the example of FIG. 3, both the used portion (12) and the unused portion (22) of the via conductor are composed of copper (24), and only the unused portion (22) of the via conductor is coated with a metal (26) having a conductivity lower than the conductivity of copper. In the example PCB (40) of FIG. 4, however, the entire via conductor (24) consists only of a metal having a conductivity lower than the conductivity of copper.


For further explanation, FIG. 5 sets forth a flow chart illustrating an example method of use of a multi-layer PCB according to embodiments of the present invention. The method of FIG. 5 is carried out with a PCB similar to the one described above with reference to FIG. 1, a multi-layer PCB (40) that includes layers of laminate (30) and a via (10) that is composed of a via hole (14) traversing the layers of laminate, and a via conductor (24, 26) contained within the via hole. The via conductor includes a used portion (12) and an unused portion (22). The via conductor is composed of copper (24) coated with a metal (26) having a conductivity lower than the conductivity of copper. The method of FIG. 5 therefore is described with reference to both FIGS. 1 and 5.


The method of FIG. 5 includes driving (302), from a first circuit (IC1) on a first laminate layer (42) of the PCB (40) to a second circuit (IC2) on a second laminate layer (44) of the PCB through a via (10), an alternating current signal (304). In this example, the first circuit is represented by integrated circuit IC1, and the second circuit is represented by integrated circuit IC2. The conductive pathway between IC1 and IC2 is composed of trace (32), the used portion (12) of the via conductor, trace (34), via (20), and trace (34).


The method of FIG. 5 also includes receiving (306) the signal (304) in the second circuit (IC2), where the signal is characterized by an insertion loss in traversing the via (10). In the method of FIG. 5, the alternating current signal (304) is characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface of the via conductor as the alternating current signal traverses the via (10). The unused portion (22) of the via conductor has no connection to any further trace, and the unused portion (22) of the via conductor implements a resonant stub effecting an insertion loss of the alternating current signal centered on a resonant frequency. The metal having a conductivity lower than the conductivity of copper increases resistive dampening of resonance and reduces the insertion loss. Insertion loss in the via (20) connecting trace (34) to trace (35) in this example is of little concern, because there is no unused part, and therefore no resonant stub, in via (20).


In addition to the use of the PCB and via structure shown in FIG. 1, some embodiments implement the method of FIG. 5 on vias of the kind shown in FIG. 3 in which both the used portion (12) and the unused portion (22) of the via conductor comprise copper, and only the unused portion (22) of the via conductor is coated with a metal (26) having a conductivity lower than the conductivity of copper. In addition, some embodiments implement the method of FIG. 5 on vias of the kind shown in FIG. 5 where the entire via conductor (24) consists only of a metal having a conductivity lower than the conductivity of copper.


For further explanation, FIG. 6 sets forth a flow chart illustrating an example method of manufacturing a multi-layer PCB according to embodiments of the present invention. Because the method of FIG. 6 produces a PCB similar to the one depicted above in FIG. 1, the method of FIG. 6 is described with reference to both FIGS. 1 and 6. The method of FIG. 6 includes depositing (402) upon layers of laminate (30) printed circuit traces (32, 34, 35), joining (404) the layers of laminate, and drilling (406) at least one via hole (14) through the layers of laminate. The method of FIG. 6 also includes placing (408) in the via hole (14) a via conductor (24, 26) composed of a used portion (12) and an unused portion (22). The via conductor is composed of copper (24) coated with a second metal (26) having a conductivity lower than the conductivity of copper.


The method of FIG. 6 also includes forming (410) the used portion (12) of the via conductor so as to conduct an alternating current signal (304) from a trace (32) on one layer of the PCB to a trace (34) on another layer of the PCB, where the alternating current signal characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface of the via conductor.


The method of FIG. 6 also includes forming (412) the unused portion of the via conductor with no connection to any further trace, so that the unused portion of the via conductor implements a resonant stub effecting an insertion loss of the alternating current signal centered on a resonant frequency, with the metal having a conductivity lower than the conductivity of copper increasing resistive dampening of resonance and reducing the insertion loss. Alternatively in the method of FIG. 6, both the used portion (12) and the unused portion (22) of the via conductor may be copper, with only the unused portion (22) of the via conductor coated with a metal (26) having a conductivity lower than the conductivity of copper—as shown and described above with reference to FIG. 3. As a further alternative in the method of FIG. 6, the entire via conductor (24) may be formed only of a metal having a conductivity lower than the conductivity of copper—as shown and described above with reference to FIG. 4.


It will be understood from the foregoing description that modifications and changes may be made in various embodiments of the present invention without departing from its true spirit. The descriptions in this specification are for purposes of illustration only and are not to be construed in a limiting sense. The scope of the present invention is limited only by the language of the following claims.

Claims
  • 1. A method of manufacturing a multi-layer printed circuit board (PCB) comprising: depositing upon layers of laminate printed circuit traces;joining the layers of laminate;drilling at least one via hole through the layers of laminate;placing in the via hole a via conductor comprising a used portion and an unused portion, the via conductor comprising copper coated with a second metal having a conductivity lower than the conductivity of copper;wherein both the used portion and the unused portion of the via conductor comprise copper, andonly the unused portion of the via conductor is coated with a metal having a conductivity lower than the conductivity of copper.
  • 2. The method of claim 1 further comprising: forming the used portion of the via conductor so as to conduct an alternating current signal from a trace on one layer of the PCB to a trace on another layer of the PCB,the alternating current signal characterized by a frequency high enough to demonstrate skin effect, moving the alternating current toward the surface of the via conductor.
  • 3. The method of claim 1 further comprising: forming the unused portion of the via conductor with no connection to any further trace,the unused portion of the via conductor implementing a resonant stub effecting an insertion loss of the alternating current signal centered on a resonant frequency,the metal having a conductivity lower than the conductivity of copper increasing resistive dampening of resonance and reducing the insertion loss.
  • 4. The method of claim 1 wherein the metal having a conductivity lower than the conductivity of copper is iron.
  • 5. The method of claim 1 wherein the metal having a conductivity lower than the conductivity of copper is nickel.
CROSS-REFERENCE TO RELATED APPLICATION

The present application is a divisional application and claims priority from U.S. patent application Ser. No. 12/570,029, filed on Sep. 30, 2009 and U.S. patent application Ser. No. 13/448,787, filed on Apr. 17, 2012.

US Referenced Citations (85)
Number Name Date Kind
2872391 Hauser et al. Feb 1959 A
2897409 Gitto Jul 1959 A
4131516 Bakos et al. Dec 1978 A
4733461 Nakano Mar 1988 A
5298686 Bourdelaise et al. Mar 1994 A
H1471 Braun et al. Aug 1995 H
5452178 Emesh et al. Sep 1995 A
5715144 Ameen et al. Feb 1998 A
5744759 Ameen et al. Apr 1998 A
5907903 Ameen et al. Jun 1999 A
5963464 Dell et al. Oct 1999 A
5967799 Arai Oct 1999 A
5998259 Chuang Dec 1999 A
6070785 Ameen et al. Jun 2000 A
6076726 Hoffmeyer et al. Jun 2000 A
6124781 Hogge et al. Sep 2000 A
6172591 Barrett Jan 2001 B1
6194774 Cheon Feb 2001 B1
6197181 Chen Mar 2001 B1
6236302 Barrett et al. May 2001 B1
6290833 Chen Sep 2001 B1
6300578 Hoffmeyer et al. Oct 2001 B1
6404001 Koo et al. Jun 2002 B2
6512285 Hashemi et al. Jan 2003 B1
6541712 Gately et al. Apr 2003 B1
6621012 Crockett et al. Sep 2003 B2
6638410 Chen et al. Oct 2003 B2
6646520 Miller Nov 2003 B2
6653170 Lin Nov 2003 B1
6678145 Naito et al. Jan 2004 B2
6680659 Miller Jan 2004 B2
6775901 Lee et al. Aug 2004 B1
6803665 Megahed et al. Oct 2004 B1
6822529 Miller Nov 2004 B2
6853003 Lee Feb 2005 B2
6913471 Smith Jul 2005 B2
6927481 Gibson et al. Aug 2005 B2
6958547 Dubin et al. Oct 2005 B2
6983535 Crockett et al. Jan 2006 B2
7005721 Nishijima Feb 2006 B2
7030712 Brunette et al. Apr 2006 B2
7118985 Allman et al. Oct 2006 B2
7154356 Brunette et al. Dec 2006 B2
7186919 Kim et al. Mar 2007 B2
7204648 Aronson Apr 2007 B2
7227240 Knapp et al. Jun 2007 B2
7249337 Gisin et al. Jul 2007 B2
7277005 Kang et al. Oct 2007 B2
7342300 Wight et al. Mar 2008 B2
20020191366 Naito et al. Dec 2002 A1
20020195271 Gailus Dec 2002 A1
20030188886 Fey et al. Oct 2003 A1
20050029014 Miura Feb 2005 A1
20050062556 Aronson Mar 2005 A1
20050178669 Strubbe Aug 2005 A1
20050184825 Oran Aug 2005 A1
20050233501 Nose et al. Oct 2005 A1
20050251997 Homg et al. Nov 2005 A1
20060046088 Akram et al. Mar 2006 A1
20060254052 Miura Nov 2006 A1
20070004200 Akram et al. Jan 2007 A1
20070045779 Hiatt Mar 2007 A1
20070045780 Akram et al. Mar 2007 A1
20070103251 Fan et al. May 2007 A1
20070117348 Ramanathan et al. May 2007 A1
20070132105 Akram et al. Jun 2007 A1
20070257373 Akram et al. Nov 2007 A1
20080054428 Lam Mar 2008 A1
20080277146 Hwang et al. Nov 2008 A1
20090049414 Mutnury et al. Feb 2009 A1
20090176362 Akram et al. Jul 2009 A1
20090223710 Becker et al. Sep 2009 A1
20100124035 Bandholz et al. May 2010 A1
20110073359 Cases et al. Mar 2011 A1
20110108972 Foster, Sr. et al. May 2011 A1
20110109381 Foster, Sr. et al. May 2011 A1
20110110064 Foster, Sr. et al. May 2011 A1
20110110065 Foster, Sr. et al. May 2011 A1
20110148543 Bandholz et al. Jun 2011 A1
20120193135 Cases et al. Aug 2012 A1
20120200346 Cases et al. Aug 2012 A1
20120218024 Foster, Sr. et al. Aug 2012 A1
20120286431 Foster, Sr. et al. Nov 2012 A1
20120299640 Foster, Sr. et al. Nov 2012 A1
20130214855 Foster, Sr. et al. Aug 2013 A1
Foreign Referenced Citations (5)
Number Date Country
0213205 Mar 1987 EP
1 202 296 May 2002 EP
6140451 May 1994 JP
2000031651 Jan 2000 JP
WO 2004025695 Mar 2004 WO
Non-Patent Literature Citations (1)
Entry
Anonymous, “Method for a Cylindrical Chip Capacitor”, IP.com Prior Art Database Technical Disclosure (online publication), Mar. 16, 2005, 10 pages, IP.com, USA, IP.com No. IPCOM000101630D.
Related Publications (1)
Number Date Country
20140123489 A1 May 2014 US
Divisions (2)
Number Date Country
Parent 12570029 Sep 2009 US
Child 14152096 US
Parent 13448787 Apr 2012 US
Child 12570029 US