Patent Application
20250218763
Embodiments of the present disclosure generally relate to fabrication of microelectronic devices, and more specifically, relate to gap fill deposition and film densification during the fabrication of microelectronic devices.
Semiconductor device geometries have dramatically decreased in size since their introduction several decades ago. Modern semiconductor fabrication equipment routinely produce devices with feature sizes of 10 nm and sub-10 nm, and new equipment is being developed and implemented to make devices with even smaller geometries. The decreasing feature sizes result in structural features on the device having decreased spatial dimensions. The widths of gaps and trenches on the device narrow to a point where the aspect ratio of gap depth to its width becomes high enough to make it challenging to fill the gap with dielectric material. As a result, the deposition of dielectric material is prone to clog at the top before the gap is completely filled, producing a void or seam in the middle of the gap.
Over the years, many techniques have been developed to avoid having dielectric material clog the top of a gap, or to “heal” the void or seam that has been formed. One approach has been to etch the dielectric material to remove the material clog at the top of the gap. Unfortunately, during the etching process, the bottom of the gap etches faster than the top of the gap, reducing the thickness of the dielectric material at the bottom of the gap, and preventing a uniform deposition. Conventionally, selective etching has been implemented to limit the bottom of the gap from etching at the same rate as the top of the gap. However, approaches to control etching selectivity of the dielectric material generally require adjusting one or more process conditions during the dielectric material deposition, leading to bubbles forming in the dielectric material.
Therefore, there is a need for an improved method of gap fill deposition.
The present disclosure provides methods of gap fill deposition. The methods include forming a silicon-nitride based dielectric film. The method includes providing a substrate into a processing chamber. An amorphous silica layer is formed on a surface of the substrate by flowing a dielectric precursor and a carrier gas on the substrate. A modified amorphous silica layer is formed by flowing a reactive gas into the processing chamber. A thermal etching process is performed on the modified amorphous silica layer by flowing a fluorine-containing compound at a temperature of about 400° C. to about 600° C. A silicon-nitride based dielectric film is formed by reacting the modified amorphous silica layer with one or more radicals generated by a remote plasma source.
The present disclosure also provides methods of gap fill deposition. The methods include forming a silicon-nitride based dielectric film. The method includes providing a substrate into a processing chamber. An amorphous silica layer is formed on a surface of the substrate by flowing a dielectric precursor and a carrier gas on the substrate. A modified amorphous silica layer is formed by flowing a reactive gas into the processing chamber. A silicon-nitride based dielectric film is formed by reacting the modified amorphous silica layer with one or more radicals generated by a remote plasma source. An etched silicon-nitride based dielectric film is formed by flowing a fluorine-containing compound to the processing chamber in the presence of a plasma.
The present disclosure also provides methods of gap fill deposition. The methods include forming a silicon-nitride based dielectric film. The method includes providing a substrate into a processing chamber. An amorphous silica layer is formed on a surface of the substrate by flowing a dielectric precursor and a carrier gas on the substrate. A modified amorphous silica layer is formed by flowing a reactive gas into the processing chamber. A silicon-nitride based dielectric film is formed by reacting the modified amorphous silica layer with one or more radicals generated by a remote plasma source. An etched silicon-nitride based dielectric film is formed by flowing a fluorine-containing compound to the processing chamber in the presence of a plasma. The etched silicon-nitride based dielectric film is exposed to a hydrogen recovery process in the processing chamber.
So that the manner in which the above recited features of the present disclosure can be understood in detail, a more particular description of the disclosure, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only exemplary embodiments and are therefore not to be considered limiting of its scope, and may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, where possible, to designate identical elements that are common to the figures. It is contemplated that elements and features of one embodiment may be beneficially incorporated in other embodiments without further recitation.
Embodiments described herein provide methods of depositing silicon nitride (SiN)-based dielectric films on a substrate. The SiN-based dielectric films may be treated using a plasma treatment. Additionally, a hydrogen recovery process may be performed which can remove one or more defects from the treated SiN-based dielectric film. A SiN-based dielectric film contains silicon-nitrogen (Si—N—Si) bonds. A SiN-based dielectric film, as deposited on the substrate, may contain a large amount of silicon-hydrogen (Si—H) and nitrogen-hydrogen (N—H) bonds as a result of cross-linking of Si—H near a surface of the deposited SiN-based dielectric film, causing insufficient filling of gaps and trenches. The methods described herein include depositing SiN-based dielectric films on a substrate (e.g., one layer at a time) to prevent buildup of the precursors over a gap of the substrate. Moreover, the SiN-based dielectric films may be etched with NF3, where NF3 becomes a strong oxidizing agent with the use of high temperatures, e.g., greater than 450° C. and an argon-based plasma such that the top of the gap may be selectively etched with limited etching of the bottom of the gap. The SiN-based dielectric film may then be exposed to a hydrogen recovery process to remove defects in the SiN-based dielectric film resulting from the NF3.
At operation 102, a substrate is provided in a processing chamber. A substrate, for example, may be a metal substrate, such as aluminum or stainless steel, a semiconductor substrate, such as silicon, silicon-on-insulator (SOI), or gallium arsenide, a glass substrate, or a plastic substrate. A semiconductor substrate may be a patterned substrate at any stage of manufacture/fabrication in the formation of integrated circuits. The patterned substrate may include one or more features, e.g., gaps, trenches, holes, vias, fins, columns, film stacks, layers, films, or other structures disposed on the substrate, that are to be filled with dielectric material. For example, the features can be or include a plurality of fins, where each fin contains a film stack. The film stack can include alternating pairs of layers disposed on one another. In one or more examples, each of the pairs of layers contains silicon-germanium layers and silica layers. Each of the silicon-germanium layers and silica layers can independently be deposited or formed by an epitaxial growth process or an atomic layer deposition (ALD) process.
In one or more embodiments, the features can be or include a plurality of silicon-germanium/silicon (SiGe/Si) fin structures or a plurality of germanium/silicon (Ge/Si) fin structures. In some examples, each of the SiGe layers, the Si layers, or the Ge layers has a thickness of about 5 nm to about 30 nm, such as about 5 nm, about 8 nm, or about 10 nm to about 12 nm, about 15 nm, about 20 nm, about 25 nm, or about 30 nm.
At operation 104, one or more dielectric precursors can be flowed into the processing chamber via a delivery device, such as a dual channel showerhead (DCSH). The dielectric precursors may be delivered to a surface of the substrate at a flow rate of about 5 sccm to about 5000 sccm per channel of the DSCH, e.g., about 5 sccm to about 250 sccm, about 250 sccm to about 1000 sccm, about 1000 sccm to about 2000 sccm, about 2000 sccm to about 3000 sccm, about 3000 sccm to about 4000 sccm, or about 4000 sccm to about 5000 sccm. The surface of the substrate can be about 40° C. and about 150° C., e.g., about 40° C. to about 60° C., about 60° C. to about 80° C., about 80° C. to about 100° C., about 100° C. to about 120° C., about 120° C. to about 140° C., or about 140° C. to about 150° C. The pressure of the processing chamber can be about 0.5 Torr to about 3 Torr, e.g., about 0.5 Torr to about 1 Torr, about 1 Torr to about 2 Torr, or about 2 Torr to about 3 Torr.
In some embodiments, the dielectric precursor is an organosilicon compound. For example, the organosilicon compound can include a compound having silicon, hydrogen, and/or a combination thereof. In an embodiment, the organosilicon compound can include silane. In some embodiments the dielectric precursor may be delivered to the surface of the substrate using a carrier gas, e.g., argon, hydrogen, helium, or a combination thereof. In an embodiment, the carrier gas may be delivered at a flow rate of about 250 sccm to about 5000 sccm per channel of the DSCH, e.g., about 250 sccm to about 1000 sccm, about 1000 sccm to about 2000 sccm, about 2000 sccm to about 3000 sccm, about 3000 sccm to about 4000 sccm, or about 4000 sccm to about 5000 sccm.
In an embodiment, a flow ratio of about 1:100 to about 1:500 of dielectric precursor to carrier gas, e.g., about 1:100 to about 1:125, about 1:125 to about 1:166, or about 1:166 to about 1:500. Without being bound by theory, a higher ratio of carrier gas to dielectric precursor can increase selective deposition of the dielectric precursor to the bottom of the gap. In an embodiment, the dielectric precursor may be delivered to produce an amorphous silica layer formed on and/or over the features.
The amorphous silica layer can have a thickness of about 20 nm to about 1,000 nm, e.g., about 50 nm to about 1,000 nm, about 50 nm to about 800 nm, about 50 nm to about 600 nm, about 50 nm to about 500 nm, about 50 nm to about 400 nm, about 50 nm to about 300 nm, about 50 nm to about 200 nm, about 50 nm to about 100 nm, about 80 nm to about 1,000 nm, about 80 nm to about 800 nm, about 80 nm to about 600 nm, about 80 nm to about 500 nm, about 80 nm to about 400 nm, about 80 nm to about 300 nm, about 80 nm to about 200 nm, about 80 nm to about 100 nm, about 100 nm to about 1,000 nm, about 100 nm to about 800 nm, about 100 nm to about 600 nm, about 100 nm to about 500 nm, about 100 nm to about 400 nm, about 100 nm to about 300 nm, about 100 nm to about 250 nm, or about 100 nm to about 200 nm.
At operation 106, one or more reactive gases, e.g., hydrogen, can be flowed into the processing chamber via the delivery device to form a modified amorphous silica layer. The one or more reactive gases may interact with the amorphous silica layer to form an etchant gas, e.g., SiH4. The etchant gas may react with the amorphous silica to form Si—H, Si—Si, and Si—H2 at the surface of the amorphous silica layer to form the modified amorphous silica layer.
In some embodiments, at operation 107, a thermal etching process may be performed on the modified amorphous silica layer. The thermal etching process can include flowing a fluorine-containing compound, such as HF, NF3, or a combination thereof, over the modified amorphous silica layer at a temperature of about 400° C. to about 600° C., e.g., about 400° C. to about 450° C., about 450° C. to about 500° C., about 500° C. to about 550° C., or about 550° C. to about 600° C. For example, the thermal etching process can include flowing NF3 over the modified amorphous silica layer at a temperature of about 450° C. In an embodiment, the temperature of about 400° C. to about 600° C. may allow for the NF3 to act as a strong oxidizing agent, reacting with the Si—Si and Si—H2 bonds at the surface of the modified amorphous silica layer to form a uniform layer of Si—H bonds. Without being bound by theory, a uniform layer of Si—H bonds may allow for single layers of Si—H to be nitrated to Si—N—H, Si—N2, or Si—N, as described below, to promote uniform deposition of a dielectric films on the substrate.
The fluorinated compound may be delivered to the substrate at a flow rate of about 500 sccm to about 3000 sccm, e.g., about 500 sccm to about 1000 sccm, about 1000 sccm to about 2000 sccm, or about 2000 sccm to about 3000 sccm. The fluorinated compound may be delivered for a period of about 5 seconds(s) to about 60 s, e.g., about 5 s to about 10 s, about 10 s to about 20 s, about 20 s to about 40 s, or about 40 s to about 60 s. Alternatively, the fluorinated compound may be delivered for a period of greater than 60 s. The pressure of the processing chamber during the thermal etching process can be about 4 Torr to about 6 Torr, e.g., about 4 Torr to about 4.5 Torr, about 4.5 Torr to about 5 Torr, or about 5 Torr to about 6 Torr.
Without being bound by theory, the thermal etching process may prevent and/or reduce defects from forming at the surface of the modified amorphous silica layer, increasing uniformity on the feature of the substrate. Moreover, the thermal etching process may form the uniform layer of the Si—H bonds, reducing and/or eliminating the need for an argon plasma etching step, while maintaining the film quality of the SiN dielectric film.
At operation 108, one or more radicals (also referred to as reactive gas) in the substrate processing region react with the modified amorphous silica layer to form a silicon nitride SiN-based dielectric film. The radicals may be generated by a plasma generated in a remote plasma source (RPS) outside the processing chamber. The radicals may be flowed into a substrate processing region of the processing chamber along with a carrier gas (e.g., Ar, He). The plasma can be generated by the dissociation of a processing precursor gas including molecular oxygen (O2), ozone (O3), molecular hydrogen (H2), a nitrogen-hydrogen compound (e.g., NH3, N2H4), a nitrogen-oxygen compound (e.g., NO, NO2, N2O), a hydrogen-oxygen compound (e.g., H2O, H2O2), a nitrogen-hydrogen-oxygen compound (e.g., NH4OH), a carbon-oxygen compound (e.g., CO, CO2), a fluorine-containing compound (e.g., NF3), or a combination thereof. In the plasma, O*, H*, F*, and/or N*-containing radicals may be activated, such as O*, H*, F*, N*, NH3*, N2H4*, NH2*, NH*, N*O*, C3H6*, C2H2*, or a combination thereof.
In an embodiment, the ion energy of the radicals may be about 25 eV to about 70 eV, e.g., about 25 eV to about 40 eV, about 40 eV to about 60 eV, or about 60 eV to about 70 eV. Without being bound by theory, an ion energy of the radicals that is about 25 eV to about 70 eV may reduce defect formation, e.g., bubbles, in the SiN-based dielectric film. In an embodiment, the dosage value of the radicals may be about 1×1020 ion/cm2 to about 6×1020 ion/cm2 during the plasma treatment, e.g., about 1×1020 ion/cm2, to about 2×1020 ion/cm2, about 2×1020 ion/cm2, to about 3×1020 ion/cm2, about 3×1020 ion/cm2, to about 4×1020 ion/cm2, about 4×1020 ion/cm2, to about 5×1020 ion/cm2, or about 5×1020 ion/cm2, to about 6×1020 ion/cm2. Without being bound by theory, dosage value of the radicals that is about 1×1020 ion/cm2, to about 6×1020 ion/cm2 may reduce defect formation, e.g., bubbles, in the SiN-based dielectric film.
In some embodiments, the radicals activated in the RPS are flowed into the processing chamber (referred to as “radical flux”) at a flow rate between about 1 sccm and about 10000 sccm. The composition of the formed SiN-based dielectric film can be adjusted by changing the composition of the reactive gas in the radical flux. To form a nitrogen-containing film, such as SiON, SiCON, and SiN films, the reactive gas may be, for example, ammonia (NH3), hydrogen (H2), hydrazine (N2H4), nitrogen dioxide (NO2), or nitrogen (N2). Without being bound by theory, when the reactive gas in the substrate processing region reacts with the delivered dielectric precursor, Si—H and N—H bonds (weaker bonds) are partially broken and replaced by Si—N, Si—NH, and/or Si—NH2 bonds (stronger bonds) to form a SiN-dielectric film.
The formed silicon nitride (SiN)-based dielectric film can be exposed to a plasma containing light ions (e.g., ionized species having small atomic numbers in the periodic table), such as argon (e.g., Ar), nitrogen (e.g., N2), or fluorine-containing compounds, (e.g., NF3) in a plasma chamber to promote selective etching of the top of the gap. The plasma chamber is coupled to two power sources, an RF power source, which controls density of ion flux (also referred to as ion dose), via inductive coils and a DC bias, which controls ion energy.
The RF source can have a power of about 40 watts (W) to about 60 W, e.g., about 40 W to about 45 W, about 45 W to about 50 W, about 50 W to about 55 W, or about 55 W to about 60 W, when operating at a very high frequency of about 20 MHz to about 30 MHZ, e.g., about 20 MHz to about 22 MHZ, about 22 MHz to about 24 MHZ, about 24 MHz to about 26 MHz, about 26 MHz to about 28 MHz, or about 28 MHz to about 30 MHz during the plasma treatment. In an embodiment, the plasma may have a power of about 50 Hz when operating at a frequency of about 27 MHz.
The DC bias can have a voltage of about 0.1 kV to about 10 KV, about 0.1 kV to about 8 kV, about 0.1 kV to about 7 kV, about 0.1 kV to about 6 kV, about 0.1 kV to about 5 kV, about 0.1 KV to about 4 kV, about 0.1 KV to about 2 kV, about 0.1 kV to about 1 kV, about 0.1 kV to about 0.5 kV, about 1 KV to about 10 KV, about 1 kV to about 8 kV, about 1 KV to about 7 kV, about 1 kV to about 6 kV, about 1 kV to about 5 kV, about 1 kV to about 4 KV, about 3 kV to about 10 kV, about 3 kV to about 8 kV, about 3 kV to about 7 kV, about 3 kV to about 6 kV, or about 3 kV to about 5 kV during the plasma treatment.
In some embodiments, and at operation 109, a fluorine-containing compound, such as HF, NF3, or a combination thereof, may be introduced to the chamber to promote selective etching of the top of the gap. The fluorine-containing compound may be introduced at a flow rate of about 5 sccm to about 500 sccm, e.g., about 5 sccm to about 50 sccm, about 50 sccm to about 100 sccm, about 100 sccm to about 300 sccm, or about 300 sccm to about 500 sccm. The fluorine-containing compound may be introduced at a pressure of about 0.1 Torr to about 3 Torr, e.g., about 0.1 Torr to about 1 Torr, about 1 Torr to about 2 Torr, or about 2 Torr to about 3 Torr. The fluorine-containing compound may be introduced for a period of about 1 s to about 60 s, e.g., about 1 s to about 20 s, about 20 s to about 40 s, or about 40 s to about 60 s. The fluorine-containing compound may be introduced at a temperature of about 400° C. to about 600° C., e.g., about 400° C. to about 450° C., about 450° C. to about 500° C., about 500° C. to about 550° C., or about 550° C. to about 600° C. In an embodiment, the temperature of about 400° C. to about 600° C. may allow for the NF3 to selectively etch the SiN-based dielectric film at a top of the gap, with minimal and/or no etching of the SiN-based dielectric film at a bottom of the gap.
The formed silicon nitride (SiN)-based dielectric film can be exposed to a recovery process. The recovery process can include a hydrogen, e.g., H2, recovery process. In an embodiment, hydrogen may react with the plasma treated SiN dielectric film to remove one or more defects and/or bubbles on the SiN dielectric film. In an embodiment, the recovery process can include exposing the plasma treated SiN-based dielectric film to a recovery plasma. A recovery plasma includes a plasma containing one or more hydrogen ions, e.g., H*, in a plasma chamber. The hydrogen ion may be introduced at a flow rate of about 500 sccm to about 2500 sccm, e.g., about 500 sccm to about 1000 sccm, about 1000 sccm to about 1500 sccm, about 1500 sccm to about 2000 sccm, or about 2000 sccm to about 2500 sccm. The hydrogen ion may be introduced at a pressure of about 0.1 Torr to about 3 Torr, e.g., about 0.1 Torr to about 1 Torr, about 1 Torr to about 2 Torr, or about 2 Torr to about 3 Torr. The hydrogen ion may be introduced for a period of about 1 s to about 60 s, e.g., about 1 s to about 20 s, about 20 s to about 40 s, or about 40 s to about 60 s. The hydrogen ion may be introduced at a temperature of about 400° C. to about 600° C., e.g., about 400° C. to about 450° C., about 450° C. to about 500° C., about 500° C. to about 550° C., or about 550° C. to about 600° C. In an embodiment, the hydrogen ions may react with the SiF4 bonds formed as a result of the NF3 plasma treatment, causing Si—H bonds to form.
In an embodiment, the exposure to the recovery plasma in conjunction with the hydrogen ions can cause further cross-linking between the formed Si—H bonds and the N—H bonds in the formed SiN-based dielectric film. Without being bound by theory, it is believed that radicals of hydrogen ions activated in the plasma may physically bombard Si—H bonds within the SiN-based dielectric film, thereby breaking the Si—H bonds and causing formation of Si—N, Si—NH, and/or Si—NH2 bonds. The hydrogen ions travel through the formed SiN-based dielectric film to a selected depth without substantially damaging the formed SiN-based dielectric film. This treatment by radicals of the hydrogen ions makes it possible to remove one or more defects and/or bubbles formed from the NF3 plasma etching process increasing the homogeneity to a depth ranging from 1 nm to 5 nm, such as from 3 nm to 4 nm, without damaging the formed SiN-based dielectric film.
The plasma chamber is coupled to two power sources, an RF power source, which controls density of ion flux (also referred to as ion dose), via inductive coils and a DC bias, which controls ion energy.
The RF source can have a power of about 200 watts (W) to about 300 W, e.g., about 200 W to about 220 W, about 220 W to about 240 W, about 240 W to about 260 W, about 260 W to about 280 W, or about 280 W to about 300 W, when operating at a very high frequency of about 20 MHz to about 30 MHZ, e.g., about 20 MHz to about 22 MHz, about 22 MHz to about 24 MHZ, about 24 MHz to about 26 MHZ, about 26 MHz to about 28 MHz, or about 28 MHz to about 30 MHz, during the plasma treatment. In an embodiment, the plasma may have a power of about 240 Hz when operating at a frequency of about 27 MHz.
The DC bias can have a voltage of about 0.1 kV to about 10 KV, about 0.1 kV to about 8 kV, about 0.1 kV to about 7 kV, about 0.1 kV to about 6 kV, about 0.1 kV to about 5 kV, about 0.1 kV to about 4 KV, about 0.1 kV to about 2 kV, about 0.1 kV to about 1 kV, about 0.1 kV to about 0.5 kV, about 1 kV to about 10 KV, about 1 kV to about 8 kV, about 1 kV to about 7 kV, about 1 kV to about 6 kV, about 1 KV to about 5 kV, about 1 kV to about 4 KV, about 3 kV to about 10 KV, about 3 kV to about 8 kV, about 3 kV to about 7 kV, about 3 kV to about 6 kV, or about 3 kV to about 5 kV during the plasma treatment.
In general, the set of operations (e.g. blocks 104-109) may be repeated for multiple cycles to form an overall thicker film.
Embodiments of the deposition systems and techniques may be incorporated into larger fabrication systems for producing integrated circuit chips.
The DCSH 310 is disposed between the chamber plasma region 318 and a substrate processing region 324 and allows radicals activated in the plasma present within the chamber plasma region 318 to pass through a plurality of through-holes 326 into the substrate processing region 324. The flow of the radicals (radical flux) is indicated by the solid arrows “A” in
In some embodiments, a pair of processing chambers (e.g., 208c-d) in
In some embodiments, the number of through-holes 326 may be about 60 holes to about 2000 holes. Through-holes 326 may have round shapes or a variety of shapes. In some embodiments, the smallest diameter of through-holes 326 may be about 0.5 mm to about 20 mm, such as about 1 mm to about 6 mm. The cross-sectional shape of through-holes 326 may be made conical, cylindrical or a combination of the two shapes. In some embodiments, a number of small holes 336 may be used to introduce a dielectric precursor into the substrate processing region 324 and may be about 100 holes to about 5000 holes or about 500 holes to about 2000 holes. The diameter of the small holes 336 may be about 0.1 mm to about 2 mm.
In the lid assembly 404, inner coils 442, middle coils 444, and outer coils 446 are disposed over the lid 408. The inner coils 442 and the outer coils 446 are coupled to an RF power source 448 through a matching circuit 450. Power applied to the outer coils 446 from the RF power source 448 is inductively coupled through the lid 408 to generate plasma from the processing precursor gases provided from the gas source 412 within the substrate processing region 424. The RF power source 448 can provide current at different frequencies to control the plasma density (i.e., number of ions per cc) in the plasma and thus the density of ion flux (ions/cm2·sec). The bias power source controls a voltage between the substrate 428 and the plasma, and thus controls the energy and directionality of the ions. Thus, both ion flux and ion energy can be independently controlled.
A heater assembly 452 may be disposed over the lid 408. The heater assembly 452 may be secured to the lid 408 by clamping members 454, 456.
The surface of the substrate can be held at a temperature of about 100° C. to about 500° C., e.g., about 450° C. A pressure of the plasma chamber may be maintained at about 5 m Torr to about 500 mTorr.
Overall, various embodiments of the present disclosure allow for the selective etching of the top of the gap without etching, or with limited etching, of the bottom of the gap, increasing the uniformity of the dielectric material in the gap. Moreover, defects, e.g., bubbling, may be removed to provide a uniform layer of the dielectric material in the gap using the recovery process. Additionally, a reduction of the buildup of the dielectric material may form by nitrating a single layer of the silicon oxide to form silicon nitride without forming defects and/or altering the silicon nitride film quality.
A reference SiN-based dielectric film was compared to a SiN-based dielectric film produced using a NF3 thermal etching process. Samples were analyzed at a critical dimension of 25 nm, 35 nm, and 50 nm. The films were prepared by flowing 10 sccm SiH4 and 2900 sccm H2 at a pressure of 0.8 Torr for 39 seconds to deposit an amorphous silica layer. The spacing was 1600 mil. The power was 60 W at 27 MHz. 4500 sccm Ar and 600 sccm H2 was introduced to the amorphous silica layer at a pressure of 2.1 Torr for 10 seconds. The spacing was 555 mil, and the power was 60 W. A thermal etching step using a NF3 thermal etching process was performed on the example film by flowing 2000 sccm NF3, 4000 sccm clean Ar (argon flowing from a remote plasma source), and 1000 sccm process Ar (argon flowing from a process gas panel) at a pressure of 5 Torr for 8 seconds. The power was 0 W, and the spacing was 300 mil. The films were then exposed to 2500 sccm N2 at a pressure of 5.5 Torr for 60 seconds. The power was 1000 W, and the spacing was 555 mil. The use of the NF3 thermal etching allowed for a uniform Si—N—H dielectric film to be produced, with limited defects, as shown in
A reference SiN-based dielectric film was compared to a SiN-based dielectric film produced using a plasma NF3 etching process. Samples were analyzed at a critical dimension of 25 nm, 35 nm, and 50 nm. The films were prepared by flowing 10 sccm SiH4 and 2900 sccm H2 at a pressure of 0.8 Torr for 39 seconds to deposit an amorphous silica layer. The spacing was 1600 mil. The power was 60 W at 27 MHz. 4500 sccm Ar and 600 sccm H2 was introduced to the amorphous silica layer at a pressure of 2.1 Torr for 10 seconds. The spacing was 555 mil, and the power was 60 W. The films were then exposed to 2500 sccm N2 at a pressure of 5.5 Torr for 60 seconds. The power was 1000 W, and the spacing was 555 mil.
The Si—N based dielectric film was then etched using a plasma in the presence of NF3. NF3 was introduced at a flow rate of 15 sccm, for a period of 15 seconds, to a plasma operating at 50 W, with a frequency of 27 MHz. The pressure was 1 Torr, and the spacing was 300 mil. A carrier gas of Argon was introduced at 300 sccm. The temperature was 450° C. The SiN-based dielectric film was then treated according to a recovery process. Hydrogen gas was introduced at a flow rate of 2500 sccm, for a period of 20 seconds, to a plasma operating at 250 W and a frequency of 27 MHz. The pressure was 2.5 Torr and the spacing was 555 mil. The use of the plasma NF3 etching allowed for selective top etching compared to bottom etching, as the bottom to top ratio increased from 0.9 to 3.5, promoting a uniform SiN-based dielectric film on the features of the substrate, as shown in
A number of defects present in a SiN-based dielectric film was analyzed. A first and second SiN-based dielectric film were produced using a plasma NF3 etching process. The first film was used as a reference, while the second film was treated by a recovery process that introduced H2 at a flow rate of 2500 sccm while operating a plasma at 250 W and a frequency of 27 MHz. The pressure was 2.5 Torr, the dosage time was 20 seconds, and the spacing was 555 mil. The first film was overloaded with defects, e.g., greater than 100,000 defects. Alternatively, the second film contained only 11 defects present in the SiN-based dielectric film. Without being bound by theory, the recovery process including a hydrogen ion reduced the number of defects present in the SiN-based dielectric film, increasing the film quality.
A first wet etch rate and second wet etch rate of a conventional SiN-based dielectric film, SiN-based dielectric film produced using plasma NF3 etching, and a SiN-based dielectric film produced using plasma NF3 etching treated with a recovery process was determined. The first wet etch rate was determined on surface of the SiN-based dielectric film, while the second wet etch rate was determined after the first wet etch rate on a location of the SiN-based dielectric film below the surface. The SiN-based dielectric film produced using plasma NF3 etching had the highest wet etch rate due to the variations of film surface quality after exposure to the NF3. However, after the recovery process was performed on the dielectric film, the wet etch rate returned to that of a conventional SiN-based dielectric film, as shown in
While the foregoing is directed to embodiments of the disclosure, other and further embodiments may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow. All documents described herein are incorporated by reference herein, including any priority documents and/or testing procedures to the extent they are not inconsistent with this text. As is apparent from the foregoing general description and the specific embodiments, while forms of the present disclosure have been illustrated and described, various modifications can be made without departing from the spirit and scope of the present disclosure. Accordingly, it is not intended that the present disclosure be limited thereby. Likewise, the term “comprising” is considered synonymous with the term “including” for purposes of United States law. Likewise, whenever a composition, an element, or a group of elements is preceded with the transitional phrase “comprising”, it is understood that the same composition or group of elements with transitional phrases “consisting essentially of”, “consisting of”, “selected from the group of consisting of”, or “is” preceding the recitation of the composition, element, or elements and vice versa, are contemplated. As used herein, the term “about” refers to a +/−10% variation from the nominal value. It is to be understood that such a variation can be included in any value provided herein.
Certain embodiments and features have been described using a set of numerical upper limits and a set of numerical lower limits. It should be appreciated that ranges including the combination of any two values, e.g., the combination of any lower value with any upper value, the combination of any two lower values, and/or the combination of any two upper values are contemplated unless otherwise indicated. Certain lower limits, upper limits and ranges appear in one or more claims below.
