Donald L. Plumton

Person

Dallas, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Methods and devices for determining logical to physical mapping on...
- Patent number 9,378,848
- Issue date Jun 28, 2016
- Texas Instruments Incorporated
- Stanton Petree Ashburn
- G11 - INFORMATION STORAGE
Information Patent Grant
Integrated circuit having interleaved gridded features, mask set, a...
- Patent number 8,580,685
- Issue date Nov 12, 2013
- Texas Instruments Incorporated
- Thomas J. Aton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated circuit having interleaved gridded features, mask set an...
- Patent number 8,173,544
- Issue date May 8, 2012
- Texas Instruments Incorporated
- Thomas J. Aton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Simplifying conductive plate/via isolation
- Patent number 6,271,078
- Issue date Aug 7, 2001
- Texas Instruments Incorporated
- Stephen W. Russell
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial overgrowth method and devices
- Patent number 6,229,197
- Issue date May 8, 2001
- Texas Instruments Incorporated
- Donald Lynn Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical field effect transistor and diode
- Patent number 6,097,046
- Issue date Aug 1, 2000
- Texas Instruments Incorporated
- Donald L. Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low capacitance power VFET method and device
- Patent number 5,910,665
- Issue date Jun 8, 1999
- Texas Instruments Incorporated
- Donald Lynn Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Integrated voltage regulator circuit with vertical transistor
- Patent number 5,909,110
- Issue date Jun 1, 1999
- Texas Insturments Incorporated
- Han-Tzong Yuan
- G05 - CONTROLLING REGULATING
Information Patent Grant
Vertical JFET field effect transistor
- Patent number 5,889,298
- Issue date Mar 30, 1999
- Texas Instruments Incorporated
- Donald Lynn Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial overgrowth method and devices
- Patent number 5,747,842
- Issue date May 5, 1998
- Texas Instruments Incorporated
- Donald L. Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capped anneal
- Patent number 5,744,375
- Issue date Apr 28, 1998
- Texas Instruments Incorporated
- Yung-Chung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial overgrowth method
- Patent number 5,712,189
- Issue date Jan 27, 1998
- Texas Instruments Incorporated
- Donald Lynn Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of self-aligning an emitter contact in a planar heterojuncti...
- Patent number 5,698,460
- Issue date Dec 16, 1997
- Texas Instruments Incorporated
- Jau-Yuann Yang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capped anneal
- Patent number 5,659,188
- Issue date Aug 19, 1997
- Texas Instruments Incorporated
- Yung-Chung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Vertical field effect transistor and method
- Patent number 5,624,860
- Issue date Apr 29, 1997
- Texas Instruments Incorporated
- Donald L. Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of dry etching InAlAs and InGaAs lattice matched to InP
- Patent number 5,616,213
- Issue date Apr 1, 1997
- Texas Instruments Incorporated
- Timothy S. Henderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making a vertical FET using epitaxial overgrowth
- Patent number 5,610,085
- Issue date Mar 11, 1997
- Texas Instruments Incorporated
- Han-Tzong Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Epitaxial overgrowth method
- Patent number 5,554,561
- Issue date Sep 10, 1996
- Texas Instruments Incorporated
- Donald L. Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Bipolar transistor having a self emitter contact aligned
- Patent number 5,548,141
- Issue date Aug 20, 1996
- Texas Instruments Incorporated
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of dry etching InAlAs and InGaAs lattice matched to InP
- Patent number 5,474,652
- Issue date Dec 12, 1995
- Texas Instruments Incorporated
- Timothy S. Henderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making power VFET device
- Patent number 5,468,661
- Issue date Nov 21, 1995
- Texas Instruments Incorporated
- Han-Tzong Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of self aligning an emitter contact in a heterojunction bipo...
- Patent number 5,436,181
- Issue date Jul 25, 1995
- Texas Instruments Incorporated
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating a semiplanar heterojunction bipolar transistor
- Patent number 5,420,052
- Issue date May 30, 1995
- Texas Instruments Incorporated
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced performance bipolar transistor process
- Patent number 5,407,842
- Issue date Apr 18, 1995
- Texas Intruments Incorporated
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Capped anneal
- Patent number 5,391,515
- Issue date Feb 21, 1995
- Texas Instruments Incorporated
- Yung-Chung Kao
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Enhanced performance bipolar transistor process
- Patent number 5,369,042
- Issue date Nov 29, 1994
- Texas Instruments Incorporated
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Lateral complementary heterojunction bipolar transistor and process...
- Patent number 5,362,657
- Issue date Nov 8, 1994
- Texas Instruments Incorporated
- Timothy S. Henderson
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of fabricating power VFET gate-refill
- Patent number 5,342,795
- Issue date Aug 30, 1994
- Texas Instruments Incorporated
- Han-Tzong Yuan
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method to integrate HBTs and FETs
- Patent number 5,243,207
- Issue date Sep 7, 1993
- Texas Instruments Incorporated
- Donald L. Plumton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of making an integrated circuit composed of group III-V comp...
- Patent number 5,223,449
- Issue date Jun 29, 1993
- Francis J. Morris
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
METHODS AND DEVICES FOR DETERMINING LOGICAL TO PHYSICAL MAPPING ON...
- Publication number 20160245861
- Publication date Aug 25, 2016
- TEXAS INSTRUMENTS INCORPORATED
- Stanton Petree Ashburn
- G01 - MEASURING TESTING
Information Patent Application
Methods And Devices For Determining Logical To Physical Mapping On...
- Publication number 20130329508
- Publication date Dec 12, 2013
- TEXAS INSTRUMENTS INCORPORATED
- Stanton Petree Ashburn
- G01 - MEASURING TESTING
Information Patent Application
Integrated Circuit Having Interleaved Gridded Features, Mask Set, a...
- Publication number 20120220133
- Publication date Aug 30, 2012
- TEXAS INSTRUMENTS INCORPORATED
- Thomas J. Aton
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
INTEGRATED CIRCUIT HAVING INTERLEAVED GRIDDED FEATURES, MASK SET AN...
- Publication number 20090273100
- Publication date Nov 5, 2009
- Texas Instruments Inc.
- Thomas J. Aton
- H01 - BASIC ELECTRIC ELEMENTS

Donald L. Plumton

Person

Patents Grantslast 30 patents

Methods and devices for determining logical to physical mapping on...

Integrated circuit having interleaved gridded features, mask set, a...

Integrated circuit having interleaved gridded features, mask set an...

Simplifying conductive plate/via isolation

Epitaxial overgrowth method and devices

Vertical field effect transistor and diode

Low capacitance power VFET method and device

Integrated voltage regulator circuit with vertical transistor

Vertical JFET field effect transistor

Epitaxial overgrowth method and devices

Capped anneal

Epitaxial overgrowth method

Method of self-aligning an emitter contact in a planar heterojuncti...

Capped anneal

Vertical field effect transistor and method

Method of dry etching InAlAs and InGaAs lattice matched to InP

Method of making a vertical FET using epitaxial overgrowth

Epitaxial overgrowth method

Bipolar transistor having a self emitter contact aligned

Method of dry etching InAlAs and InGaAs lattice matched to InP

Method of making power VFET device

Method of self aligning an emitter contact in a heterojunction bipo...

Method of fabricating a semiplanar heterojunction bipolar transistor

Enhanced performance bipolar transistor process

Capped anneal

Enhanced performance bipolar transistor process

Lateral complementary heterojunction bipolar transistor and process...

Method of fabricating power VFET gate-refill

Method to integrate HBTs and FETs

Method of making an integrated circuit composed of group III-V comp...

Patents Applicationslast 30 patents

METHODS AND DEVICES FOR DETERMINING LOGICAL TO PHYSICAL MAPPING ON...

Methods And Devices For Determining Logical To Physical Mapping On...

Integrated Circuit Having Interleaved Gridded Features, Mask Set, a...

INTEGRATED CIRCUIT HAVING INTERLEAVED GRIDDED FEATURES, MASK SET AN...