James S. Koford

Person

Monterey, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
System and method for routing connections with improved interconnec...
- Patent number 8,042,076
- Issue date Oct 18, 2011
- SuVolta, Inc.
- Payman Zarkesh-Ha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System and method for routing connections
- Patent number 7,689,964
- Issue date Mar 30, 2010
- SuVolta, Inc.
- Payman Zarkesh-Ha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for mapping platform-based design to multiple...
- Patent number 7,076,746
- Issue date Jul 11, 2006
- LSI Logic Corporation
- Christopher L. Hamlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and apparatus for implementing a metamethodology
- Patent number 6,999,910
- Issue date Feb 14, 2006
- LSI Logic Corporation
- James S. Koford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for design optimization using logical and physical information
- Patent number 6,557,145
- Issue date Apr 29, 2003
- Monterey Design Systems, Inc.
- Douglas B. Boyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Optimization processing for integrated circuit physical design auto...
- Patent number 6,493,658
- Issue date Dec 10, 2002
- LSI Logic Corporation
- James S. Koford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Hexagonal architecture
- Patent number 6,407,434
- Issue date Jun 18, 2002
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Programmable triangular shaped device having variable gain
- Patent number 6,312,980
- Issue date Nov 6, 2001
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system
- Patent number 6,292,929
- Issue date Sep 18, 2001
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for design optimization using logical and physical information
- Patent number 6,286,128
- Issue date Sep 4, 2001
- Monterey Design Systems, Inc.
- Lawrence Pileggi
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with overlap remover with mi...
- Patent number 6,223,332
- Issue date Apr 24, 2001
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Cell placement representation and transposition for integrated circ...
- Patent number 6,155,725
- Issue date Dec 5, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 6,134,702
- Issue date Oct 17, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for providing performance-driven logic optimization in an in...
- Patent number 6,099,580
- Issue date Aug 8, 2000
- Monterey Design Systems, Inc.
- Douglas B. Boyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Triangular semiconductor or gate
- Patent number 6,097,073
- Issue date Aug 1, 2000
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method and system for improving a placement of cells using energeti...
- Patent number 6,088,519
- Issue date Jul 11, 2000
- LSI Logic Corporation
- James S. Koford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with sinusoidal optimization
- Patent number 6,085,032
- Issue date Jul 4, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system
- Patent number 6,067,409
- Issue date May 23, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 6,038,385
- Issue date Mar 14, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with median control and incr...
- Patent number 6,030,110
- Issue date Feb 29, 2000
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with overlap remover with mi...
- Patent number 6,026,223
- Issue date Feb 15, 2000
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit layout routing using multiprocessing
- Patent number 5,980,093
- Issue date Nov 9, 1999
- LSI Logic Corporation
- Edwin Jones
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with optimization of cell ne...
- Patent number 5,971,588
- Issue date Oct 26, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Architecture having diamond shaped or parallelogram shaped cells
- Patent number 5,973,376
- Issue date Oct 26, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with functional sieve optimi...
- Patent number 5,963,455
- Issue date Oct 5, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Single chip integrated circuit distributed shared memory (DSM) and...
- Patent number 5,963,975
- Issue date Oct 5, 1999
- LSI Logic Corporation
- Douglas B. Boyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Congestion based cost factor computing apparatus for integrated cir...
- Patent number 5,914,887
- Issue date Jun 22, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Advanced modular cell placement system with coarse overflow remover
- Patent number 5,914,888
- Issue date Jun 22, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Physical design automation system and process for designing integra...
- Patent number 5,909,376
- Issue date Jun 1, 1999
- LSI Logic Corporation
- Ranko Scepanovic
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method of cell placement for an integrated circuit chip comprising...
- Patent number 5,903,461
- Issue date May 11, 1999
- LSI Logic Corporation
- Michael D. Rostoker
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
SYSTEM AND METHOD FOR ROUTING CONNECTIONS WITH IMPROVED INTERCONNEC...
- Publication number 20090282382
- Publication date Nov 12, 2009
- DSM Solutions, Inc.
- Payman Zarkesh-Ha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
SYSTEM AND METHOD FOR ROUTING CONNECTIONS
- Publication number 20090164963
- Publication date Jun 25, 2009
- DSM Solutions, Inc.
- Payman Zarkesh-Ha
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for mapping platform-based design to multiple...
- Publication number 20050034086
- Publication date Feb 10, 2005
- Christopher L. Hamlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for mapping platform-based design to multiple...
- Publication number 20050034087
- Publication date Feb 10, 2005
- Christopher L. Hamlin
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
System and method for integrated circuit design
- Publication number 20040025133
- Publication date Feb 5, 2004
- James S. Koford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method and apparatus for implementing a metamethodology
- Publication number 20030097241
- Publication date May 22, 2003
- James S. Koford
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Method for design optimization using logical and physical information
- Publication number 20010010090
- Publication date Jul 26, 2001
- Douglas B. Boyle
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
ADVANCED MODULAR CELL PLACEMENT SYSTEM
- Publication number 20010003843
- Publication date Jun 14, 2001
- RANKO SCEPANOVIC
- G06 - COMPUTING CALCULATING COUNTING

James S. Koford

Person

Patents Grantslast 30 patents

System and method for routing connections with improved interconnec...

System and method for routing connections

Method and apparatus for mapping platform-based design to multiple...

Method and apparatus for implementing a metamethodology

Method for design optimization using logical and physical information

Optimization processing for integrated circuit physical design auto...

Hexagonal architecture

Programmable triangular shaped device having variable gain

Advanced modular cell placement system

Method for design optimization using logical and physical information

Advanced modular cell placement system with overlap remover with mi...

Cell placement representation and transposition for integrated circ...

Physical design automation system and process for designing integra...

Method for providing performance-driven logic optimization in an in...

Triangular semiconductor or gate

Method and system for improving a placement of cells using energeti...

Advanced modular cell placement system with sinusoidal optimization

Advanced modular cell placement system

Physical design automation system and process for designing integra...

Advanced modular cell placement system with median control and incr...

Advanced modular cell placement system with overlap remover with mi...

Integrated circuit layout routing using multiprocessing

Advanced modular cell placement system with optimization of cell ne...

Architecture having diamond shaped or parallelogram shaped cells

Advanced modular cell placement system with functional sieve optimi...

Single chip integrated circuit distributed shared memory (DSM) and...

Congestion based cost factor computing apparatus for integrated cir...

Advanced modular cell placement system with coarse overflow remover

Physical design automation system and process for designing integra...

Method of cell placement for an integrated circuit chip comprising...

Patents Applicationslast 30 patents

SYSTEM AND METHOD FOR ROUTING CONNECTIONS WITH IMPROVED INTERCONNEC...

SYSTEM AND METHOD FOR ROUTING CONNECTIONS

Method and apparatus for mapping platform-based design to multiple...

Method and apparatus for mapping platform-based design to multiple...

System and method for integrated circuit design

Method and apparatus for implementing a metamethodology

Method for design optimization using logical and physical information

ADVANCED MODULAR CELL PLACEMENT SYSTEM