Jerrold L. King

Person

Morgan Hill, CA, US

People

Patents Grantslast 30 patents

Information Patent Grant
Method of forming a stack of packaged memory dice
- Patent number 7,091,061
- Issue date Aug 15, 2006
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip package
- Patent number 7,038,315
- Issue date May 2, 2006
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic lead frames for semiconductor devices and packages includin...
- Patent number 7,005,731
- Issue date Feb 28, 2006
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Plastic lead frames for semiconductor devices
- Patent number 6,979,889
- Issue date Dec 27, 2005
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Multichip semiconductor package
- Patent number 6,906,409
- Issue date Jun 14, 2005
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Apparatus for forming a stack of packaged memory dice
- Patent number 6,897,553
- Issue date May 24, 2005
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a stack of packaged memory dice
- Patent number 6,884,654
- Issue date Apr 26, 2005
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic lead frames for semiconductor devices, packages including s...
- Patent number 6,872,600
- Issue date Mar 29, 2005
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Plastic lead frames for semiconductor devices, packages including s...
- Patent number 6,841,422
- Issue date Jan 11, 2005
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit package alignment feature
- Patent number 6,836,003
- Issue date Dec 28, 2004
- Micron Technology, Inc.
- David J. Corisis
- G01 - MEASURING TESTING
Information Patent Grant
Plastic lead frames for semiconductor devices, packages including s...
- Patent number 6,787,399
- Issue date Sep 7, 2004
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Single-piece molded module housing
- Patent number 6,781,848
- Issue date Aug 24, 2004
- Micron Technology, Inc.
- Warren M. Farnworth
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low profile multi-IC chip package connector
- Patent number 6,773,955
- Issue date Aug 10, 2004
- Micron Technology, Inc.
- Walter L. Moden
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Plastic lead frames for semiconductor devices
- Patent number 6,762,485
- Issue date Jul 13, 2004
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Adhesion enhanced semiconductor die for mold compound packaging
- Patent number 6,740,545
- Issue date May 25, 2004
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic lead frames for semiconductor devices and packages includin...
- Patent number 6,724,073
- Issue date Apr 20, 2004
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Low profile multi-IC chip package connector
- Patent number 6,686,655
- Issue date Feb 3, 2004
- Micron Technology, Inc.
- Walter L. Moden
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Method of using a semiconductor chip package
- Patent number 6,682,946
- Issue date Jan 27, 2004
- Micron Technology, Inc.
- Jerrold L. King
- G01 - MEASURING TESTING
Information Patent Grant
Apparatus for forming a stack of packaged memory dice
- Patent number 6,677,671
- Issue date Jan 13, 2004
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Semiconductor chip package with alignment structure
- Patent number 6,670,720
- Issue date Dec 30, 2003
- Micron Technology, Inc.
- Jerrold L. King
- G01 - MEASURING TESTING
Information Patent Grant
Method of forming a stack of packaged memory dice
- Patent number 6,656,767
- Issue date Dec 2, 2003
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Reduced stress LOC assembly
- Patent number 6,590,277
- Issue date Jul 8, 2003
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Single-piece molded module housing
- Patent number 6,570,771
- Issue date May 27, 2003
- Micron Technology, Inc.
- Warren M. Farnworth
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Integrated circuit device having cyanate ester buffer coat and meth...
- Patent number 6,559,519
- Issue date May 6, 2003
- Micron Technology, Inc.
- J. Mike Brooks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Plastic lead frames for semiconductor devices, packages including s...
- Patent number 6,544,820
- Issue date Apr 8, 2003
- Micron Technology, Inc.
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Redundancy mapping in a multichip semiconductor package
- Patent number 6,531,339
- Issue date Mar 11, 2003
- Micron Technology, Inc.
- Jerrold L. King
- G11 - INFORMATION STORAGE
Information Patent Grant
Adhesion enhanced semiconductor die for mold compound packaging
- Patent number 6,489,186
- Issue date Dec 3, 2002
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Low profile multi-IC chip package connector
- Patent number 6,486,546
- Issue date Nov 26, 2002
- Micron Technology, Inc.
- Walter L. Moden
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Grant
Methods for a low profile multi-IC chip package connector
- Patent number 6,475,831
- Issue date Nov 5, 2002
- Micron Technology, Inc.
- Walter L. Moden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Grant
Method of forming a stack of packaged memory die and resulting appa...
- Patent number 6,465,275
- Issue date Oct 15, 2002
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS

Patents Applicationslast 30 patents

Information Patent Application
Methods of making semiconductor fuses
- Publication number 20080003712
- Publication date Jan 3, 2008
- Walter L. Moden
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method of forming a stack of packaged memory dice
- Publication number 20060252181
- Publication date Nov 9, 2006
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method for a low profile multi-IC chip package connector
- Publication number 20060252180
- Publication date Nov 9, 2006
- Walter L. Moden
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20060138619
- Publication date Jun 29, 2006
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Semiconductor device structure with adhesion-enhanced semiconductor...
- Publication number 20050253243
- Publication date Nov 17, 2005
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multichip semiconductor package
- Publication number 20050212143
- Publication date Sep 29, 2005
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of forming a stack of packaged memory dice
- Publication number 20050170558
- Publication date Aug 4, 2005
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low profile multi-IC chip package connector
- Publication number 20050158912
- Publication date Jul 21, 2005
- Walter L. Moden
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Adhesion enhanced semiconductor die for mold compound packaging
- Publication number 20050001295
- Publication date Jan 6, 2005
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plastic lead frames for semiconductor devices and packages includin...
- Publication number 20040173882
- Publication date Sep 9, 2004
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Plastic lead frames for semiconductor devices
- Publication number 20040173896
- Publication date Sep 9, 2004
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Low profile multi-IC chip package connector
- Publication number 20040168316
- Publication date Sep 2, 2004
- Walter L. Moden
- Y02 - TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMA...
Information Patent Application
Method of forming a stack of packaged memory dice
- Publication number 20040038450
- Publication date Feb 26, 2004
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Apparatus for forming a stack of packaged memory dice
- Publication number 20040026791
- Publication date Feb 12, 2004
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Single-piece molded module housing
- Publication number 20030193788
- Publication date Oct 16, 2003
- Warren M. Farnworth
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20030153132
- Publication date Aug 14, 2003
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20030153133
- Publication date Aug 14, 2003
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20030153131
- Publication date Aug 14, 2003
- Tongbi Jiang
- H05 - ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
Information Patent Application
Adhesion enhanced semiconductor die for mold compound packaging
- Publication number 20030082849
- Publication date May 1, 2003
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Integrated circuit device having cyanate ester buffer coat and meth...
- Publication number 20020195687
- Publication date Dec 26, 2002
- Micron Technology, Inc.
- J. Mike Brooks
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low profile multi-IC chip package connector
- Publication number 20020185725
- Publication date Dec 12, 2002
- Walter L. Moden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low profile multi-IC chip package connector
- Publication number 20020182772
- Publication date Dec 5, 2002
- Walter L. Moden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Multichip semiconductor package
- Publication number 20020140077
- Publication date Oct 3, 2002
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Method of using a semiconductor chip package
- Publication number 20020110957
- Publication date Aug 15, 2002
- Jerrold L. King
- G01 - MEASURING TESTING
Information Patent Application
Method of forming a stack of packaged memory die and resulting appa...
- Publication number 20020109221
- Publication date Aug 15, 2002
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Low profile multi-IC chip package connector
- Publication number 20020084520
- Publication date Jul 4, 2002
- Walter L. Moden
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
MULTICHIP SEMICONDUCTOR PACKAGE
- Publication number 20020053743
- Publication date May 9, 2002
- JERROLD L. KING
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Redundancy mapping in a multichip semiconductor package
- Publication number 20020027813
- Publication date Mar 7, 2002
- Micron Technology, Inc.
- Jerrold L. King
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20020005570
- Publication date Jan 17, 2002
- Tongbi Jiang
- H01 - BASIC ELECTRIC ELEMENTS
Information Patent Application
Plastic lead frames for semiconductor devices, packages including s...
- Publication number 20020005571
- Publication date Jan 17, 2002
- Tongbi Jiang
- H01 - BASIC ELECTRIC ELEMENTS

Jerrold L. King

Person

Patents Grantslast 30 patents

Method of forming a stack of packaged memory dice

Semiconductor chip package

Plastic lead frames for semiconductor devices and packages includin...

Plastic lead frames for semiconductor devices

Multichip semiconductor package

Apparatus for forming a stack of packaged memory dice

Method of forming a stack of packaged memory dice

Plastic lead frames for semiconductor devices, packages including s...

Plastic lead frames for semiconductor devices, packages including s...

Integrated circuit package alignment feature

Plastic lead frames for semiconductor devices, packages including s...

Single-piece molded module housing

Low profile multi-IC chip package connector

Plastic lead frames for semiconductor devices

Adhesion enhanced semiconductor die for mold compound packaging

Plastic lead frames for semiconductor devices and packages includin...

Low profile multi-IC chip package connector

Method of using a semiconductor chip package

Apparatus for forming a stack of packaged memory dice

Semiconductor chip package with alignment structure

Method of forming a stack of packaged memory dice

Reduced stress LOC assembly

Single-piece molded module housing

Integrated circuit device having cyanate ester buffer coat and meth...

Plastic lead frames for semiconductor devices, packages including s...

Redundancy mapping in a multichip semiconductor package

Adhesion enhanced semiconductor die for mold compound packaging

Low profile multi-IC chip package connector

Methods for a low profile multi-IC chip package connector

Method of forming a stack of packaged memory die and resulting appa...

Patents Applicationslast 30 patents

Methods of making semiconductor fuses

Method of forming a stack of packaged memory dice

Method for a low profile multi-IC chip package connector

Plastic lead frames for semiconductor devices, packages including s...

Semiconductor device structure with adhesion-enhanced semiconductor...

Multichip semiconductor package

Method of forming a stack of packaged memory dice

Low profile multi-IC chip package connector

Adhesion enhanced semiconductor die for mold compound packaging

Plastic lead frames for semiconductor devices and packages includin...

Plastic lead frames for semiconductor devices

Low profile multi-IC chip package connector

Method of forming a stack of packaged memory dice

Apparatus for forming a stack of packaged memory dice

Single-piece molded module housing

Plastic lead frames for semiconductor devices, packages including s...

Plastic lead frames for semiconductor devices, packages including s...

Plastic lead frames for semiconductor devices, packages including s...

Adhesion enhanced semiconductor die for mold compound packaging

Integrated circuit device having cyanate ester buffer coat and meth...

Low profile multi-IC chip package connector

Low profile multi-IC chip package connector

Multichip semiconductor package

Method of using a semiconductor chip package

Method of forming a stack of packaged memory die and resulting appa...

Low profile multi-IC chip package connector

MULTICHIP SEMICONDUCTOR PACKAGE

Redundancy mapping in a multichip semiconductor package

Plastic lead frames for semiconductor devices, packages including s...

Plastic lead frames for semiconductor devices, packages including s...