PETER N. EHLIG

Person

SUGARLAND, TX, US

People

Patents Grantslast 30 patents

Information Patent Grant
Program counter trace stack, access port, and serial scan path
- Patent number 6,996,747
- Issue date Feb 7, 2006
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Repeat block with zero cycle overhead nesting
- Patent number 6,986,028
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Microphone/speaker system with context switching in processor
- Patent number 6,986,142
- Issue date Jan 10, 2006
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC with wait state registers
- Patent number 6,918,025
- Issue date Jul 12, 2005
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Volatile memory cell reconfigured as a non-volatile memory cell
- Patent number 6,768,669
- Issue date Jul 27, 2004
- Texas Instruments Incorporated
- James T. Schmidt
- G11 - INFORMATION STORAGE
Information Patent Grant
Digital signal processing unit with emulation circuitry and debug i...
- Patent number 6,567,910
- Issue date May 20, 2003
- Texas Instruments Incorporated
- Alexander Tessarolo
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor condition sensing circuits, systems and methods
- Patent number 6,546,505
- Issue date Apr 8, 2003
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
DSP with wait state registers having at least two portions
- Patent number 6,334,181
- Issue date Dec 25, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Digital signal processor with wait state register
- Patent number 6,311,264
- Issue date Oct 30, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Integrated circuit with wait state registers
- Patent number 6,263,419
- Issue date Jul 17, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Process of operating a microprocessor to use wait state numbers
- Patent number 6,263,418
- Issue date Jul 17, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing device with mask and status bits for selecting a se...
- Patent number 6,253,307
- Issue date Jun 26, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
IC with wait state registers
- Patent number 6,249,859
- Issue date Jun 19, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System with wait state registers
- Patent number 6,249,860
- Issue date Jun 19, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System with wait state register
- Patent number 6,247,111
- Issue date Jun 12, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System with wait state registers
- Patent number 6,243,801
- Issue date Jun 5, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
System with wait state registers
- Patent number 6,240,505
- Issue date May 29, 2001
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Data processing device and method of operation with context switching
- Patent number 6,134,578
- Issue date Oct 17, 2000
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Processor condition sensing circuits, systems and methods
- Patent number 6,032,268
- Issue date Feb 29, 2000
- Texas Instruments Incorporated
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices, systems and methods for conditional instructions
- Patent number 5,946,483
- Issue date Aug 31, 1999
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Method for pipelined data processing with conditioning instructions...
- Patent number 5,907,714
- Issue date May 25, 1999
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with protective terminal configuration, and met...
- Patent number 5,828,577
- Issue date Oct 27, 1998
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with parallel logic unit operable on data memor...
- Patent number 5,829,054
- Issue date Oct 27, 1998
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with protective terminal configuration, and met...
- Patent number 5,777,885
- Issue date Jul 7, 1998
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with protective terminal configuration, and met...
- Patent number 5,724,248
- Issue date Mar 3, 1998
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with conditional instructions
- Patent number 5,652,910
- Issue date Jul 29, 1997
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices, systems and methods for conditional instructions
- Patent number 5,617,574
- Issue date Apr 1, 1997
- Texas Instruments Incorporated
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with parallel logic unit operable on data memor...
- Patent number 5,586,275
- Issue date Dec 17, 1996
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with parallel logic unit, and methods notice
- Patent number 5,583,767
- Issue date Dec 10, 1996
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Grant
Devices and systems with parallel logic unit, and methods
- Patent number 5,579,218
- Issue date Nov 26, 1996
- Texas Instruments Incorporated
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING

Patents Applicationslast 30 patents

Information Patent Application
Processor condition sensing circuits, systems and methods
- Publication number 20060059387
- Publication date Mar 16, 2006
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Context switching devices, systems and methods
- Publication number 20050278512
- Publication date Dec 15, 2005
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Devices, systems and methods for conditional instructions
- Publication number 20050251638
- Publication date Nov 10, 2005
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Volatile memory cell reconfigured as a non-volatile memory cell
- Publication number 20040052103
- Publication date Mar 18, 2004
- TEXAS INSTRUMENTS INCORPORATED
- James T. Schmidt
- G11 - INFORMATION STORAGE
Information Patent Application
Devices, systems and methods for conditional instructions notice
- Publication number 20030226002
- Publication date Dec 4, 2003
- Frederic Boutaud
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Repeat block with zero cycle overhead nesting
- Publication number 20030200423
- Publication date Oct 23, 2003
- Peter N. Ehlig
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
Processor condition sensing circuits, systems and methods
- Publication number 20030196144
- Publication date Oct 16, 2003
- Gary L. Swoboda
- G06 - COMPUTING CALCULATING COUNTING
Information Patent Application
APPARATUS AND METHOD FOR CODE-ENHANCED PERFORMANCE IN A DIGITAL SIG...
- Publication number 20020112144
- Publication date Aug 15, 2002
- ALEXANDER TESSAROLO
- G06 - COMPUTING CALCULATING COUNTING

PETER N. EHLIG

Person

Patents Grantslast 30 patents

Program counter trace stack, access port, and serial scan path

Repeat block with zero cycle overhead nesting

Microphone/speaker system with context switching in processor

IC with wait state registers

Volatile memory cell reconfigured as a non-volatile memory cell

Digital signal processing unit with emulation circuitry and debug i...

Processor condition sensing circuits, systems and methods

DSP with wait state registers having at least two portions

Digital signal processor with wait state register

Integrated circuit with wait state registers

Process of operating a microprocessor to use wait state numbers

Data processing device with mask and status bits for selecting a se...

IC with wait state registers

System with wait state registers

System with wait state register

System with wait state registers

System with wait state registers

Data processing device and method of operation with context switching

Processor condition sensing circuits, systems and methods

Devices, systems and methods for conditional instructions

Method for pipelined data processing with conditioning instructions...

Devices and systems with protective terminal configuration, and met...

Devices and systems with parallel logic unit operable on data memor...

Devices and systems with protective terminal configuration, and met...

Devices and systems with protective terminal configuration, and met...

Devices and systems with conditional instructions

Devices, systems and methods for conditional instructions

Devices and systems with parallel logic unit operable on data memor...

Devices and systems with parallel logic unit, and methods notice

Devices and systems with parallel logic unit, and methods

Patents Applicationslast 30 patents

Processor condition sensing circuits, systems and methods

Context switching devices, systems and methods

Devices, systems and methods for conditional instructions

Volatile memory cell reconfigured as a non-volatile memory cell

Devices, systems and methods for conditional instructions notice

Repeat block with zero cycle overhead nesting

Processor condition sensing circuits, systems and methods

APPARATUS AND METHOD FOR CODE-ENHANCED PERFORMANCE IN A DIGITAL SIG...