An atomic layer deposition (ALD) process is a well known deposition technique in the semiconductor industry. The ALD process employs a precursor material which can react with or chemisorb on a surface in process to build up successively deposited layers, each of which layers being characterized with thickness about only one atomic layer. Subject to properly selected process conditions, the chemisorption reaction has a self-limiting characteristic, meaning that the amount of precursor material deposited in every reaction cycle is constant and the precursor material is restricted to growing on the surface, and therefore the film thickness can be easily and precisely controlled by the number of the applied growth cycles.
Conventionally, a batch of ALD process usually consists of multiple ALD reaction cycles, each of which ALD reaction cycles involves consequently performing steps of introducing a first gaseous precursor pulse to a surface in process, pulsing an inert gas to purge or evacuate the excess gaseous precursor after the surface is saturated with an atomic layer of the first gaseous precursor, pulsing a second gaseous precursor and purging by an inert gas pulse or evacuating. A single ALD reaction cycle is continuously repeated until a target thickness for the deposited atomic layer on the surface in process is achieved.
The conventional ALD process is widely applicable for growing a thin film, such as a high-k dielectric layer, a diffusion barrier layer, a seed layer, a sidewall, a sidewall oxide, a sidewall spacer for a gate, a metal interconnect and a metal liner etc., in a semiconductor electronic element.
Often, the conventional ALD process is implemented in a furnace, and one batch of ALD process can only form one scale of thickness for an ALD layer on a substrate or a wafer in the furnace. However, for example, there usually exist five different thicknesses in a range from 20A, 25A, 30A, 40A to 43A needed to be formed for sidewall oxidations in one semiconductor device.
Thus, there arises a difficulty to reach full batch control, for example one hundred and twenty-five pieces, since a sidewall stage would require four hours of quality check time for defect reduction. The factors stated above lead to a limitation on the efficiency of ALD for wafer capacity utilization currently, while the quantity of the same thickness of wafer in process (WIP) would be lower than fifty pieces in comparison with the full batch load. This will cause unsatisfactory tool efficiency, and a corresponding low WIP performance will degrade the tool efficiency as well.
However, the ALD process for the batch load with respect to currently uniform size injectors located within the chamber is not yet good enough to be satisfactory, failing to overcome a series of issues related to handling different layer deposition thicknesses for different wafers of the load batch when different reaction cycles are used to elevate the capacity utilization of the batch load within the chamber vacuum furnace.
In addition, full batch control, which includes one hundred and twenty five wafers in process, is difficult due to the sidewall oxidation stage requiring four hours of Q-time (quality time) for defect reduction. Currently, only fifty pieces having same wafer thickness can be in process, which causes poor tool efficiency as well.
There is a need to solve the above deficiencies/issues.
In an atomic layer deposition apparatus, the atomic layer deposition apparatus includes a chamber and a heating device. The chamber includes a plurality of regions. The heating device respectively provides specific temperature ranges for the plurality of regions.
In an atomic layer deposition apparatus, the atomic layer deposition apparatus includes an injector. The injector has a first hole and a second hole. The first hole has a first geometric parameter. The second hole has a second geometric parameter different from the first geometric parameter.
In an atomic layer deposition process, the atomic layer deposition includes providing a chamber and injecting at least two depositing materials. The chamber has a plurality of regions. The at least two depositing materials is injected into respective ones of the plurality of regions.
A more complete appreciation of the invention and many of the attendant advantages thereof are readily obtained as the same become better understood by reference to the following detailed description when considered in connection with the accompanying drawing, wherein:
The present disclosure will be described with respect to particular embodiments and with reference to certain drawings, but the disclosure is not limited thereto but is only limited by the claims. The drawings described are only schematic and are non-limiting. In the drawings, the size of some of the elements may be exaggerated and not drawn on scale for illustrative purposes. The dimensions and the relative dimensions do not necessarily correspond to actual reductions to practice.
Furthermore, the terms first, second and the like in the description and in the claims, are used for distinguishing between similar elements and not necessarily for describing a sequence, either temporally, spatially, in ranking or in any other manner. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other sequences than described or illustrated herein.
Moreover, the terms top, bottom, over, under and the like in the description and the claims are used for descriptive purposes and not necessarily for describing relative positions. It is to be understood that the terms so used are interchangeable under appropriate circumstances and that the embodiments described herein are capable of operation in other orientations than described or illustrated herein.
It is to be noticed that the term “including”, used in the claims, should not be interpreted as being restricted to the means listed thereafter; it does not exclude other elements or steps. It is thus to be interpreted as specifying the presence of the stated features, integers, steps or components as referred to, but does not preclude the presence or addition of one or more other features, integers, steps or components, or groups thereof. Thus, the scope of the expression “a device including means A and B” should not be limited to devices consisting only of components A and B.
Reference throughout this specification to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment is included in at least one embodiment. Thus, appearances of the phrases “in one embodiment” or “in an embodiment” in various places throughout this specification are not necessarily all referring to the same embodiment, but may. Furthermore, the particular features, structures, or characteristics may be combined in any suitable manner, as would be apparent to one of ordinary skill in the art from this disclosure, in one or more embodiments.
Similarly, it should be appreciated that in the description of exemplary embodiments, various features are sometimes grouped together in a single embodiment, figure, or description thereof for the purpose of streamlining the disclosure and aiding in the understanding of one or more of the various inventive aspects. This method of disclosure, however, is not to be interpreted as reflecting an intention that the claimed disclosure requires more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive aspects lie in less than all features of a single foregoing disclosed embodiment. Thus, the claims following the detailed description are hereby expressly incorporated into this detailed description, with each claim standing on its own as a separate embodiment.
Furthermore, while some embodiments described herein include some but not other features included in other embodiments, combinations of features of different embodiments are meant to be within the scope of the disclosure, and form different embodiments, as would be understood by those in the art. For example, in the following claims, any of the claimed embodiments can be used in any combination.
In the description provided herein, numerous specific details are set forth. However, it is understood that embodiments may be practiced without these specific details. In other instances, well-known methods, structures, and techniques have not been shown in detail in order not to obscure an understanding of this description.
The disclosure will now be described by a detailed description of several embodiments. It is clear that other embodiments can be configured according to the knowledge of persons skilled in the art without departing from the true technical teaching of the present disclosure, the claimed disclosure being limited only by the terms of the appended claims.
Referring now to
In
The ALD process is commonly applied to form structures such as a high-k dielectric layer, an interconnect barrier layer, a sidewall oxide and a deposition layer in a porous structure, etc. For example, in a formation of a high-k dielectric layer, for forming films such as an A103 film, a Hf02 film and a Zr02 film acting as a high-k dielectric layer, corresponding candidate precursor material pair can be chosen as Al(CH3)3 plus either H2O or O3, either HfC14 or TEMAH plus H2O and ZrC14 plus H20. H2O may be a popular candidate for acting as a precursor material since H2O vapor is adsorbed on most materials or surfaces including a silicon surface of a wafer face.
In some embodiments, the five regions 11 are fully loaded with wafers in process, which results in relatively high capacity utilization. During one batch ALD process, precursors A and B in gaseous state are alternatively introduced into the furnace 16 through the injectors 14 and 15 to form a deposited film with thickness A onto multiple wafers being placed in each region 11. Deposition rate is related to temperature. To achieve a uniform deposition rate, the temperatures in the five regions 11 are controllable by the heating device 17.
Referring to
In some embodiments of the invention, region temperature tuning and hole size optimization of the injector are utilized to improve atomic layer deposition efficiency. The atomic layer deposition process tool shown in
Another effect which needs to be considered while forming two or more scales of different thicknesses for deposition layers in one batch of ALD processing arises from the fact that a relatively thicker layer may require relatively longer processing time. Hence, a dummy reaction cycle is introduced in some embodiments for the regions used for processing depositing of a relatively thinner layer, so as to align the different processing times for respective relatively thicker and thinner layers. Finally, the multiple different processing times for the respective scales of different thicknesses for deposition layers can be aligned and the respective relatively thicker and thinner layers are finished at the time at the end of the batch of ALD processing.
The above-mentioned controllable dummy cycle and the dummy region in cooperation with a temperature tuning scheme and acting as a buffer cycle and a buffer region that can respectively align multiple different processing times and exhibit imprecise separation is introduced into the ALD process, which enables a formation of two different thicknesses of the deposition layer within one batch of the ALD process. Thus, the introduced dummy region, the above controllable process, and the temperature tuning upgrade the productivity and the capacity utilization performance for the ALD process.
One general aspect of embodiments described herein includes an atomic layer deposition process, including: providing a chamber having a plurality of regions. The atomic layer deposition process also includes injecting at least two depositing materials into respective ones of the plurality of regions to form a first thin film having a first thickness on a first substrate in a first region of the plurality of regions while simultaneously forming a second film having a second thickness on a second substrate in a second region of the plurality of regions, the second region being vertically offset from the first region.
Another general aspect of embodiments described herein includes a method including: (a) placing a first wafer into a first region of a chamber and a second wafer into a second region of the chamber; (b) heating the first region to a first predetermined temperature and heating the second region to a second predetermined temperature; (c) delivering first precursor gas at a first gaseous flow rate in the first region to form a first material at a first deposition rate while simultaneously delivering the first precursor gas at a second gaseous flow rate in the second region to form the first material at a second deposition rate different than the first deposition rate; and (d) subsequent to the step of delivering first precursor gas, delivering a second precursor gas at a third gaseous flow rate in the first region to form a second material at a third deposition rate while simultaneously delivering the precursor gas at a fourth gaseous flow rate in the second region to form the second material at a fourth deposition rate different than the third deposition rate.
Yet another general aspect of embodiments described herein includes a method including: providing a first wafer in a first region of a chamber and providing a second wafer in a second region of the chamber, the second region being vertically offset from the first region; and forming in the first region a first film having a first thickness, and forming in the second region a second film having a second thickness different from the first thickness simultaneously with forming of the first film having the first thickness, the first film and second film having the same composition, by: delivering a first precursor gas through a first injector having a first gas flow path, the first gas flow path including a first hole with a first geometric parameter and a second hole with a second geometric parameter different from the first geometric parameter, the first precursor gas being delivered at a first gaseous flow rate in the first region and simultaneously being delivered at a second gaseous flow rate in the second region; and delivering a second precursor gas through a second injector having a second gas flow path, the second gas flow path including a third hole with a third geometric parameter and a fourth hole with a fourth geometric parameter different from the third geometric parameter, the second precursor gas being delivered at a third gaseous flow rate in the first region and being delivered at a fourth gaseous flow rate in the second region.
While the disclosure has been described in terms of what are presently considered to be the most practical and preferred embodiments, it is to be understood that the disclosure need not be limited to the disclosed embodiments. On the contrary, it is intended to cover various modifications and similar arrangements included within the spirit and scope of the appended claims, which are to be accorded with the broadest interpretation so as to encompass all such modifications and similar structures. Therefore, the above description and illustration should not be taken as limiting the scope of the present disclosure which is defined by the appended claims.
This application claims priority to as a continuation of U.S. patent application Ser. No. 13/692,972, filed Dec. 3, 2012, and entitled “Atomic Layer Deposition Apparatus and Method,” now U.S. Pat. No. 9,512,519, which is incorporated herein by reference.
Number | Name | Date | Kind |
---|---|---|---|
4096822 | Yamawaki et al. | Jun 1978 | A |
4183320 | Erben et al. | Jan 1980 | A |
5164012 | Hattori | Nov 1992 | A |
5338362 | Imahashi | Aug 1994 | A |
5855465 | Boitnott | Jan 1999 | A |
5863602 | Watanabe | Jan 1999 | A |
5925188 | Oh | Jul 1999 | A |
6074486 | Yang et al. | Jun 2000 | A |
6435865 | Tseng et al. | Aug 2002 | B1 |
6527866 | Matijasevic et al. | Mar 2003 | B1 |
6586349 | Jeon | Jul 2003 | B1 |
6746240 | De Ridder et al. | Jun 2004 | B2 |
6962859 | Todd et al. | Nov 2005 | B2 |
8790463 | Moriya | Jul 2014 | B2 |
9512519 | Chuang | Dec 2016 | B2 |
20010029892 | Cook | Oct 2001 | A1 |
20010032986 | Miyasaka | Oct 2001 | A1 |
20020134507 | DeDontney et al. | Sep 2002 | A1 |
20020179293 | Yamazaki | Dec 2002 | A1 |
20030087108 | Herner et al. | May 2003 | A1 |
20030111013 | Oosterlaken | Jun 2003 | A1 |
20030119288 | Yamazaki et al. | Jun 2003 | A1 |
20030124798 | Lim | Jul 2003 | A1 |
20030186517 | Takagi | Oct 2003 | A1 |
20040023516 | Londergan | Feb 2004 | A1 |
20040025786 | Kontani et al. | Feb 2004 | A1 |
20040067641 | Yudovsky | Apr 2004 | A1 |
20040142558 | Granneman | Jul 2004 | A1 |
20040147053 | Glew | Jul 2004 | A1 |
20040250853 | Snijders | Dec 2004 | A1 |
20050045102 | Zheng et al. | Mar 2005 | A1 |
20050118837 | Todd et al. | Jun 2005 | A1 |
20050164466 | Zheng | Jul 2005 | A1 |
20050201894 | Suzuki | Sep 2005 | A1 |
20050277288 | Ozguz | Dec 2005 | A1 |
20060060137 | Hasper et al. | Mar 2006 | A1 |
20060088985 | Haverkort et al. | Apr 2006 | A1 |
20060148151 | Murthy | Jul 2006 | A1 |
20060154494 | Qi | Jul 2006 | A1 |
20060159847 | Porter et al. | Jul 2006 | A1 |
20060166501 | Kaushal et al. | Jul 2006 | A1 |
20060196418 | Lindfors et al. | Sep 2006 | A1 |
20070034158 | Nakaiso | Feb 2007 | A1 |
20070077682 | Cerio, Jr. | Apr 2007 | A1 |
20070077683 | Cerio, Jr. | Apr 2007 | A1 |
20070095799 | Matsuzawa | May 2007 | A1 |
20070215036 | Park et al. | Sep 2007 | A1 |
20070218702 | Shimizu et al. | Sep 2007 | A1 |
20070228458 | Henson | Oct 2007 | A1 |
20070234953 | Kaushal et al. | Oct 2007 | A1 |
20080035055 | Dip et al. | Feb 2008 | A1 |
20080050884 | Koyanagi | Feb 2008 | A1 |
20080075838 | Inoue | Mar 2008 | A1 |
20080083372 | Inoue et al. | Apr 2008 | A1 |
20080132069 | Lee | Jun 2008 | A1 |
20080145533 | Honda | Jun 2008 | A1 |
20080166882 | Miya | Jul 2008 | A1 |
20080173238 | Nakashima | Jul 2008 | A1 |
20080208385 | Sakamoto et al. | Aug 2008 | A1 |
20080251008 | Moriya | Oct 2008 | A1 |
20080286981 | Hasper | Nov 2008 | A1 |
20090042404 | Surthi | Feb 2009 | A1 |
20090081885 | Levy | Mar 2009 | A1 |
20090130829 | Noda et al. | May 2009 | A1 |
20090130858 | Levy | May 2009 | A1 |
20090197424 | Sakai | Aug 2009 | A1 |
20090239078 | Asmussen | Sep 2009 | A1 |
20090246971 | Reid et al. | Oct 2009 | A1 |
20090305512 | Matsuura | Dec 2009 | A1 |
20100050942 | Kato et al. | Mar 2010 | A1 |
20100098851 | Murakawa | Apr 2010 | A1 |
20100102297 | Yoshizumi | Apr 2010 | A1 |
20100105192 | Akae | Apr 2010 | A1 |
20100167505 | Chew | Jul 2010 | A1 |
20100317174 | Noda et al. | Dec 2010 | A1 |
20110081734 | Allsop | Apr 2011 | A1 |
20110140334 | Zuniga | Jun 2011 | A1 |
20110159678 | Hsu | Jun 2011 | A1 |
20110186984 | Saito | Aug 2011 | A1 |
20110287600 | Cheng | Nov 2011 | A1 |
20120076936 | Hirano | Mar 2012 | A1 |
20120156886 | Shirako et al. | Jun 2012 | A1 |
20120220137 | Ota | Aug 2012 | A1 |
20120222620 | Yudovsky | Sep 2012 | A1 |
20120225565 | Bhatia | Sep 2012 | A1 |
20120258255 | Yang | Oct 2012 | A1 |
20120280369 | Saito | Nov 2012 | A1 |
20120315767 | Sasaki et al. | Dec 2012 | A1 |
20120321786 | Satitpunwaycha et al. | Dec 2012 | A1 |
20130026610 | Panda | Jan 2013 | A1 |
20130032859 | Pei | Feb 2013 | A1 |
20130189854 | Hausmann | Jul 2013 | A1 |
20140154414 | Chuang | Jun 2014 | A1 |
20140256152 | Ogawa | Sep 2014 | A1 |
20170081761 | Chuang | Mar 2017 | A1 |
Number | Date | Country |
---|---|---|
10074701 | Mar 1998 | JP |
WO-2009055065 | Apr 2009 | WO |
WO-2013054652 | Apr 2013 | WO |
Entry |
---|
M. Leskela, M. Ritala, “Atomic Layer Deposition Chemistry: Recent Developments and Future Challenges,” Angew. Chem. Int. Ed. 42 (45) (2003) 5548-5554. |
Number | Date | Country | |
---|---|---|---|
20170081761 A1 | Mar 2017 | US |
Number | Date | Country | |
---|---|---|---|
Parent | 13692972 | Dec 2012 | US |
Child | 15371068 | US |