The present invention relates to an electronic control unit.
In recent years, with a miniaturization, a higher density, and a higher functionality of electronic devices, the miniaturization and the higher density of a semiconductor device are also required. Therefore, as the semiconductor device, an area array package semiconductor device such as a Ball Grid Array (BGA) or a Chip Size Package (CSP) is often used.
In the area array package semiconductor device, electrodes and solder balls are formed on a back surface at a certain size, area and pitch. Electrodes of a wiring board are also formed at a certain size, area and pitch so as to correspond to these electrodes and solder balls. Then, the package semiconductor device is mounted on the wiring board and heated to form solder bumps, and corresponding electrodes are joined.
For example, PTL 1 discloses a structure in which in a connection between a BGA package and the wiring board, an end portion located at an outermost side of an array among outermost peripheral electrodes of the wiring board is located at an outer side of the array than an end portion located at an outermost side of an array among outermost peripheral electrodes of the BGA package, and an angle between an electrode surface of the wiring board and a solder bump surface is an acute angle.
PTL 1: JP-A-2000-114315
The area array package semiconductor device is deformed at a time of temperature load due to a difference in linear expansion coefficient of each component, and a stress is applied to solder bumps on an outermost periphery.
In particular, a load on solder bumps at outermost corners of the BGA package is large. In these solder bumps, crack extension occurs remarkably especially at an interface with electrodes on an upper side of the solder bumps, and a thermal fatigue life is reduced.
Specifically, in the semiconductor device in which an area array package is connected to the wiring board via the solder bumps, the entire semiconductor device is deformed due to a temperature change in a use environment. However, each component has a different amount of warpage due to the difference in linear expansion coefficient, and the crack extension occurs in the solder bumps between the area array package and the wiring board. In particular, the solder bumps at the outermost corners of the area array package are easily broken, the thermal fatigue life is reduced, and a reliability of the semiconductor device is reduced.
PTL 1 mentions that the stress applied to the solder bumps on the outermost periphery during an external impact is reduced. However, the amount of warpage differs due to the difference in the linear expansion coefficient of the component, and no consideration is given to a fact that the difference affects the thermal fatigue life.
An object of the invention is to prevent a thermal fatigue life from being shortened in an electronic control unit including a semiconductor device.
An electronic control unit according to one aspect of the invention includes a control unit that controls a motor. The control unit includes a semiconductor device. The semiconductor device includes a semiconductor package including a plurality of first electrodes, a wiring board including a plurality of second electrodes arranged so as to correspond to each of the plurality of first electrodes, and solder joints connecting the plurality of first electrodes and the plurality of second electrodes, and a tip end of a second electrode arranged at an outermost corner of the wiring board is located outside an outer peripheral end of the semiconductor package.
According to one aspect of the invention, the thermal fatigue life is prevented from being shortened in the electronic control unit including the semiconductor device.
Electrodes and solder balls of an area array package semiconductor device (semiconductor package) are formed in advance by a package manufacturer and a composition of a solder ball is generally Sn-3.0Ag-0.5Cu.
By reducing a size and a pitch of solder bumps, a large number of solder bumps can be arranged within a certain area, which is advantageous for miniaturization and high density. Further, since a wiring length is smaller than that of a structure connected via leads, it is advantageous for high-speed transmission and high performance can be achieved.
In a BGA package of the area array package semiconductor device, a Si chip as a semiconductor element is connected to an interposer by, for example, a wire. The electrodes and the solder balls are formed on a back surface of the interposer and are molded thereon with a resin. The BGA package is connected to a wiring board via solder bumps. However, due to a difference in linear expansion coefficient of each component, the BGA package is deformed at a time of temperature load, and a stress is applied to solder bumps on an outermost periphery of the BGA package.
In particular, a load on solder bumps at outermost corners of the BGA package is large. In these solder bumps, crack extension occurs remarkably especially at an interface with electrodes on an upper side of the solder bumps, which causes a reduction in a thermal fatigue life.
In the following embodiments, in a semiconductor device in which an area array package is connected to the wiring board via solder bumps, the stress applied to the solder bumps at the outermost corners is reduced to prevent the reduction in the thermal fatigue life.
Hereinafter, the embodiments will be described with reference to the drawings.
A semiconductor device according to the first embodiment will be described with reference to
As shown in
Among the electrodes 4 formed on the upper surface of the wiring board 1, electrodes 4b at positions other than outermost corners are uniformly formed so as to face the electrodes 3 provided on the lower surface of the semiconductor package 2. Solder joints 5b at positions other than the outermost corners have a drum-shaped bump shape. Solder joints 5a arranged at the outermost corners have a fillet shape extending outward from an outer peripheral end of the semiconductor package 2.
Tip ends of four electrodes 4a at the outermost corners are located outside the outer peripheral end of the semiconductor package 2. Therefore, tip ends of the solder joints 5a at the outermost corners are also located outside the outer peripheral end of the semiconductor package 2.
As shown in
As shown in
In this way, in the semiconductor device according to the first embodiment, the tip ends of the electrodes 4a arranged at the outermost corners of the wiring board 1 are located outside the outer peripheral end of the semiconductor package 2. Further, the tip ends of the solder joints 5a arranged at the outermost corners of the wiring board 1 are also located outside the outer periphery end of the semiconductor package 2.
An area of the electrodes 4a arranged at the outermost corners of the wiring board 1 is larger than an area of the electrodes 3 arranged at outermost corners of the semiconductor package 2. Further, the area of the electrodes 4a arranged at the outermost corners of the wiring board 1 is larger than an area of the electrodes 4b arranged at positions other than the outermost corners of the wiring board 1.
As shown in
A shape of the solder joints 5a arranged at the outermost corners of the wiring board 1 is different from a shape of the solder joints 5b arranged at positions other than the outermost corners of the wiring board 1. Specifically, the solder joints 5a arranged at the outermost corners of the wiring board 1 have the fillet shape extending outward from the outer peripheral end of the semiconductor package 2. The solder joints 5b arranged at positions other than the outermost corners of the wiring board 1 have a drum-shaped shape.
As shown in
Next, a manufacturing step of the semiconductor device according to the first embodiment will be described with reference to
First, the plurality of electrodes 4 are formed on the wiring board 1 (see
Next, receiving solders 6 are formed on the electrodes 4 on the wiring board 1 (see
The semiconductor package 2 is mounted on locations where the receiving solders 6 are formed using a mounting machine (not shown). Then, metal sheets 8 containing any one or a plurality of elements of Bi, In, and Sb are mounted on the electrodes 4a on the wiring board 1 corresponding to the outermost corners of the semiconductor package 2 (see
A volume of the metal sheets 8 mounted on the electrodes 4a is calculated from a volume of the solder balls 7 provided on the semiconductor package 2 and the area of the electrodes 4a. It should be noted that the semiconductor package 2 may be mounted after mounting the metal sheets 8 and a mounting order is determined as appropriate.
Next, the semiconductor package 2 and the wiring board 1 on which the metal sheets 8 are mounted are heated by using a reflow furnace (not shown) so that the solder balls 7, the receiving solders 6 and the metal sheets 8 are melted. Thereafter, the semiconductor package 2 and the wiring board 1 are joined by cooling (see
In the first embodiment, by melting the metal sheets 8 containing any one or a plurality of elements of Bi, In, and Sb, the one or plurality of metals of Bi, In, and Sb diffuse only into the solder joints 5a at the outermost corners of the semiconductor package 2 whose main composition is SnAgCu. Accordingly, the thermal fatigue life can be extended.
Further, in the first embodiment, by melting the metal sheets 8, a volume of the solder joints 5a at the outermost corners can be easily increased. Accordingly, the solder joints 5a at the outermost corners have the fillet shape and accordingly a manner in which the stress is applied is changed and crack propagation can be prevented. As a result, the stress of the solder joints 5a at the outermost corners of the semiconductor package 2 is reduced, and the reliability of mounting the semiconductor package 2 can be improved.
Further, in the first embodiment, a solder composition of the solder joints 5a at the outermost corners can be changed without changing a solder composition of the solder balls 7 itself of the semiconductor package 2. As a result, a commercially available semiconductor package 2 can be used and accordingly a manufacturing cost can be reduced.
Here, a thermal stress analysis is performed on two patterns of a model A in which a composition of the solder joints 5 is generally Sn-3Ag-0.5Cu and a model B in which a composition of the solder joints 5a is Sn-3Ag-3Bi-3In and the composition of the solder joints 5b is Sn-3Ag-0.5Cu.
In the model A, in a structure in which the areas of the electrodes 4a and 4b formed on the wiring board 1 are the same and the solder joints 5a at the outermost corners of the semiconductor package 2 and the solder joints 5b at positions other than the outermost corners have the same bump shape, the composition of the solder joints 5 is generally Sn-3Ag-0.5Cu. On the other hand, in the model B, in a structure in which the tip ends of the electrodes 4a are located outside the outer peripheral end of the semiconductor package 2 and the solder joints 5a at the outermost corners have the fillet shape, the composition of the solder joints 5a is Sn-3Ag-3Bi-3In and the composition of the solder joints 5b is Sn-3Ag-0.5Cu. The model A and the model B are all the same except for a size of the electrodes 4a and the shape and the composition of the solder joints 5a at the outermost corners.
In an analysis result obtained by applying a thermal load simulating a temperature cycle test in which −40° C. and 125° C. are repeated to the model A and the model B, the thermal fatigue life of the solder joints 5a at the outermost corners in the model B is 1.9 times the thermal fatigue life of the solder joints 5a at the outermost corners in the model A. From the result of the thermal stress analysis, it can be seen that in the first embodiment, the thermal fatigue life is improved.
A semiconductor device according to the second embodiment will be described with reference to
In the semiconductor device according to the first embodiment shown in
Further, as shown in
In
Other configurations are the same as the semiconductor device according to the first embodiment and a description thereof will be omitted.
A semiconductor device according to the third embodiment will be described with reference to
As shown in
In this case, the solder joints 5a at the outermost corners have a fillet shape having a longer side in a diagonal direction of the corners, and the other solder joints on the outermost periphery have a fillet shape having a longer side in a vertical direction of each of the opposite sides of the semiconductor package 2.
The solder joints 5a at the outermost corners may not have the fillet shape having the longer side in the diagonal direction of the corners, and the fillet shape may have the longer side in the vertical direction of any one of the opposite sides of the semiconductor package 2.
In
The other configurations are the same as the semiconductor device according to the first embodiment and the description thereof will be omitted.
An electronic control unit including the semiconductor device according to the first embodiment will be described with reference to
From a viewpoint of ensuring a cabin space, an installation environment of in-vehicle electronic device is changed from a cabin to an engine room, and resistance in a higher temperature environment is required. From an extension of a vehicle life, there is also a demand for a longer life in the electronic device.
An electronic control unit according to the fourth embodiment will be described with reference to
As shown in
Here, an engine control unit (ECU) is a microcontroller (microcomputer) that comprehensively controls operation of an engine when the operation is controlled using an electric auxiliary device.
The electronic control unit 70 for in-vehicle use is exposed to an environmental temperature and repeats between a high temperature environment and a low temperature environment. Even in the cabin, a temperature can reach nearly 50° C. when the engine is stopped, and it is exposed to below freezing in a cold region. In the electronic control unit 70 installed in the engine room, a maximum environmental temperature is 100° C. or higher.
The wiring board 1 mainly using an organic board and the semiconductor package 2 mounted on the wiring board 1 have different linear expansion coefficients, respectively. Therefore, in the environment where the high and low temperatures are repeated, the wiring board 1 and the semiconductor package 2 have different amounts of warpage, respectively, and a large load is applied to the solder joints 5a at the outermost corners of the semiconductor package 2. Therefore, a large connection length of the solder joints 5a at the outermost corners is effective for the thermal fatigue life up to the crack propagation and a fracture.
1 wiring board
2 semiconductor package
3 electrode
4
a electrode at outermost corner
4
b electrode at position other than outermost corner
5
a solder joint at outermost corner
5
b solder joint at position other than outermost corner
70 electronic control unit
71 conversion unit
72 control unit
73 output unit
74 sensor unit
75 motor unit
Number | Date | Country | Kind |
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2017-196587 | Oct 2017 | JP | national |
Filing Document | Filing Date | Country | Kind |
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PCT/JP2018/033563 | 9/11/2018 | WO | 00 |