Patent Application
20090166890
Flip-chip package assemblies generally include an integrated circuit (IC) die that is mechanically and electrically connected to a supporting substrate via metallic bumps on the bottom surface of the die. The supporting substrate in conventional flip-chip packages is a multi-layered circuit having a relatively stiff core layer and a plurality of conductive or semiconductor layers having traces that are interconnect by vias between the layers. Heat management of the IC die is typically accomplished by the use of a heat spreader that is thermally coupled to the backside of the die.
Continued advancements in integrated circuit technology have resulted in the need for flip-chip package assemblies having higher electrical performance and routing density. One approach for enhancing package performance and routing density is the use of thinner core layers or the complete elimination of the core layer from the package substrate. However, thinning or omitting the core layer lowers the mechanical strength of the package and can result in unacceptable substrate warpage.
While the specification concludes with claims particularly pointing out and distinctly claiming that which is regarded as the present invention, the advantages of this invention can be more readily ascertained from the following description of the invention when read in conjunction with the accompanying drawings in which:
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be understood, however, to one skilled in the art, that the present invention may be practiced without some or all of these specific details. In other instances, well known process operations have not been described in detail in order not to unnecessarily obscure the present invention.
Multi-layered circuit substrate 12 is formed by well known processes used to create integrated circuits and printed circuit boards. In one embodiment, substrate 12 includes a core layer and a plurality interconnected conductive or semiconductor layers having traces (not shown) that electrically connect the IC die 14 to electrical connectors 20 located on the bottom surface 13 of the substrate. The core layer generally comprises a metal, such as copper, or a dielectric material, such as a glass fiber reinforced epoxy having thicknesses in the range of about 15.0 mils to about 28.0 mils. In alternative embodiments substrate 12 includes a core layer of reduced thickness or is devoid of a core layer altogether to enhance electrical performance and routing density of the package. Electrical connectors 20 may comprise metallic bumps (as shown in
An epoxy layer 16 having a top surface 30 and a bottom surface 31 is attached to the top surface 11 of substrate 12, the top surface 30 being generally planar with the top surface 17 of IC die 14. In an alternative embodiment as shown in
A heat spreader 22 is attached to the top surface 30 of epoxy layer 16 and is thermally coupled with the top surface 17 of IC die 14. Heat spreader 22 is formed from a high thermal conductive material (e.g., copper, aluminium, highly conductive composite materials, etc.) and provides a path for the removal of heat from the IC die 14. Heat spreader 22 has a top surface 29, a first contact surface 32 opposite top surface 29, and a pedestal 23 extending from the first contact surface 32. The pedestal has a thickness, t, and comprises a second contact surface 25 that is substantially parallel with the first contact surface 32 and the top surface 17 of IC die 14. Coupling of the heat spreader 22 to the IC die 14 is made by use of a thermal interface material (TIM) 24 disposed between the top surface 17 of IC die 14 and the second contact surface 25 of the heat spreader. Examples of TIM include solders, polymers, polymer gels and polymer/solder hybrids. Further attachment of the heat spreader 22 to package 10 is made by use of an adhesive 26 positioned between the gap located between the first contact surface 32 of the heat spreader to the top surface 30 of substrate 12. Adhesive 26 may include silicone or other proprietary adhesive material. In use with solder TIM thin gold layer (not shown) is typically formed, or otherwise deposited, onto the top surface 17 of IC die 14 and the second contact surface 25 of heat spreader 22 to enhance wetting and bonding of the solder TIM to the respective surfaces. In accordance with one embodiment of the present invention attachment of heat spreader 22 to IC die 14 is accomplished by depositing a flux to the top surface 17 of IC die 14, placing a solder TIM preform (preferably having a thickness of about 10.0 to about 15.0 mils) over the applied flux and fluxing the top surface of the TIM preform. Before, concurrently, or after the preceding steps an adhesive is applied to either the top surface 30 of epoxy layer 16 or the first contact surface 32 of heat spreader 22. The heat spreader 22 is then positioned atop package 10 so that the second contact surface 25 is adjacent to the top surface 17 of IC die 14 and the first contact surface 32 is adjacent the top surface 30 of epoxy layer 16. The assembly is then heated to reflow the TIM 24 and to cure the adhesive 26. In an alternative embodiment, a polymer TIM (preferably having a thickness of about 1.0 to about 5.0 mils) is dispensed onto the fluxed top surface 17 of IC die 14 in lieu of using a solder TIM preform.
As described above, heat spreader 22 includes a pedestal 23 having a thickness, t. An advantage of the heat spreader of the present invention is that the pedestal thickness, t, can be selected to ensure a consistent thermal couple between the second contact surface 25 and the top surface 17 of IC die 14 while accommodating variations in package component heights (e.g., IC die 14, epoxy layer 16) and package component thicknesses (e.g., TIM 24 and adhesive 26). For example, as shown in
As discussed above, multi-layered circuit substrate 12 may comprise a core layer of typical thickness, a core layer of reduced thickness or can alternatively be devoid of a core layer altogether. Moreover, the thicknesses, materials and general construction of the substrate 12 and epoxy layer 16 may also vary. Each of these variations, including others, will affect the flexibility of the package 10 and, consequently, the flexibility of substrate 12 that contains electronic components that can be damaged by excess warpage of the substrate. Another feature of the present invention is its ability to provide variable flexibility to package 10 by the strategic placement of the adhesive 26 between the first contact surface 32 of heat spreader 22 and the top surface 30 of epoxy layer 16. In the embodiments of
Other embodiments of the invention will be appreciated by those skilled in the art from consideration of the specification and practice of the invention. Furthermore, certain terminology has been used for the purpose of descriptive clarity, and not ot limit the present invention. The embodiments and preferred features described above should be considered exemplary, with the invention being defined by the appended claims.
