Patent Application
20240145428
The present disclosure relates to a flip connection structure known as a connection structure of a semiconductor chip or the like, a room-temperature flip connection structure, and a connection method therefor.
In recent years, as one of micro connection structures, use of a flip chip as a connection method or a connection structure allowing high density implementation is known. In a case where this flip chip connection is performed, for example, a pad electrode, a bump, and the like of a semiconductor chip or a substrate is connected to a terminal, an electrode, and the like on the other side by flux, solder cream, and the like (see, for example, Patent Document 1).
However, for such connection, it is necessary to heat and warm the flux or the solder using an apparatus serving as a warming unit. For this reason, there is a risk that problems such as warping of the substrate due to the heat may occur. Furthermore, in a semiconductor chip or the like that is weak against heat, there is a risk of causing deterioration or failure due to heat. In addition, for example, regarding a display such as an organic EL or a liquid crystal, there is also a risk of deterioration due to heat at the time of joining.
In view of such circumstances, it is desired to provide a flip connection structure, a room-temperature flip connection structure, and a connection method therefor, which do not cause a risk of deterioration of a substrate or a semiconductor chip due to heat.
A first flip connection structure of the present disclosure is a flip-chip connection structure in which semiconductors are connected by a flip chip, the flip-chip connection structure including: terminals that connects the semiconductors, the terminals each being formed by aluminum (Al), the terminals being integrally joined to each other to constitute a joined body.
A second room-temperature flip-chip connection structure of the present disclosure is a connection structure of a flip chip in which a semiconductor is connected to a substrate to be used in a liquid crystal panel or an organic EL panel of a display system, in which the semiconductor is joined and formed to a substrate of at least one of the liquid crystal panel and the organic EL panel at room temperature.
A third flip-chip connection method of the present disclosure is a flip-chip connection method of forming semiconductors by joining the semiconductors to each other by a flip-chip connection method using a joined body by an aluminum bump and an aluminum pad electrode or an aluminum bump and an aluminum bump, the flip-chip connection method including: when joining of a flip chip is performed, joining by weighting or pressurization and an ultrasonic wave in an environment of room temperature in any step.
Hereinafter, embodiments, modifications, experimental examples, and the like of the present disclosure will be described in detail with reference to the accompanying drawings.
Note that the following description is a specific example of the present disclosure, and the present disclosure is not limited to the following aspects. In each drawing, three-dimensional Cartesian coordinates orthogonal to each other are added in a right-handed system in order to clarify the viewing direction. In addition, the present disclosure is not limited to the arrangement, dimensions, dimensional ratios, and the like of the components illustrated in each drawing.
The contents according to the present disclosure will be described in the following order.
The semiconductor device 1 includes the organic EL display device 2 (hereinafter sometimes abbreviated as “ELD 2”), a flexible printed circuit 3 (FPC, hereinafter abbreviated as “FPC3”) that electrically connects an external power supply to the organic EL display device 2 or the like, a display drive IC (DDIC) 4 that drives the organic EL display device 2, and an organic EL display substrate 5 (hereinafter, abbreviated as “substrate 5”) including silicon (Si) or the like that joins and mounts the ELD 2, the FPC 3, the DDIC 4, and the like.
In the organic EL display device 2 (ELD 2), a light emitting element is provided for each pixel, and as is well known, for example, a negative electrode such as metal, an electron injection layer, a light emitting layer, a hole transport layer, a hole injection layer, a positive electrode such as an indium tin oxide film (ITO film: transparent conductive film), and the like are stacked in the light emitting element, although not illustrated. In the present embodiment, as illustrated in
The ELD 2 includes the main body portion 21 in which a large number of light emitting elements constituting pixels (pixels: pixels) are integrated, and a glass 6 (hereinafter, referred to as “cover glass 6”) functioning as a cover for sealing the main body portion 21. The cover glass 6 transmits light from the main body portion 21 that emits light, thereby allowing an image or the like formed by the main body portion 21 to be visually recognized from the outside.
In the EL main body portion 21, although not illustrated, electrons and holes injected in the electron injection layer and the hole injection layer pass through the electron transport layer and the hole transport layer, respectively, and are bound in the light emitting layer, thereby generating binding energy at an atomic level. The electrons in the light emitting layer are excited by the energy at this time. When the excited electron returns from the excited state to the ground state of the lowest level which is energetically stable, light (photon) is generated by the energy of the level difference and emitted. In order to utilize this light emission phenomenon, the light emitting element of each pixel is individually driven and controlled by the DDIC 4, and the light from each pixel formed by the light emission phenomenon is transmitted through the cover glass 6 and displayed to the outside, so that the light can be formed and visually recognized as an image.
In the FPC 3, a connection terminal of a terminal portion (not illustrated) is joined and integrated with a part of a printed wire 51 (formed by aluminum (Al) in the present embodiment) (referred to as connection terminal 52: see
Note that, although the joining between the FPC 3 and the substrate 5 requires some thermal conditions in, for example, the embodiment of the present disclosure, joining and conduction may be performed using an anisotropic conductive film (hereinafter, referred to as “ACF”) or an anisotropic conductive paste (hereinafter referred to as “ACP”) that enables joining without a high temperature as in solder or the like. However, in the case of joining and connection by the ACF or the ACP, there is a risk that the resistance value at a connection portion increases.
Therefore, in a case where avoidance of such risk is desired, for example, although the work is performed at room temperature, joining integration by ultrasonic vibration involving pressurization may be performed to achieve electrical connection and conduction. In the case of joining integration by the ultrasonic vibration, in order to ensure the joining, for example, if a pad electrode in which aluminum is deposited (or stacked) in a thick shape is formed on the connection terminal 52 on the substrate 5 side (or a bump is formed by aluminum), and then joining is performed using this thick pad electrode (or bump) including aluminum, it is convenient since the joining state becomes more reliable. However, in a case of a structure in which the wiring density of the FPC to be connected is high, in joining via a thick pad electrode or bump, it is conceivable that a trouble such as a short circuit occurs due to wiring contact between adjacent wires, and it may be difficult in some cases to perform joining with high density by this ultrasonic vibration. Therefore, in such a case, it is preferable to avoid a thick pad electrode or bump. Note that a specific method of forming the aluminum pad electrode in a thick shape or the like will be described later.
As described above, in the FPC 3 according to the embodiment of the present disclosure, it is possible to perform pressure-joining connection by ultrasonic vibration involving pressurization at room temperature, or connection by the ACF or the ACP involving some thermal action. In particular, in a case where connection is performed using the ACF or the ACP, for example, when silicon (Si), silicon nitride (SiC), and the like is used as a material constituting the substrate 5, a certain degree of heat absorption action can be expected. Furthermore, in a case where it is necessary, for example, an appropriate material rich in thermal absorption may be separately attached to the lower surface of the substrate 5 or the like.
Furthermore, in a case where such connection by ultrasonic vibration or connection by the ACF or the ACP is not preferable or difficult, it may be difficult in some cases to realize the connection depending on a physical size, for example, in addition to these conduction methods. However, female and male connectors may be provided in the FPC 3 and the substrate 5, respectively, and these connectors may be mechanically connected to each other to conduct the connection.
In the embodiment of the present disclosure, as illustrated in
Note that the material for forming the pad electrode 41 may be a good conductor such as copper (Cu), gold (Au), silver (Ag), and the like, for example. However, in consideration of physical properties, a material including aluminum (Al), which is the same metal as the aluminum bump, is preferable for connection. The aluminum bump 11 on the DDIC 4 side and an Al pad electrode 53 (hereinafter, sometimes referred to as “aluminum pad electrode 53”) on the substrate 5 side are joined and electrically connected by the above-described ultrasonic joining at room temperature.
In the present embodiment, the aluminum bump 11 is formed on the DDIC 4 side via the aluminum pad electrode 41. However, the present disclosure may adopt a joining structure in which a similar aluminum bump is formed on the aluminum pad electrode 53 A on the substrate 5 side and the aluminum bumps are joined to each other. Note that a method of forming the aluminum bump 11 on the substrate 5 side will be described later with reference to
In the substrate 5, the ELD 2 is fixed to the upper surface of the substrate 5 with an appropriate adhesive 8. The ELD 2 is formed by stacking the EL main body portion 21 in multiple layers by vapor deposition or the like on one surface side (upper surface in
Furthermore, as illustrated in
An aluminum pad electrode 53 similar to the aluminum pad electrode 41 of the DDIC 4 is formed at a predetermined portion of one surface (upper surface 5A in
Next, a method (process) for manufacturing a semiconductor device provided with the organic EL display device according to the present embodiment will be described with reference to
1) On the surface 5A side of the substrate 5 formed by stacking the main body portion 21 of the ELD 2 together with the printed wire 51 in a multilayer state in a predetermined pattern by vapor deposition or the like, the cover glass 6 is first fixed and attached with the appropriate adhesive 8 (see
2) Next, the DDIC 4 is implemented on the substrate 5. Before the DDIC 4 is implemented on the substrate 5, as illustrated in
3) The DDIC 4 in the upside down state is then vertically inverted as illustrated in
4) Thereafter, using an anisotropic conductive film (ACF) 7 (see
5) Finally, the surfaces or the like of the FPC 3, the DDIC 4, and the substrate 5 are insulated and coated with an appropriate coating material such as an under fill (UF), for example, an ultraviolet curable resin.
In the present embodiment, as described above, the aluminum bump 11 is formed on the DDIC 4 in advance for electrical joining between the DDIC 4 and the substrate 5 side. However, in the present disclosure, the aluminum bump 11 may not be provided on the aluminum pad electrode 41 on the DDCI 4 side, but may be formed on the aluminum pad electrode 53 on the substrate 5 side, or may be formed on both the aluminum pad electrode 41 and the aluminum pad electrode 53.
As for the method of forming the aluminum bump, for example, in the case of forming the aluminum bump on the DDIC 4, as illustrated in
Then, for the aluminum pad electrode 41, the aluminum bump 11 is formed by an aluminum (Al) wire 10 by a wire bonder 100 (reference numeral 11′ in
Note that, although the wire bonder 100 of the present embodiment can be joined not only with the same metal but also with different kinds of metals, it is preferable to use the same metal from the viewpoint of joining stability as described above.
Note that the formation of the aluminum bump on the DDIC 4 here is work before the DDIC 4 is joined to the substrate 5 as described above, and thus does not cause a thermal influence on the ELD 2 that is weak against heat.
On the other hand, the method of forming the aluminum bump on the substrate 5 side may also be a method using the wire bonder 100 or other means as illustrated in
[Joining Method with CoC Using Aluminum Bump]
Next, an example of joining the aluminum bump 11 and the aluminum pad electrodes 41 and 53 will be described with reference to
1) As described above, for the DDIC 4, the aluminum bump 11 is previously formed on the aluminum pad electrode 41 in a state of the single component (single unit) as illustrated in
2) Next, for room-temperature joining, as a vibration pressurizing jig or apparatus, the stage 200 constituting an anvil (pedestal) and the ultrasonic joining tool 300 (hereinafter, abbreviated as “tool 300”) constituting a horn including iron or the like disposed immediately above and oppositely to the stage are prepared. Then, the vicinity of the pad electrode 61 on the substrate 5 side is mounted on the stage 200, and the upper surface of the DDIC 4 is adsorbed and held by an adsorption chuck (not illustrated) or the like provided on the lower surface of the tool 300.
3) Then, the positions of the tool 300 and the stage 200 (alternatively, at least one of the tool 300 and the stage 200) are finely adjusted. That is, as illustrated in
4) Thereafter, the tool 300 is pressed to bring the aluminum pad electrode 41 on the DDIC 4 side into contact with the aluminum pad electrode 53 on the substrate 5 side via the aluminum bump 11 (see
By joining with the tool 300 or the like, the aluminum pad electrode 53 on the DDIC 4 side can be firmly joined to the aluminum pad electrode 41 on the substrate 5 side. Furthermore, the ultrasonic vibration causes vibration in a direction parallel to the joining surface. Note that, at the time of this joining work, the ELD 2 is already mounted on the substrate 5, but there is no problem since the joining is performed at room temperature. Furthermore, the joining conditions in the present embodiment are not particularly limited to the above-described conditions, and it is sufficient that a required joining strength can be obtained.
5) As a result, even if an oxide film or the like is formed on an Al surface, the oxide film or the like is removed by ultrasonic vibration, and Al can be reliably joined to each other.
Therefore, according to the embodiment of the present disclosure, the joining by CoC (Chip on Chip), that is, the joining between the DDIC 4 and the substrate 5 on which the main body portion 21 of the organic EL display device 2 is formed is performed by pressurization at room temperature without heat and ultrasonic vibration using the stage 200 and the tool 300. In this joining by ultrasonic vibration, in a case where aluminum, for example, is used as a material to be used, even if an oxide film is formed on the surface of aluminum, for example, the oxide film is removed by rubbing both joining surfaces against each other by ultrasonic vibration, so that it is possible to perform firm joining without causing joining failure. As a result, room-temperature joining with CoC, that is, the DDIC 4 can be joined and connected onto the substrate 5 by pressurization and ultrasonic waves without being heated.
Furthermore, according to the joining method according to the embodiment of the present disclosure, the joining work at this time is work at room temperature that does not require heating or the like as described above. Therefore, even in the substrate 5 on which the ELD 2 weak to heat is formed, the CoC joining work can be performed, which is convenient.
Therefore, according to the embodiment of the present disclosure, when the aluminum bump 11 is provided in the DDIC 4, prior to joining to the aluminum pad electrode 53 on the substrate 5 side, the single DDIC 4 is turned upside down to form the aluminum bump, so that the work can be easily performed and the work can be performed reliably and quickly.
Furthermore, in the case of performing work at room temperature by ultrasonic vibration in the case of joining the DDIC 4 to the substrate 5, even if the main body portion 21 of the ELD 2 is already formed on the substrate 5, there is no risk that a thermal influence will spread to the ELD 2, which is particularly convenient.
In addition, as in the embodiment according to the present disclosure, in a joining structure in which pad electrodes including the same metal such as aluminum or the like are connected to each other, or bumps including the same metal such as aluminum are connected to each other, or a pad electrode including the same metal such as aluminum and a bump are connected to each other, stability with respect to a joining surface and a joining phase is favorable, leading to improvement of reliability for a semiconductor device or the like having these joining structures.
In addition, as in the embodiment of the present disclosure, in a semiconductor device or the like manufactured with a joining structure by ultrasonic vibration involving pressurization at room temperature, occurrence of a warpage phenomenon or the like of a substrate or the like due to heat can also be prevented, so that the yield can also be improved.
Furthermore, as in the embodiment of the present disclosure, in a semiconductor device or the like using a joining structure using ultrasonic vibration, since an insulating resin or the like is not interposed in a joining portion, a resistance value at the joining portion does not increase as compared with a joining structure using the ACF, the ACP, and the like, for example, and thus, it is possible to lead to an increase in operation speed of the device itself.
Next, a modification of the above-described embodiment will be described. Note that, in the modification, the same portions as those in the above-described embodiment are denoted by the same reference numerals, and a redundant description is avoided.
Usually, for example, in the case of a structure or the like in which a film is formed by sputtering to form a pad electrode, the aluminum pad electrode 53 on the substrate 5 side has a thickness of about 0.5 to 1 μm (which is defined as a thickness d0), for example. On the other hand, the thick aluminum pad electrode 42 (which is hereinafter referred to as aluminum pad thick electrode 42) on the DDIC 4 side has a thickness of, for example, about 8 μm (which is defined as a thickness d1, that is, d1>>d0).
As a method of forming the aluminum pad thick electrode 42, for example, if the following method is possible, the aluminum pad thick electrode may be formed by this method. That is,
Furthermore, in addition to this method, as a method of forming the aluminum pad thick electrode, for example, the aluminum pad thick electrode may be formed by a method such as aluminum plating, aluminum vapor deposition, and the like on a terminal on which the aluminum pad thick electrode is to be formed among terminals in which a film is formed by aluminum on a wafer. In short, the aluminum pad thick electrode may be formed by any forming method as long as the aluminum pad thick electrode having a required film thickness is formed.
In addition, the method of forming the aluminum pad thick electrode 42 is not particularly limited to the method described above. There is no particular limitation as long as the method makes formation easy, uses the aluminum material same as that of the aluminum pad electrode 53 on the substrate 5 side, and enables reliable and stable joining by ultrasonic vibration at room temperature involving pressurization.
According to the modification of the present disclosure, the aluminum pad thick electrode 42 on the DDIC 4 side and the aluminum pad electrode 53 having a normal thickness on the substrate 5 side can be joined by ultrasonic vibration at room temperature involving pressurization using the similar stage 200 and the tool 300 as in the above embodiment. That is, according to the present modification, unlike the above-described embodiment, it is not necessary to perform work of stacking the aluminum bump 11 on the pad electrode by a wire bonder or the like.
In addition, the inventors of the present disclosure conducted a comparative experiment regarding a secular (temporal) change in a resistance value of a gold-aluminum (Au—Al) joined body and an aluminum-aluminum (Al—Al) joined body.
As a result, the graph illustrated in
On the other hand, it was found that the resistance value of the joined body of aluminum and aluminum (Al—Al) did not increase even after the lapse of 2000 hours which is the same lapse time as described above although the detailed qualitative and theoretical reasons were unknown. As a result, it was found that a joined body of aluminum and aluminum can realize a high-quality connection state over a long period of time as compared with a joined body of gold and aluminum (Au—Al).
As described above, in the embodiments according to the present disclosure, the organic EL display device which is an example of the CoC joining structure has been described, but the present disclosure is also suitable for application to, for example, a liquid crystal display device which is weak against heat.
Furthermore, the present disclosure can be applied to, for example, instrument display devices provided at a driver seat in transportation means such as automobiles, aircrafts, railways, ships, submarines, and the like, instrument panels in artificial satellites or the like, monitor display devices in various medical devices including electronic endoscopes or the like at medical sites, monitor display devices for consumer or military images, image display devices in various mobile terminal devices including mobile phones, radiation measurement monitor display devices in nuclear facility apparatuses such as nuclear reactors, nuclear fusion reactors, and the like, display devices for counter measurement of cosmic rays, particles, and the like in high energy experimental facilities such as accelerators, and other various applications and fields.
Although the present disclosure has been specifically described above with reference to the embodiments, the present disclosure is not limited to the above-described embodiments, and various modifications can be made. For example, in the above embodiment, an example in which the aluminum bump is formed on the aluminum pad electrode of the DDIC constituting a second semiconductor (second chip) has been described, but the present technology is not limited thereto. That is, in the present disclosure, as described above, an aluminum bump may be formed only on the aluminum pad electrode of the substrate 5, which is a first semiconductor to be joined to the DDIC 4, which is the second semiconductor. Alternatively, there may be provided a structure in which an aluminum bump is formed on both pad electrodes and both the aluminum bumps are joined to each other at room temperature by ultrasonic vibration involving pressurization.
In addition, in the present disclosure, the pad electrode and the bump as described above are formed using aluminum as a material, but the formation material is not limited thereto, and any material having good electrical conductivity, such as copper (Cu), gold (Au), silver (Ag), and others, for example, can be used, and a similar effect can be obtained. In addition, the materials to be used may be subject to limitations because metals with good electrical conductivity other than the above and high hardness may not necessarily be suitable for joining by ultrasonic vibration involving pressurization.
The embodiments and each configuration example according to the present disclosure have been described above. Finally, the description of the above-described embodiments and the configuration examples is an example of the present disclosure, and the present disclosure is not limited to the above-described embodiments and the configuration examples. For this reason, it is needless to say that various modifications other than the above-described embodiments and the configuration examples can be made according to the design and the like without departing from the technical idea according to the present disclosure. Furthermore, the effects described in this specification are illustrative only and are not limitative. Furthermore, there may be other effects.
Note that, the drawings in the above-described embodiments and each configuration example are schematic, and dimensional ratios (aspect ratios) and the like of the individual portions do not always coincide with actual ones. Furthermore, it is needless to say that the drawings include parts having different dimensional relationships and ratios. In addition, various modes can be applied as long as effects similar to the effects described in the above-described embodiments and configuration examples can be obtained.
Note that the present disclosure can have the following configurations. With such configurations, it is possible to realize a flip connection structure, a room-temperature flip connection structure, and a connection method therefor, which do not cause a risk of deterioration of a substrate or a semiconductor chip due to heat.
(1) A flip-chip connection structure in which semiconductors are connected by a flip chip, the flip-chip connection structure including:
(2) The flip-chip connection structure according to (1) above, in which
(3) The flip-chip connection structure according to (2) above, in which
(4) The flip-chip connection structure according to (2) or (3) above, in which
(5) A room-temperature flip-chip connection structure of a flip chip in which a semiconductor is connected to a substrate to be used in a liquid crystal panel or an organic EL panel of a display system, in which
(6) The room-temperature flip-chip connection structure according to (5) above, in which
(7) The room-temperature flip-chip connection structure according to (5) above, in which
(8) A flip-chip connection method of forming semiconductors by joining the semiconductors to each other by a flip-chip connection method using a joined body joined by an aluminum bump and an aluminum pad electrode or an aluminum bump and an aluminum bump, the flip-chip connection method including:
| Number | Date | Country | Kind |
|---|---|---|---|
| 2021-045132 | Mar 2021 | JP | national |
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2022/010580 | 3/10/2022 | WO |
