This application is a 371 of PCT/IB2018/053472, filed May 17, 2018, which claims the benefit of Italian Patent Application No. 102017000053902, filed May 18, 2017.
This disclosure relates to bonding between semiconductor wafers and more particularly to a hybrid bonding method for bonding two semiconductor wafers and a related three dimensional integrated device, in particular an integrated optical sensor.
Wafer bonding techniques are increasingly important for realizing three-dimensional IC structures. In wafer bonding, two semiconductor wafers are bonded together to form a three dimensional stack. In applications where two different wafer types are needed, this approach can provide a single device with both functional devices in one package.
In one particular application, CMOS image sensors, a substrate including an array of image sensors may be bonded to a circuit wafer so as to provide a 3D IC system that includes all of the circuitry needed to implement an image sensor in the same board area as the array of sensors, providing a complete image sensing solution in a single packaged integrated circuit device.
Wafer bonding techniques for stacking two semiconductor wafers typically comprises two methods: pure dielectric or metallic bonding, and hybrid bonding. Pure dielectric bonding guarantees mechanical stability simply by the fact the thin die or wafer is bonded over its entire surface. This method, however, limits the options for electrical interconnection to a via-last approach. In the case of metallic bonding, electrical interconnection is the prime function of the bond, but the mechanical stabilization of thin die requires introduction of dummy metallization also in areas where no electrical interconnects are required.
Compared to the previous technique, hybrid wafer bonding approach using metal/dielectric patterned layers involves combining metal bonding for direct electrical interconnections and dielectric bonding for mechanical bonding strength. Two main approaches have been patented so far, one using Metal embedded in SiO2 and Metal embedded in Polymer layer:
1. Metal/SiO2 (Ziptronix Direct Bond Interconnect method);
2. Metal/Polymer (BCB) (Metal/Adhesive Via first 3D bonding).
Hybrid wafer bonding methods are well known in the art. The documents:
According to these techniques, an adhesive layer of benzocyclobutene (BCB) or of another thermosetting polymer resin is deposited on a respective wafer of two semiconductor wafers to be bonded together. The semiconductor wafers are stacked so as to place at least portions of the adhesive layers one against the other; while the wafers are under a compressive load, the adhesive layers are cured to make them well adhere one to the other.
These known techniques are quite onerous because they require the use of a dedicated tool for thermo-compression, which is practically considered mandatory in present hybrid bonding techniques, in order to make the adhesive layers stick together so as to interconnect the two wafers.
The patent publication US2015/0021785 discloses a semiconductor device structure that includes a first semiconductor wafer and a second semiconductor wafer bonded via a hybrid bonding structure, wherein the hybrid bonding structure includes a first conductive material embedded in a first polymer material and a second conductive material embedded in a second polymer material.
The document US2016/190103 discloses a semiconductor device having a first substrate and a second substrate bonded with each other with a first surface layer and a second surface layer facing each other. The first surface layer and the second surface layer comprise a film of Silicon oxide and exposed metal contacts. The surface layers are treated with oxygen plasma to terminate dangling bonds with hydroxyl groups, then the metal contacts are aligned and brought into direct contact with each other.
The two substrates are firmly kept one against the other, for example by pressing one against the other or by firmly tying one onto the other acting on the free surface layers opposite to said first surface layer and said second surface layer, so as to contrast the forces that are generated because of thermal expansion, then the two superposed substrates are placed in an oven one firmly kept one against the other. When subjected to a heat treatment, the facing metal contacts of the first surface layer and of the second surface layer are pressure-bonded because of their relatively great coefficient of thermal expansion and because the two substrates are firmly kept one against the other. As a consequence, a strong connection between facing metal contacts of the two substrates is attained.
Therefore, the method disclosed in this prior document can be performed only if a dedicated tool for compressing the two substrates, of for keeping them one against the other for contrasting expansion forces due to thermal expansion, is available.
Extensive studies and tests carried out by the applicant have shown that it is possible to perform hybrid bonding without using a dedicated tool for thermo-compression. According to the herein disclosed technique, the semiconductor wafers to be bonded together may be placed in an oven simply staying one upon the other without applying any additional compression between them besides their own weight.
This outstanding result has been attained thanks to the use of a particular type of thermosetting materials, namely siloxane polymers of the type that shrink when cured. Among these siloxane polymers, the siloxane polymers of the type SC-480, siloxane polymers of the series SC-200, SC-300, SC-400, SC-500, SC-700, SC-800 made by Silecs Oy (now acquired by Pibond Oy) and mixtures thereof are particularly adapted for being used in the herein disclosed method of hybrid bonding of two semiconductor wafers.
A hybrid bonding method, that may be carried out without compressing together the semiconductor wafers to be bonded while a thermosetting is being performed, is defined in the annexed claim 1.
More in detail, this disclosure provides a hybrid bonding method for bonding together two semiconductor wafers, each semiconductor wafer having a plurality of mutually spaced conductive pads exposed on a top surface of the wafer and defining recesses therebetween, the method comprising the steps of:
According to an embodiment of the hybrid bonding method, the step a2) is carried out by depositing on said second semiconductor wafer of said semiconducting wafers, a coating layer of said siloxane polymer not yet cured in a conformal manner over the top surface of said second semiconductor wafer and over its conductive pads so as to bury its conductive pads and to fill the recesses between them, then by reducing thickness of the layer of said siloxane polymer not yet cured of said second semiconductor wafer by removing a topmost portion thereof with a chemical mechanical polishing technique, so as to expose its conductive pads and to planarize them together with the recessed filled with said siloxane polymer not yet cured.
According to another embodiment of the hybrid bonding method, the step a2) is carried out by depositing, on said second semiconductor wafer of said semiconducting wafers, a coating layer of silicon oxide, digging holes in said coating layer and filling them with metal to realize said conductive pads.
Three-dimensional integrated devices, in particular 3D image sensors, fabricated using the disclosed method for hybrid bonding semiconductor wafers, are also disclosed.
The claims as filed are integral part of this specification and are herein incorporated by reference.
FIGS. from 1a to 1d illustrate steps of a hybrid bonding method of two semiconductor wafers using a siloxane polymer on both wafers.
FIGS. from 2a to 2d illustrate steps of a hybrid bonding method of two semiconductor wafers using a siloxane polymer on the device wafer and SiO2 on the carrier wafer.
The steps of a method of hybrid bonding two semiconductor wafers are illustrated in the annexed figures. FIGS. from 1a to 1d refer to a hybrid bonding carried out using on the substrate of both wafers a siloxane polymer of the type that shrinks when cured.
Differently from what is commonly considered unescapable in the art, it is possible to perform a hybrid bonding of two wafers without keeping the wafers compressed one against the other while a thermosetting step is being carried out.
The applicant has found that this result cannot be attained using BCB, which is by far the most widespread adhesive for hybrid bonding, and thus it is necessary to use a different adhesive. Among the numerous possible choices, the applicant has noticed that siloxane polymers undergo a spontaneous shrinking when cured, and thus they could be used in the proposed method. For example the siloxane polymers belonging to the series identified by the following alphanumeric commercial names:
Among the siloxane polymers cited above, the siloxane polymers of the series SC-300, SC-400, SC-700 and SC-800 showed good performances. Without being bound to any theory, the better results obtained with the above mentioned preferred series of siloxane polymers may be due to the relevant shrinking of the polymers when cured.
Outstanding performances have been obtained using a siloxane polymer of the type SC-480.
As may be noticed in the enclosed figures and is common in the art, hybrid bonding is carried out by filling (
According to another embodiment, the layer of silicon oxide (SiO2) 5 is first deposited onto the top surface of the second wafer 2, then holes are dug into it. Into these holes a metal is deposited to fill them, at least partially, to realize the conductive pads 3 that are exposed on the top surface of the second wafer 2.
Through an alignment step, the two wafers 1 and 2 are superposed one another (
It is worth noticing that the siloxane polymer 4 is not yet cured when the two semiconductor wafers 2 and 3 are placed into the oven.
In prior hybrid bonding methods that employ BCB, it is necessary to compress the two wafers one against the other and to cure the adhesive while keeping them compressed, in order to keep the electrical contacts 3 pressed against one another and have the smallest possible contact resistance between any pair of matched contacts. For this reason, in prior methods it is necessary to use a purposely designed thermo-compression tool.
By contrast, with the method of this disclosure, a thermocompression tool is no longer required because, when cured, abutted portions of siloxane polymer 4 stick to each other or to portions of silicon oxide (SiO2) 5 (
Tests carried out by the applicant have shown that siloxane polymers of the type SC-480 and of the series SC-200, SC-300, SC-400, SC-500, SC-700, SC-800 and mixtures thereof stick well to each other when cured and also to SiO2. Moreover, facing portions of these materials, cured for bonding two semiconductor wafers, withstand the relevant traction forces that are generated when cured without cracking.
Conveniently, before placing the two wafers one against the other before the final thermo-setting step, the free surfaces of the wafers 1, 2 are planarized with a well-known Chemical Mechanical Polishing (CMP) step, in order to enhance matching of the electrical contacts.
In order to improve the adhesion of the siloxane polymer to the wafer substrate, a wet clean process using H2O2+NH3 dried with IPA (isopropyl alcohol) may be executed before depositing in a conformal manner the layer of siloxane polymer.
Using the hybrid bonding method of this disclosure it is possible to realize three-dimensional integrated devices, in particular 3D image sensors, with less process steps than in prior art fabrication processes.
Preferably, the portions of siloxane polymer 4 are cured by baking the two semiconductor wafers one coupled to the other in an oven at a temperature ranging from 300° C. to 400° C. for about 60 minutes.
Optionally, after having planarized the free surfaces of the wafers with a CMP step (
Number | Date | Country | Kind |
---|---|---|---|
102017000053902 | May 2017 | IT | national |
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/IB2018/053472 | 5/17/2018 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2018/211447 | 11/22/2018 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
6080640 | Gardner | Jun 2000 | A |
6559543 | Dunham | May 2003 | B1 |
20020074670 | Suga | Jun 2002 | A1 |
20050236695 | Ghoshal | Oct 2005 | A1 |
20050255711 | Sugawara | Nov 2005 | A1 |
20070207592 | Lu et al. | Sep 2007 | A1 |
20150021785 | Lin et al. | Jan 2015 | A1 |
20150294963 | Lin | Oct 2015 | A1 |
20160190103 | Kabe et al. | Jun 2016 | A1 |
20170062366 | Enquist | Mar 2017 | A1 |
Entry |
---|
International Search Report and Written Opinion for Corresponding International Application No. PCT/IB2018/053472, (15 Pages) (dated Aug. 28, 2018). |
Number | Date | Country | |
---|---|---|---|
20200212086 A1 | Jul 2020 | US |