This invention relates to semiconductor wafer fabrication and, in particular, to a process for de-bonding a carrier wafer from a device wafer containing electrical components, where the carrier wafer provides temporary mechanical support for the device wafer during processing of the device wafer.
Although the invention applies to the fabrication of virtually any type of semiconductor device wafer, an example of fabricating a light emitting diode (LED) wafer is presented.
Gallium nitride based LEDs, such as for generating blue light, are manufactured by epitaxially growing semiconductor layers over a growth substrate (a wafer), such as sapphire. An active layer between p-type and n-type layers emits light having a peak wavelength, and the peak wavelength is determined by the material composition of the active layer. Such semiconductor layers may be on the order of a few tens of microns thick and very brittle. Metallization and other well-known processes are then performed on the LED wafer to, for example, remove the growth substrate, thin the LED layers, and form electrodes. The LED wafer is subsequently diced to form LED chips for packaging.
In cases where the growth substrate is to be removed from the LED wafer, such as to perform processes on the LED layers facing the growth substrate, or in cases where the growth substrate is to be thinned, such as for scribe and break singulation, a carrier wafer must be first bonded to the opposite surface of the LED wafer to provide mechanical support of the thin LED layers during removal or thinning of the growth substrate. After the carrier wafer is bonded to the LED wafer and the growth substrate is removed or thinned, any exposed LED layers may be further processed, such as thinning the LED layers and depositing thin films over the exposed LED layers. The carrier wafer may be connected temporarily or permanently. If the carrier wafer is temporary, methods have to be performed to de-bond the carrier wafer from the LED wafer. Silicon carrier wafers are commonly used due to their low cost and well-known characteristics. A silicon carrier wafer absorbs light from the LED and should be ultimately removed from the LED layers.
Using a carrier wafer (typically silicon) for mechanical support is commonly used in integrated circuit processes, especially where IC wafers are stacked to form three-dimensional (3-D) modules and conductive vias extend vertically though the IC wafers. Typically, the carrier wafer is bonded to the IC wafer using an intermediate-temperature (e.g., up to 250° C.) polymer adhesive so that the adhesive does not release at the expected IC wafer process temperatures. After the IC wafer processing is completed, de-bonding of the carrier wafer is performed at a high heat and with special tools and techniques (e.g., using Brewer Science's HT1010™ thermal-sliding de-bond process).
It is also known to apply a special light-to-heat conversion (LTHC) layer over a carrier wafer, then bond the carrier wafer to the device wafer using a special adhesive that melts at a relatively low temperature. A laser beam is then used to heat up the LTHC layer, which, in turn, melts the adhesive for de-bonding the carrier wafer. The LTHC material, special adhesive materials (e.g., 3M's LC3200 and LC5200), and special tools are available from 3M Company. The process is relatively expensive and time-consuming. Since the adhesive needs to melt at a relatively low temperature (the 3M adhesive is rated only up to 180° C.), the de-bonding process is not suitable when quality thin films need to be deposited, since such thin films typically need to be deposited at over 250° C.
In some processes for forming high quality thin films, such as a PECVD process, the process temperature is substantially greater than 250° C. The polymers used for temporarily bonding the carrier wafer to the IC or LED wafer must therefore be very high temperature polymers (e.g., >350° C.), requiring more complex and higher temperature de-bonding processes and tools.
What is needed is an improved technique for de-bonding a carrier wafer from a device wafer that is simpler than the prior art processes. It is preferable that the de-bonding process works with commonly used bonding layer materials, including high temperature polymers (e.g., BCB, PBO, polyimides, etc.), intermediate temperature polymers/adhesives (e.g., Brewer Science's HT1010™, 3M's LC3200/LC5200, etc.), low temperature glues/adhesives, and even metal (e.g., eutectic alloy) bonding materials.
Instead of a light absorbing carrier wafer, such as silicon, a transparent carrier wafer is used, such as a sapphire or SiC wafer. In the example of an LED wafer process, the carrier wafer is bonded to the LED wafer opposite the side that is supported by the growth substrate. The bonding material is typically a conventional polymer adhesive, such as a polymer that is stable up to 350° C. The growth substrate is then removed from the LED wafer, and the exposed LED layers are further processed. Such further processing may include thinning, depositing thin films, forming vias, etc. The growth substrate may be thinned instead of removed. The device wafer may be any wafer containing circuitry.
For de-bonding the carrier wafer from the LED wafer, a laser beam is scanned over the carrier wafer, where the carrier wafer is substantially transparent to the wavelength of light from the laser beam. The polymer adhesive directly absorbs the laser beam energy, and the energy breaks the polymer-carrier chemical bonds, rather than simply melting the polymer through heat. There is no light-to-heat conversion (LTHC) layer used, so special materials are not needed. The laser is not strong enough to damage any structures within the LED wafer. In one embodiment, a 248 nm laser is used. A near-UV or blue laser may also be used. In another embodiment, a UV laser emitting a peak wavelength of 193 nm with an energy intensity of 800 mJ/cm2 (40 W/cm2) is used to de-bond a benzocyclobutene (BCB) polymer adhesive that is stable up to 350° C.
Accordingly, the adhesive does not require heat to be released so can be an adhesive that is stable at sufficiently high temperatures for thin film processing.
After the removal of the carrier wafer, the de-bonded surface of the LED wafer is then cleaned of the residual adhesive.
In another embodiment, a metal layer, such as a suitable eutectic metal alloy layer, is deposited on both the device wafer and the transparent carrier wafer (e.g., sapphire). The wafers are then bonded together under heat and pressure without any additional adhesive. A laser beam is then scanned through the carrier wafer, where the laser energy breaks the chemical bonds between the metal layer and the transparent carrier wafer, which de-bonds the carrier wafer from the metal layer. The metal layers remaining on the device wafer may then be etched/cleaned before singulation. In some cases, the metal layers may be used as a reflector and/or an electrode for the device wafer and does not need to be removed before singulation.
The de-bonding technique may also be applied to other types of bonding techniques/materials, such as anodic bonding, fusion bonding, frit glass bonding, etc.
The de-bonding process may be used for any type of IC wafer and is not limited to LED applications. All such wafers are referred to herein as device wafers.
Various other examples of processes are also described, such as a process for forming conductive vias through wafers for three-dimensional modules.
Elements that are the same or equivalent are labeled with the same numeral.
The device wafer 10 includes an n-type layer 14, an active layer 16 that emits light, and a p-type layer 18. A p-metal electrode 20 contacts the p-type layer 18, and an n-metal electrode 22 contacts the n-type layer 14. A dielectric layer 24 insulates the n-metal electrode 22 from the p-type layer 18 and active layer 16. A singulation area is shown between dashed lines 26.
Since the inventive method is applicable to LED wafers as well as any type of IC wafer, the device wafer 10 has been simplified in the remaining figures to only show certain conductors in the device wafer 10. The device wafer 10 will typically comprise semiconductor material.
The carrier wafer 30 provides mechanical support for the device wafer 10 during subsequent processing of the device wafer 10. In one embodiment, all wafers used are 6 inch wafers, although any size wafers may be used. Standard fabrication tools may be used to handle the carrier wafer 30.
In one example, conductive vias are formed to provide an electrical path through the device wafer 10a. The conductive vias may be used for stacking wafers in a 3-D module, where electrodes on opposing wafer surfaces align and are in electrical contact with each other.
The insulated via holes 34 then filled with a conductive material 36, such as polysilicon, copper, aluminum, or any other suitable metal or alloy. The conductive material 36 may be deposited by sputtering, plating, or other process.
A metal electrode layer is then deposited and patterned over the exposed surface to form electrodes 38 contacting the conductive material 36 in filing via holes 34. The electrodes 38 may comprise gold or other suitable metal, including alloys. Thus, a conductive path is formed between opposing surfaces of the device wafer 10a. In the alternative conductive material 36 may only fill a portion of via holes 34.
The released carrier wafer 30 is then lifted off the device wafer 10a, such as using a mechanical tool or other means. In one embodiment, gas is released from the adhesive 32 during the absorption of energy and forces the carrier wafer 30 away from the device wafer 10a.
The electrodes 28 of the resulting device wafer 10a may then be bonded to aligned electrodes on another wafer 50 or sandwiched between two wafers, where each wafer may provide additional circuitry in a 3-D module. The aligned wafer electrodes may be bonded by ultrasonic bonding under pressure, or by gold balls, or by solder, etc. The modules are then singulated, such as by sawing, laser singulation, water jet cutting, etc., and the tape 42 is then X-Y stretched to separate the modules in preparation for the modules to be packaged or mounted on another wafer or a printed circuit board. The dashed line 48 illustrates one possible singulation line.
In one embodiment, the device wafer 10a of
Alternatively, the bonded wafer structure may be mounted on a vacuum chuck, prior to the tape 42 being applied, for cleaning the device wafer 10a after the carrier wafer 30 has been de-bonded. After cleaning, the tape 42 is affixed to the cleaned surface.
In one embodiment, the second device wafer 54 contains active control circuitry 67 for controlling LEDs, the device wafer 10a contains TVS circuitry 68 (only one TVS circuit 68 is shown connected to the electrodes 66 for simplicity), and the LED wafer electrodes 20 and 22 (for each LED) of
In another embodiment, the LED wafer of
The resulting 3-D wafer may be singulated along line 72 to form 3-D module dies for packaging.
A second metal layer 82 (such as a eutectic alloy) is deposited on the transparent carrier wafer 30 by, for example, sputtering. The metal layers 80 and 82 may have the same composition. The metal bonds to the wafers need not be strong.
Suitable metals and alloys include combinations of Au, Cu, Ag, Al, Sn, SiGe, and Si.
The metal layers 80 and 82 are then bonded together using heat and pressure, such as by ultrasonic welding or externally applied heat. The metal-metal bond can withstand higher temperatures than available polymer adhesives, so the process of
The device wafer 10a is then singulated, as previously described.
The de-bonding technique may also be applied to other types of bonding techniques/materials, such as anodic bonding, fusion bonding, frit glass bonding, etc.
While particular embodiments of the present invention have been shown and described, it will be obvious to those skilled in the art that changes and modifications may be made without departing from this invention in its broader aspects. The appended claims are to encompass within their scope all such changes and modifications as fall within the true spirit and scope of this invention.
This application is the U.S. National Phase application under 35 U.S.C. § 371 of International Application No. PCT/IB2013/056588, filed on Aug. 12, 2013, which claims the benefit of U.S. Patent Application No. 61/696,943, filed on Sep. 3, 2012. These applications are hereby incorporated by reference herein.
Filing Document | Filing Date | Country | Kind |
---|---|---|---|
PCT/IB2013/056588 | 8/12/2013 | WO | 00 |
Publishing Document | Publishing Date | Country | Kind |
---|---|---|---|
WO2014/037829 | 3/13/2014 | WO | A |
Number | Name | Date | Kind |
---|---|---|---|
5656548 | Zavracky | Aug 1997 | A |
RE38466 | Inoue | Mar 2004 | E |
20020115265 | Iwafuchi | Aug 2002 | A1 |
20050233504 | Doi et al. | Oct 2005 | A1 |
20060264004 | Tong | Nov 2006 | A1 |
20080096365 | Chitnis | Apr 2008 | A1 |
20080315427 | Seko | Dec 2008 | A1 |
20100155936 | Codding et al. | Jun 2010 | A1 |
20100186883 | Tomoda | Jul 2010 | A1 |
20100330788 | Yu | Dec 2010 | A1 |
20110001155 | Hsu | Jan 2011 | A1 |
20120115262 | Menard et al. | May 2012 | A1 |
20140061949 | Enquist | Mar 2014 | A1 |
20140311680 | Kubo et al. | Oct 2014 | A1 |
Number | Date | Country |
---|---|---|
101005110 | Jul 2007 | CN |
101465402 | Jun 2009 | CN |
102106001 | Jun 2011 | CN |
102214756 | Oct 2011 | CN |
0924769 | Jun 1999 | EP |
2262012 | Dec 2010 | EP |
2378553 | Oct 2011 | EP |
Number | Date | Country | |
---|---|---|---|
20150228849 A1 | Aug 2015 | US |
Number | Date | Country | |
---|---|---|---|
61696943 | Sep 2012 | US |