The present invention relates generally to lead frame packages, and more particularly to a method and apparatus for providing a package structure for use in lead frame packages.
The microelectronic industry has been making a tremendous improvement toward miniaturization of circuitry with greater performance. Similarly, the semiconductor industry particularly with regard to lead frame packages, has been aggressively making efforts to follow the microelectronic trend. Dies are decreasing in size, while increasing in performance. There are however, a number of disadvantages associated with conventional lead frame packages. One such disadvantage is that conventional lead frame packages are not optimized for use in frequencies greater than 10 GHz. At these frequencies, undesirable crosstalk between package interconnects may occur.
An exemplary conventional lead frame package 100 is shown in
The densely populated electrical interconnections 130a-p lack isolation between adjacent interconnections. This lack of isolation may cause undesirable crosstalk between signal interconnections and their adjacent interconnections. To illustrate, if the lead frame package 100 were 3 mm×3 mm, wherein interconnection 130a was an RF signal interconnection and the adjacent interconnection 130b was an intermediate frequency (IF) signal interconnection, the RF interconnection 130a and the IF interconnection 130b may be as close as 0.5 mm, thus lacking a significant amount of isolation between them. As a result, when an RF signal is applied to the RF signal interconnection 130a and an IF signal is applied to the IF signal interconnection 130b, the RF signal and the IF signal may leak into one another, resulting in corruption of both signals.
Another disadvantage associated with conventional lead frame packages relates to their manufacturing. As will be recognized by those skilled in the art, conventional methods of manufacturing require that die attach pads be tied to a perimeter of their respective lead frame packages. Typically, a die attach pad is tied to a perimeter of a lead frame package via tie bars which extend from the package's die attach pad to the corners of the package. This method of manufacturing is desirable because of its cost effectiveness. Referring again to
Accordingly, it is desirable to have a lead frame package that can be manufactured utilizing conventional manufacturing technology, yet minimizes the degradation of electrical performance of mounted semiconductor circuits. It is also desirable to have a lead frame package for minimizing crosstalk between adjacent electrical interconnections within the lead frame package.
The present disclosure relates to a lead frame package comprising a die attach pad and two or more electrical interconnections, wherein at least one of the two or more interconnections is affixed to the die attach pad for electrically grounding the lead frame package.
The present disclosure further relates to a method for providing a lead frame package. The lead frame package comprises two or more electrical interconnections and a die attach pad. At least one electrical interconnection is affixed to the die attach pad to ground the lead frame package and at least one of the electrical interconnections is an RF signal interconnection. At least one of the die attach pad and the at least one grounding electrical interconnection is connected to a grounding contact of a circuit-board. The at least one RF signal electrical interconnection is connected to an RF signal contact on the circuit-board, thereby forming a mounted semi-conductor circuit.
Described herein are methods and apparatus related to a novel lead frame package. A ‘mounted semiconductor circuit’, as the phrase is used herein, refers to a lead frame package mounted on a circuit-board. Unlike existing lead frame packages, the methods and apparatus described herein provide for a lead frame package that minimizes the degradation of electrical performance of mounted semiconductor circuits, and minimizes crosstalk between adjacent electrical interconnections. To that end, the methods and apparatus of the present disclosure are described below with reference to exemplary embodiments and figures. It should be understood, however, that these exemplary embodiments and figures are provided to illustrate and cover to facilitate an understanding of the concepts relevant to the present disclosure and as such, should not be interpreted as limiting.
Referring now to
Connected to the die attach pad 210 are one or more tie bars 211a-h. In the illustrated configuration shown in
As shown in
The exemplary lead-frame package 200 may comprise one or more non-tie bar electrical interconnections 230a-l. In one implementation, one or more of these interconnections 230a-l may comprise RF signal interconnections (230b, 230e, 230h, 230k), each of which is positioned between two or more of the tie bar interconnections 211a-h. As
Referring now to
The bottom portion 204 of lead frame package 200 may be mounted to the circuit-board 300, for example, using any appropriate means including soldering, to form an electrical connection between the electrical interconnections of the package 200 and the circuit-board 300. Further, the bottom portion 204 of the lead frame package 200 may be mounted onto the circuit-board 300 such that one or more signal interconnections 230a-l are electrically connected to one or more signal contacts 301 on the circuit board 300 and one or more tie bar interconnections 211a-h are electrically connected to the die attach pad 210 and/or grounding contacts 303 of the circuit-board 300. In this manner, the tie-bar interconnections 211a-h are connected to ground 305. Using the tie bars 211a-h in this manner serves a dual-purpose. First, any resonance of the tie bars 211a-h created by applying a signal to one or more of the electrical interconnections 230a-l may be minimized, if not eliminated altogether. This can be particularly beneficial when applying an RF signal above 10 GHz to one or more of the electrical interconnections 230a-l. Secondly, in the case where an RF signal interconnection 230b, 230e, 230h, 230k is positioned between two grounding ties bar interconnections (211a-h), the tie bars 211a-h provide an RF shield around the RF interconnections 230b, 230e, 230h, 230k, thereby preventing crosstalk.
It is noted that other interconnections 230a-l on the lead frame package 200 may be designated as desired, and then mounted such that the desired interconnections correspond between the package 200 and the circuit-board 300. The lead frame package 200 mounted on the circuit-board 300 may be referred to as a “mounted semiconductor circuit”.
In operation, an RF signal may be applied to a mounted semiconductor circuit via at least one RF signal interconnection. For instance, it may be assumed that the electrical interconnection 230b is an RF signal interconnection upon which an RF signal may be applied. In such a configuration, the RF signal interconnection 230b may be positioned between adjacent ties bars 211a and 211b, both of which are grounded. In conventional lead frame packages, RF signal interconnections are commonly located adjacent to other electrically conductive interconnections such as for example, other RF signal interconnections, IF signal interconnections, DC inputs, etc. As a result, signals from these interconnections may leak or cross over causing crosstalk between interconnections, thus corrupting the signal(s). However, in the current configuration, when an RF signal is applied to the RF signal interconnection 230b, the two adjacent grounded tie bars 211a, 211b function as an RF shield, thereby preventing crosstalk between adjacent interconnections. Since the grounded tie bars 211a, 211b are both non-conductive, they provide an electrical barrier for preventing signals from crossing over or leaking over.
Referring now to
The die attach pad 210 is affixed when the frame is created using any known etching process. The tie bars 211a-211h may provide additional ground, such that when the package is mounted to a circuit-board, the tie bars may be electrically connected to grounding contacts on the circuit board via the respective interconnections to which the ties bars are affixed. Further, the die attach pad 210 may be affixed multiple tie bars such that a pair of tie bars is positioned along either side of one of the remaining interconnections. An electrical interconnection positioned between two tie bars may then be designated as an RF signal interconnection (Step 404). As a result, when the lead frame package is mounted onto a circuit-board (next in step 406), the designated RF signal interconnection may be electrically connected to an RF signal contact on the circuit-board.
Next, in step 406, the lead frame package is mounted onto a circuit-board. The circuit-board may be any appropriate circuit-board, motherboard, device, and the like. The lead frame package may be mounted on the circuit-board using any appropriate means. In one embodiment, the package is mounted on the circuit-board using solder, thereby providing electrical connectivity between the package and the board.
When the lead frame package is mounted on the circuit-board (step 406) one or more the tie bars may be connected to grounding contacts on the circuit board via the electrical connections to which the tie bars are affixed (step 408). Grounding the tie bars in this manner serves a dual purpose. First, any resonance of the tie bars created by applying a signal, particularly an RF signal above 10 GHz, to one or more of the electrical interconnections may be minimized, if not eliminated altogether. Secondly, the tie bars provide an RF shield to signal interconnections, thereby preventing crosstalk between adjacent interconnections.
Also when the lead frame package is connected to the circuit board, the electrical interconnections designated as RF may be connected to RF contacts on the circuit-board (step 410). The remaining interconnections on the lead frame package may be designated as desired, and then connected to contacts on the circuit-board as appropriate.
Although the method and apparatus disclosed herein have been described in terms of exemplary embodiments, they is not limited thereto. Rather, the appended claims should be construed broadly to include other variants and embodiments of the disclosure which may be made by those skilled in the art without departing from the scope and range of equivalents of the disclosure.