Claims
- 1. A system comprising:
an integrated circuit; a printed circuit board (PCB) including at least one signal layer for conveying signals to and from the integrated circuit; and a power laminate for providing core power to the integrated circuit, the power laminate including at least one power plane and at least one reference plane, wherein the power laminate is separate from the PCB.
- 2. The system as recited in claim 1, wherein the PCB is not configured to provide core power to the integrated circuit.
- 3. The system as recited in claim 1, wherein the integrated circuit is mounted upon a first side of the PCB, and wherein the power laminate is mounted upon a second side of the PCB.
- 4. The system as recited in claim 1, wherein the power laminate is arranged between the integrated circuit and the PCB.
- 5. The system as recited in claim 4, wherein the power laminate includes at least one aperture for allowing signals to pass from the PCB to the integrated circuit.
- 6. The system as recited in claim 1, wherein the power laminate is mounted to the PCB by soldering.
- 7. The system as recited in claim 6, wherein the power laminate includes a ball-grid array.
- 8. The system as recited in claim 1, wherein the power laminate includes a land-grid array for mounting the power laminate to the PCB.
- 9. The system as recited in claim 1, wherein the power laminate includes a dielectric layer arranged between the power plane and the reference plane.
- 10. The system as recited in claim 1, wherein the power laminate includes two or more plane pairs, wherein each of the plane pairs includes a power plane and a reference plane.
- 11. The system as recited in claim 10, wherein a first of the two or more plane pairs is in an electrically parallel configuration with respect to a second of the two or more plane pairs.
- 12. The system as recited in claim 1, wherein the power laminate includes a connector for coupling a power source to the power laminate.
- 13. A method for delivering power to an integrated circuit, the method comprising:
providing a printed circuit board (PCB), wherein the PCB includes a plurality of signal paths; providing an integrated circuit, the integrated circuit including a plurality of signal connections, wherein each of the signal connections is electrically coupled to one or more of the plurality of signal paths; and providing a power laminate for supplying core power to the integrated circuit, wherein the power laminate is electrically coupled to the integrated circuit, wherein the power laminate includes at least one power plane and one reference plane, and wherein the power laminate is separate from the integrated circuit.
- 14. The method as recited in claim 13, wherein the PCB is not configured for providing core power to the integrated circuit.
- 15. The method as recited in claim 13 further comprising mounting the integrated circuit upon a first side of the PCB and mounting the power laminate on a second side of the PCB.
- 16. The method as recited in claim 13 further comprising arranging the power laminate between the integrated circuit and the PCB.
- 17. The method as recited in claim 16 further comprising providing at least one aperture in the power laminate for allowing signals to pass from the PCB to the integrated circuit.
- 18. The method as recited in claim 13 further comprising mounting the power laminate to the PCB by soldering.
- 19. The method as recited in claim 18, wherein the power laminate includes a ball-grid array.
- 20. The method as recited in claim as recited in claim 13, wherein the power laminate includes a land-grid array for mounting the power laminate to the PCB.
- 21. The method as recited in claim 13, wherein the power laminate includes a dielectric layer arranged between the power plane and the reference plane.
- 22. The method as recited in claim 13, wherein the power laminate includes a two or more plane pairs, wherein each of the plane pairs includes a power plane and a reference plane.
- 23. The method as recited in claim 22, wherein a first of the two or more plane pairs is in an electrically parallel configuration with respect to a second of the two or more plane pairs.
- 24. The method as recited in claim 13, wherein the power plane laminate includes a connector for coupling a power source to the power laminate.
PRIORITY DATA
[0001] This application claims priority to U.S. provisional application serial number 60/244,397, entitled “Method and Apparatus for Distributing Power to Integrated Circuits” filed Oct. 30, 2000.
Provisional Applications (1)
|
Number |
Date |
Country |
|
60244397 |
Oct 2000 |
US |