This application claims priority to Chinese Patent Application No. CN 202211022397.5, filed on Aug. 25, 2022, the disclosure of which is incorporated herein by reference in its entirety.
The present application relates to the technical field of semiconductors, in particular to a method for forming a SiGe channel.
In a fully depleted silicon on insulator (FDSOI) structure, conventionally, selective epitaxy is performed to grow SiGe on an exposed silicon surface of FDSOI, so as to form a SiGe/Si construction. Then a layer of silicon oxide is grown over the SiGe, with the assistance of a thermal annealing process. During the thermal annealing process, SiO2 on the surface reacts with Si in the SiGe, and Ge atoms diffuse downward under a thermal action, forming a SiGe channel with Si on the surface of FDSOI. Then SiOx on the surface is removed by means of an etching process, and denser SiOx which is to be used as a gate oxide of the device is formed by means of a thermal process. This method includes two thermal processes with a relatively large thermal budget, significantly limiting the concentration of Ge in the epitaxial growth of SiGe, and limiting the improvement of device performance within a certain range. Moreover, as Ge was introduced into the upper Si of FDSOI earlier to form a SiGe channel, a relaxation risk of SiGe due to a thermal treatment during a subsequent process is increased.
In view of the above defect in the prior art, the objective of the present application is to provide a method for forming a SiGe channel, so as to solve the problem of a relaxation risk of SiGe due to a thermal treatment during an FDSOI process in the prior art.
In order to achieve the above objective and other related objectives, the present application provides a method for forming a SiGe channel, at least including the following steps:
In an example, in step 2, the groove region is filled with the SiGe by means of epitaxial growth.
In an example, in step 3, the second silicon oxide layer is formed on the upper surface of the SiGe film by oxidizing the SiGe film.
In an example, a method of forming the SiO2-SiGe channel in step 5 is as follows: Ge atoms in the SiGe film diffuse into the silicon layer under a thermal action, and form a SiGe channel with Si in the silicon layer; Si in the SiGe film is oxidized to form a third silicon oxide layer; and the second silicon oxide layer, the third silicon oxide layer, and the SiGe channel jointly form the SiO2-SiGe channel.
In an example, a flow of the ammonia in step 5 is 5-20 L.
In an example, a temperature of the thermal treatment in step 5 is 850-1100° C.
In an example, a time for introducing the ammonia in step 5 is 1-5 min.
In an example, a flow of the oxygen in step 5 is 30-250 ml.
In an example, a time for introducing the oxygen in step 5 is 30 s to 3 min.
In an example, a pressure of the atmosphere of ammonia and oxygen in step 5 is 3-20 torr.
As stated above, the method for forming a SiGe channel of the preset application has the following beneficial effects: according to the present application, the SiGe channel is formed to reduce a relaxation risk of SiGe during a subsequent thermal treatment process. A small amount of oxygen is introduced at the same time when the ammonia propels Ge atoms, so as to effectively alleviate a damage on the surface of a gate oxide caused by the removal of a hard mask, effectively reduce defects of a Si/SiGe interface, and reduce a flat-band voltage Vfb of SiO2, thus obtaining the gate oxide with a better quality.
The embodiments of the present application are described below using specific examples, and those skilled in the art can easily understand other advantages and effects of the present application from the contents disclosed in the Description. The present application can also be implemented or applied using other different specific embodiments, and various details in the Description can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present application.
Please refer to
The present application provides a method for forming a SiGe channel. Referring to
Referring to
According to this embodiment of the present application, in step 2, the groove region is filled with the SiGe by means of epitaxial growth.
Referring to
Step 3. A second silicon oxide layer is formed on an upper surface of the SiGe film, wherein the second silicon oxide layer, the SiGe film, and the silicon layer under the SiGe film form a stack structure.
According to this embodiment of the present application, in step 3, the second silicon oxide layer is formed on the upper surface of the SiGe film by oxidizing the SiGe film.
Referring to
According to this embodiment of the present application, a method of forming the SiO2-SiGe channel in step 5 is as follows: Ge atoms in the SiGe film 06 diffuse into the silicon layer 03 under a thermal action, and form a SiGe channel 08 with Si in the silicon layer 03; Si in the SiGe film is oxidized to form a third silicon oxide layer; and the second silicon oxide layer, the third silicon oxide layer, and the SiGe channel 09 jointly form the SiO2-SiGe channel. The second silicon oxide layer and the third silicon oxide layer jointly form the silicon oxide layer 09 in
According to this embodiment of the present application, a flow of the ammonia in step 5 is 5-20 L. A temperature of the thermal treatment is 850-1100° C. A time for introducing the ammonia is 1-5 min.
According to this embodiment of the present application, a flow of the oxygen in step 5 is 30-250 ml. A time for introducing the oxygen is 30 s to 3 min. A pressure of the atmosphere of ammonia and oxygen is 3-20 torr.
To sum up, the advantage of the present application is a lower thermal budget, The SiGe channel is formed to reduce a relaxation risk of SiGe during a subsequent thermal treatment process. A small amount of oxygen is introduced at the same time when the ammonia propels Ge atoms, so as to effectively alleviate a damage on the surface of a gate oxide caused by the removal of a hard mask, effectively reduce defects of a Si/SiGe interface, and reduce a flat-band voltage Vfb of SiO2, thus obtaining the gate oxide with a better quality. Therefore, the present application effectively overcomes various defects in the prior art and thus has high industrial utilization value.
The above embodiment merely illustrates the principle and effect of the present application, rather than limiting the present application. Anyone skilled in the art can modify or change the above embodiment without departing from the spirit and scope of the present application. Therefore, all equivalent modifications or changes made by those with ordinary knowledge in the art without departing from the spirit and technical idea disclosed in the present application shall still be covered by the claims of the present application.
Number | Date | Country | Kind |
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202211022397.5 | Aug 2022 | CN | national |