Patent Application
20240112941
The present invention relates to a method for manufacturing an electronic component device and an electronic component device.
As a method for manufacturing a semiconductor package having a plurality of semiconductor chips, a method has been known in which semiconductor chips (dies) are disposed on a temporary adhesive layer that is provided on a carrier substrate, the semiconductor chips are sealed, and then the carrier substrate is peeled off (for example, Patent Literature 1).
It is expected that a composite electronic component device having an IC chip and a passive component can also be efficiently manufactured by a method of forming a sealing layer in a state where those component parts are temporarily fixed onto a temporary fixing material layer such as a temporary adhesive layer and then peeling off the temporary fixing material layer.
However, there is a problem of so-called die shift that the IC chip moves from a predetermined position during the step of forming a sealing layer. In addition, there is a tendency that the passive component is also likely to move from a predetermined position during the step of forming a sealing layer, in association with miniaturization.
In this regard, an aspect of the present invention provides a method of suppressing the movement of a passive component in association with the formation of a sealing layer in the manufacturing of an electronic component device having an IC chip, a passive component, and a sealing layer sealing these component parts. Another aspect of the present invention provides an electronic component device which has an IC chip, a passive component, and a sealing layer sealing these component parts and can be manufactured while suppressing the movement of the passive component in association with the formation of the sealing layer.
An aspect of the present invention provides a method for manufacturing an electronic component device. The method according to the aspect of the present invention includes, in the stated order:
When a top cut particle diameter of the filler is designated as D and a width of the gap between the main body part and the temporary fixing material layer is designated as G, D/G is 1.5 or less.
Another aspect of the present invention provides an electronic component device including:
The passive component has a main body part and a connection part provided on an outer surface of the main body part, and the redistribution layer has a wiring connected to the connection part. The passive component has a main body part and a connection part provided on an outer surface of the main body part, and the connection part is interposed between the main body part and the redistribution layer to form a gap between the main body part and the redistribution layer. The sealing layer is a cured product of a sealing material containing a curable resin and a filler. When a top cut particle diameter of a particle diameter of the filler is designated as D and a width of the gap between the main body part and the redistribution layer is designated as G, D/G is 1.5 or less.
According to an aspect of the present invention, it is possible to suppress the movement of a passive component in association with the formation of a sealing layer in the manufacturing of an electronic component device having an IC chip, a passive component, and a sealing layer sealing these component parts.
Hereinafter, some embodiments of the present invention will be specifically described. However, the present invention is not limited to the following embodiments.
The passive components 21 and 22 have main body parts 21a and 22a and connection parts 21b and 22b provided on outer surfaces of the main body parts 21a and 22a, and the connection parts 21b and 22b are interposed between the main body parts 21a and 22a and the temporary fixing material layer 42 to form gaps between the main body parts 21a and 22a and the temporary fixing material layer 42.
The carrier substrate 40 can be obtained by forming the temporary fixing material layer 42 on the support 41. The temporary fixing material layer 42 having a film shape may be stacked on the support 41 by thermal compression bonding. At this time, from the viewpoint of preventing bubbles from being enclosed, the temporary fixing material layer 42 having a film shape may be stacked under reduced pressure.
The material for the support 41 is not particularly limited as long as it has strength and stiffness at a level available to support the IC chip 10 and the passive components 21 and 22. For example, the support 41 may be a silicon wafer, a glass plate, or a stainless steel plate. The thickness of the support 41 is not particularly limited, and may be, for example, 200 to 2000 μm. An alignment mark for positioning an IC chip and a passive component may be provided on the surface of the support 41 on the side of the temporary fixing material layer 42. The alignment mark can be formed by using any materials such as a metal and a resin. The alignment mark may be engraved in the support 41 itself. In the case of providing an alignment mark, the temporary fixing material layer 42 may be transparent at a level available to visually recognize the alignment mark.
The temporary fixing material layer 42 has peelability at a level available to peel off the temporary fixing material layer 42 from the sealed structure 5. The thickness of the temporary fixing material layer 42 may be, for example, 1 to 400 μm. The material for forming the temporary fixing material layer 42 can be selected from materials used for temporary fixing or temporary bonding in the manufacturing of semiconductor devices (see, for example, Patent Literature 1). A commercially available protection tape for manufacturing a semiconductor may be used as the temporary fixing material layer.
The IC chip 10 is usually a face-down type chip having a plurality of connection parts (pads) formed on one main surface side. The maximum width of the IC chip may be, for example, 100 to 50000 μm. The number of IC chips constituting one electronic component device may be one or two or more.
In the present embodiment, two types of the passive components 21 and 22 are disposed at predetermined positions around the IC chip 10. However, the number and the type of passive components constituting one electronic component device are not particularly limited, and are selected according to the design of the electronic component device. A passive component constituting one electronic component device may be, for example, a resistor, a capacitor, or a combination of these. The passive components 21 and 22 can be mounted on the temporary fixing material layer 42 by using a general chip mounting machine. The maximum width of the passive component may be 6500 μm or less and may be 50 μm or more. The passive components 21 and 22 have the main body parts 21a and 22a and the connection parts 21b and 22b for electrically connecting the passive components 21 and 22 to the wiring. The form (shape, thickness, and the like) of the connection parts 21b and 22b is not particularly limited, but the thickness of the connection parts 21b and 22b may be, for example, 5 to 30 μm. The thickness of the connection part may be regarded as the width G of the gap formed between the main body part of the passive component and the temporary fixing material layer. The distance between the IC chip and each passive component is not particularly limited, and may be, for example, 0.02 to 50 mm.
The sealing layer 1 can be formed in a mold, for example, by compression molding or transfer molding using a curable sealing material. Molding conditions for forming a sealing layer can be adjusted in consideration of the viscosity, the reactivity, and the like of the sealing material. For example, the heating temperature for forming the sealing layer 1 may be 100° C. to 200° C.
The curable sealing material contains a curable resin and a filler. According to findings of the present inventors, the degree of the movement (drift) of the passive component from a predetermined position in association with the formation of the sealing layer is likely to be affected by a filler having a particularly large particle diameter among fillers in the sealing material.
In this regard, by focusing on the top cut particle diameter and setting the relation between the top cut particle diameter and the width G of the gap in a specific range, the movement of the passive component can be suppressed. Specifically, assuming that the top cut particle diameter of the filler is designated as D and the width of the gap between the main body part of the passive component and the temporary fixing material layer is designated as G, when D/G is 1.5 or less, the movement of the passive component from a predetermined position is effectively suppressed. From the viewpoint of suppressing the movement of the passive component, D/G may be 1.4 or less, 1.3 or less, 1.2 or less, 1.1 or less, 1.0 or less, or 0.9 or less. The lower limit of D/G is not particularly limited, and D/G may be, for example, 0.1 or more, 0.2 or more, or 0.3 or more.
The top cut particle diameter D of the filler is a particle diameter (D100) where the cumulative frequency in the particle size distribution of the filler becomes 100%, that is, the maximum particle diameter. The top cut particle diameter and the average particle diameter can be obtained from the volume-based particle size distribution as determined by a laser diffraction/scattering method.
The top cut particle diameter D of the filler may be 30 μm or less. In the case of using a typical chip-type passive component, even when the width G of the gap between the main body part of the passive component and the temporary fixing material layer is not necessarily considered, if the top cut particle diameter D is 30 μm or less, the movement of the passive component in association with the formation of the sealing layer can be suppressed. From the same viewpoint, the top cut particle diameter D of the filler may be 25 μm or less, 20 μm or less, or 15 μm or less, and may be 1 μm or more, 2 μm or more, or 3 μm or more. The average particle diameter of the filler may be 1 μm or more, and may be 20 μm or less, 15 μm or less, 10 μm or less, or 5 μm or less.
The degree of circularity of the filler may be, for example, 0.9 to 1. When the degree of circularity of the filler is within this range, effects that the degree of viscosity increase of the resin is small and the filler can be mixed in a large amount are obtainable. The degree of circularity of the filler is calculated from an area S and a boundary length L of a filler image as determined from an image of the cross-section of the sealing layer by formula: 4πS/L2. An average value of the degrees of circularity of arbitrary ten or more fillers in the sealing material or the sealing layer may be within the above range.
The filler may be, for example, particles containing silica, alumina, zirconia, silicate calcium, calcium carbonate, potassium titanate, silicon carbide, silicon nitride, aluminum nitride, boron nitride, beryllia, forsterite, steatite, spinel, mullite, titania, or a combination of these, and may be glass fibers. The filler may be fused silica or crystalline silica, and may be fused silica.
The width G of the gap between the main body part of the passive component and the temporary fixing material layer is the width of a gap in a thickness direction of the temporary fixing material layer, and can be checked, for example, by cross-sectional observation. In a case where the width G of the gap between the temporary fixing material layer and one passive component or two or more passive components constituting the electronic component device fluctuates, D/G as determined by the minimum value among the fluctuating widths may be within the numerical range described above. In general, the width G of the gap between the main body part of the passive component and the temporary fixing material layer is substantially the same as the width of a gap formed between the main body part of the passive component and the redistribution layer after the redistribution layer is formed. The width G of the gap may be 10 μm or less.
The curable resin constituting the sealing material may be, for example, an epoxy resin, and in this case, the sealing material may further contain a curing agent for an epoxy resin.
The epoxy resin is not particularly limited, and may be selected from those which are generally used in a sealing material for a semiconductor device. Specific examples of the epoxy resin include novolac type epoxy resins such as a phenol novolac type epoxy resin, an orthocresol novolac type epoxy resin, and an epoxy resin having a triphenylmethane skeleton; bisphenol type epoxy resins that are diglycidyl ethers such as bisphenol A, bisphenol F, bisphenol S, and alkyl substituted or unsubstituted biphenol; stilbene type epoxy resins; hydroquinone type epoxy resins; glycidyl ester type epoxy resins; glycidyl amine type epoxy resins; epoxidized products of co-condensation resins of dicyclopentadiene with phenols; epoxy resins having a naphthalene ring; epoxidized products of aralkyl type phenolic resins such as a phenol aralkyl resin and a naphthol aralkyl resin; trimethylol propane type epoxy resins; terpene-modified epoxy resins; linear aliphatic epoxy resins obtained by oxidizing an olefin bond with a peroxy acid such as peracetic acid; alicyclic epoxy resins; and sulfur atom-containing epoxy resins.
The curing agent for an epoxy resin is not particularly limited, and specific examples thereof include novolac type phenolic resins, phenol aralkyl resins, aralkyl type phenolic resins, cyclopentadiene type phenol novolac resins, and terpene-modified phenolic resins.
The content of the filler in the sealing material or the sealing layer formed therefrom may be 55 to 90% by volume, 60 to 90% by volume, or 70 to 85% by volume, with respect to the volume of the sealing material or the sealing layer. When the content of the filler is 55% by volume or more, there is a tendency that reflow resistance is improved, and when the content of the filler is 90% by volume or more, there is a tendency that fillability is improved.
The sealing material may further contain a silane coupling agent. Examples of the silane coupling agent include a silane compound or titanium compound having an amino group, an epoxy group, a mercapto group, an alkyl group, a ureido group, or a vinyl group, aluminum chelate, and an aluminum/zirconium-based compound.
By curing the sealing layer 1 formed of the sealing material, the sealed structure 5 having the IC chip 10, the passive components 21 and 22, and the cured sealing layer 1 is formed. The sealing layer 1 can be cured by heating in a mold for compression molding, heating in an oven or the like after mold releasing, or both of these. The heating temperature for curing may be 100° C. to 200° C. The heating time for curing may be 1 to 24 hours.
When the carrier substrate 40 is peeled off from the sealed structure 5 of
The redistribution layer 3 having the wiring 31 and the insulating layer 32 is formed on one main surface of the sealed structure 5 which is exposed by peeling off the carrier substrate 40. Thereby, an electronic component device 100 having the sealed structure 5 and the redistribution layer 3 is formed. The wirings 31 are electrically connected to the IC chip and the passive components via the connection parts. The insulating layer 32 is provided between the wirings 31. The wiring 31 includes a multi-layer portion extending in a direction parallel to a main surface of the redistribution layer 3 and a portion extending in a direction perpendicular to the main surface of the redistribution layer 3. The thickness of the wiring 31 at the portion extending in the direction parallel to the main surface of the redistribution layer 3 is not particularly limited, and may be, for example, 1 to 30 μm. The redistribution layer 3 can be formed by a general method which is known by those skilled in the art. The method for forming the redistribution layer can refer to, for example, Japanese Patent No. 5494766.
The IC chip and the passive component that constitute each of a plurality of electronic component devices may be disposed on the temporary fixing material layer of one sheet of the carrier substrate. In this case, the plurality of electronic component devices can be obtained by a step of dividing a laminate including the sealed structure 5 and the redistribution layer 3 into individual electronic component devices after the step of forming the redistribution layer.
Hereinafter, test examples in which a test device having an IC chip, a passive component, and a sealing layer sealing these component parts was produced and a relation between the movement of the passive component in association with the formation of the sealing layer and the particle diameter of the filler was verified will be illustrated.
Carrier Substrate
ICROS Tape (trade name, manufactured by Mitsui Chemicals Tohcello, Inc., thickness 100 μm) was prepared as the temporary fixing material layer. The ICROS Tape was attached to the entire surface of a silicon wafer having a diameter of 300 mm to obtain a carrier substrate.
Temporary Fixing of IC Chip and Passive Component
IC chips and passive components corresponding to 144 electronic component devices (packages) were disposed at a predetermined position on the temporary fixing material layer (ICROS Tape) of the carrier substrate by using a mounter and 2 N of load was applied to temporarily fix these component parts to the temporary fixing material layer. Each electronic component device is configured by one IC chip (size: 7.3 mm×7.3 mm×0.4 mm thick) and four passive components (resistor, size: 0.6 mm×0.3 mm×0.22 mm thick) disposed around the IC chip.
Formation of Sealing Layer
Three types of sealing materials for a semiconductor containing an epoxy resin and a filler (silica particles) were prepared. The top cut and average particle diameters of the filler contained in each of the sealing materials are shown in Table 1. A sealing layer sealing the IC chips and the passive components was formed on the temporary fixing material layer by compression molding using these sealing materials. The sealing layer was formed by compression molding at a temperature of 140° C. for a pressing time of 20 seconds and the sealing layer was heated for 480 seconds. The sealed structure thus formed was heated in an oven at 140° C. for 5 hours to further cure the sealing layer.
The viscosity of each sealing material after being heated at 140° C. for 20 seconds was calculated by a method utilizing the Castro-Macosko model. The shearing rate was set to 1 to 10 [1/s].
Peeling-Off of Carrier Substrate
The ICROS Tape was heated to 200° C. to be foamed, the support 41 was removed, and then the ICROS Tape was rapidly peeled off from the sealed structure, so that the carrier substrate was peeled off from the sealed structure.
Checking of Drift of Passive Component
The surface of the sealed structure thus obtained on which the passive components and the IC chips were exposed was observed, and the positions of the passive components were measured by a laser displacement meter. The ratio (drift ratio) of passive components having moved from the predetermined position among all the passive components was obtained. Results are shown in Table 1.
Formation of Redistribution Layer
An insulating layer was formed using a photosensitive insulating resin (AH-3000 (trade name), manufactured by Hitachi Chemical Co., Ltd.) and a photosensitive film (RY-5110) and a wiring was formed by Cu plating, thereby forming a redistribution layer on the surface of the sealed structure on which the passive components and the IC chips were exposed. The cross-section of the structure thus obtained was observed, the width of the gap between the main body part of the passive component and the redistribution layer was obtained from the cross-sectional photograph, and this width was regarded as the width G of the gap between the main body part of the passive component and the temporary fixing material layer.
| Filing Document | Filing Date | Country | Kind |
|---|---|---|---|
| PCT/JP2019/040991 | 10/17/2019 | WO |
