Claims
- 1. A monolithic, buried-substrate, ceramic multiple capacitor having and containing multiple buried-substrate capacitors that themselves have and contain multiple layers of both high dielectric constant material and metallization, the ceramic multiple capacitor comprising:
- a dual-dielectric-constant, three-layer-laminate, isolation layer between at least one of the multiple buried-substrate capacitors and at least one other of the multiple buried-substrate capacitors, the isolation layer serving to electrically isolate the least one of the multiple buried-substrate capacitors from the at least one other of the multiple buried-substrate capacitors, the isolation layer including
- an innermost layer of a low dielectric constant material, located between
- outer laminate layers of a high dielectric constant material, each outer laminate layer of high dielectric constant material bordering on a layer of high dielectric constant material within one of the buried-substrate capacitors that are electrically isolated.
- 2. The monolithic ceramic multiple capacitor according to claim 1 wherein each outer laminate layer of a high dielectric constant material is thicker than the layer of high dielectric constant material within one of the buried-substrate capacitors that it borders.
- 3. The monolithic ceramic multiple capacitor according to claim 2 wherein each outer laminate layer of a high dielectric constant material is at least twice as thick as the layer of high dielectric constant material within a one of the buried-substrate capacitors that it borders.
- 4. The monolithic ceramic multiple capacitor according to claim 1 wherein the high dielectric constant material of each outer laminate layer is the same material as the layer of high dielectric constant material within a one of the buried-substrate capacitors that it borders.
- 5. A monolithic, buried-substrate, ceramic multiple capacitor having and containing multiple buried-substrate capacitors that themselves have and contain multiple layers of both high dielectric constant material and metallization, the ceramic multiple capacitor comprising:
- a dual-dielectric-constant, three-layer-laminate, isolation layer between at least one of the multiple buried-substrate capacitors and at least one other of the multiple buried-substrate capacitors, the isolation layer serving to electrically isolate the least one of the multiple buried-substrate capacitors from the at least one other of the multiple buried-substrate capacitors, the isolation layer including
- an innermost layer of a low dielectric constant material, located between
- outer laminate layers of a high dielectric constant material, each outer laminate layer of high dielectric constant material bordering on a layer of high dielectric constant material within one of the buried-substrate capacitors that are electrically isolated;
- wherein each inner laminate layer of a low dielectric constant material is thicker than any of high dielectric constant material between plates of any of the buried-substrate capacitors that the isolation layer serves to electrically isolate.
- 6. The monolithic ceramic multiple capacitor according to claim 5 wherein each inner laminate layer of a low dielectric constant material is at least twice as thick as any of high dielectric constant material between plates of any of the buried-substrate capacitors that the isolation layer serves to electrically isolate.
- 7. A method of laying up a monolithic, buried-substrate, ceramic multiple capacitor in layers, the method comprising:
- laying up, as multiple layers of both high dielectric constant material and metallization, a buried-substrate capacitor having multiple layers of both high dielectric constant material and metallization;
- laying up onto the buried-substrate capacitor a dual-dielectric-constant, three-layer-laminate, isolation layer, the isolation layer including
- a first laid-up outer laminate layer of a high dielectric constant material,
- a second laid-up layer of a low dielectric constant material, and
- a third laid-up layer of a high dielectric constant material; and
- laying up on the isolation layer, as multiple layers of both high dielectric constant material and metallization, another buried-substrate capacitor having multiple layers of both high dielectric constant material and metallization.
- 8. A monolithic, buried-substrate, ceramic multiple capacitor laid-up in layers by
- laying up, as multiple layers of both high dielectric constant material and metallization, a buried-substrate capacitor having multiple layers of both high dielectric constant material and metallization,
- laying up onto the buried-substrate capacitor a dual-dielectric-constant, three-layer-laminate, isolation layer, the isolation layer including
- a first laid-up outer laminate layer of a high dielectric constant material,
- a second laid-up layer of a low dielectric constant material, and
- a third laid-up layer of a high dielectric constant material, and
- laying up on the isolation layer, as multiple layers of both high dielectric constant material and metallization, another buried-substrate capacitor having multiple layers of both high dielectric constant material and metallization, the monolithic, buried-substrate, ceramic multiple capacitor so laid-up being CHARACTERIZED IN THAT
- a dual-dielectric-constant, three-layer-laminate, isolation layer serves to isolate at least two adjacent buried-substrate capacitors.
RELATION TO THE RELATED PATENT APPLICATIONS
The present patent application is a continuation-in-part of U.S. patent application Ser. No. 08/342,595 filed on Nov. 21, 1994, now abandoned which application is a divisional of U.S. patent application Ser. No. 07/964,150 filed on Oct. 21, 1992 for a MONOLITHIC MULTIPLE CAPACITOR to inventors Alan D. Devoe and Daniel F. Devoe, a patent on which application issued on Nov. 24, 1994, as U.S. Pat. No. 5,367,430.
The present application is also related to U.S. patent application Ser. No. 08/528,856 filed on an even date herewith for CLOSE PHYSICAL MOUNTING OF LEADED AMPLIFIER/RECEIVERS TO THROUGH HOLES IN MONOLITHIC, BURIED-SUBSTRATE, MULTIPLE CAPACITORS SIMULTANEOUS WITH ELECTRICAL CONNECTION TO DUAL CAPACITORS OTHERWISE TRANSPIRING, PARTICULARLY FOR HEARING AID FILTERS, and also to U.S. patent application Ser. No. 08/528,885 filed on an even date herewith for PRINTING AND ADHERING PATTERNED METAL ON A LAID-UP MULTI-LAYER GREEN WAFER BEFORE FIRING SO AS TO LATER FORM PRECISE INTEGRAL CO-FIRED CONDUCTIVE TRACES AND PADS ON SELECTED TOP AND BOTTOM SURFACES OF MONOLITHIC, BURIED-SUBSTRATE, CERAMIC MULTIPLE CAPACITORS DICED FROM THE WAFER, INCLUDING PADS SUPPORTING SURFACE MOUNTING AND/OR MOUNTING IN TIERS, both of which related applications are to the same two inventors as is the present application.
The contents of the predecessor and two related patent applications are incorporated herein by reference.
US Referenced Citations (1)
Number |
Name |
Date |
Kind |
4882650 |
Maher et al. |
Nov 1989 |
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Divisions (1)
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Number |
Date |
Country |
Parent |
964150 |
Oct 1992 |
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Continuation in Parts (1)
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Number |
Date |
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Parent |
342595 |
Nov 1994 |
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