Patent Application
20190184480
This disclosure concerns precise alignment and decal bonding of a pattern of solder preforms to a surface. The terms ‘surface’ and ‘sample’, ‘receiving’ and ‘target’ will be used interchangeably in this invention.
With the increasing density and complexity of circuitry in modern microelectronics, there is a need to apply solder for attaching components in small precise amounts with tight spatial tolerances.
Solder preforms are precisely formed elements of solder available commercially in various sizes, shapes, thickness and compositions (with or without flux) that deliver a consistent volume of solder to a joint area.
Current methods to emplace these preforms are distinguished by low- or high-volume applications. Low-volume applications employ manual placement of solder preforms using a tweezer or suction tool. High-volume methods place prepackaged preforms (all of the same size and shape) onto tape-and-reel packages or trays used in an automated pick-and-place or surface mount technology (SMT) machine. Manual placement is slow and pick-and-place systems cannot handle very small and fragile components (limited to a few hundred microns thickness). The term ‘tape’ in this invention is generalized to mean structures that do or do not contain adhesive.
Although high-speed multiple-head pick-and-place machines exist, the increasing complexity and density of circuitry require ever decreasing solder preform size with wider variety, demands that go beyond the capabilities of current pick-and-place machines.
Ultimately, both prior art methods place the solder preforms in their final locations in a serial manner which limits their processing speeds.
An alternative method of placing a high volume of solder preforms is to use a fixture with a matching pattern to the pad/connector locations on a receiving surface. Another high volume placement method is to use an array of preforms all connected together with thin links of solder. These links are designed to melt and reflow completely back to the solder preform mass without leaving any solder residue that would cause electrical shorting. Although both these prior art methods can process solder preforms simultaneously, they cannot be easily implemented in a roll-to-roll environment used for manufacturing tapes.
Solder preforms are traditionally made by stamping solder wire or foils into the desired shape. One problem associated with stamping is the curvature of the surface of the preform caused by the forces acting on it during the stamping process. The curved surface may reduce the seal between the preform and the vacuum nozzle in an SMT machine resulting in less reliable pick-up and release of the preform. This curvature worsens as the thickness of the preform decreases.
Laser manufacturing of solder preforms has been used to minimize waste of material and decrease raised edges or burrs in the preform after stamping. However the solder preforms were cut individually and not aligned to any pre-defined pattern in a receiving surface.
Solder preforms can be placed over a receiving pattern of interest by loading the preforms in a matching pattern of openings in a locating plate and then releasing the preforms by mechanical, vibratory, air or sound pressure means. The preforms also rely on tacky media on the receiving surface such as solder paste to separate the preforms from the locating plate and to adhere to the receiving surface.
The existing techniques place patterns of solder preforms of a predefined regular shape and size on a receiving surface by first loading and securing the preforms mechanically on a recessed holder consisting of an array of openings (such as a stencil or channels), then aligning them over the receiving pattern and releasing the preforms by various actuating means. In these prior art techniques, the shape and size of each solder preform is usually fixed for the entire receiving pattern and not easily changed without redesigning and refabricating the recessed holder. In these prior art techniques, the preform shape is regular in that the preform can land on the receiving sample in any spatial orientation. This simplifies the loading of the preforms and operation of the release apparatus but requires the solder landing area of the receiving pattern to be symmetric and regular in shape in both two and three dimensions. Irregularly shaped and very thin (<0.25 mm) solder preforms that may be required for highly specialized applications may not be easily handled by current techniques. In addition, there is no mention of spatial tolerance or variation in the placement of the solder preforms from current techniques. Very thin (<0.2 mm thick) and low mass solder preforms are required for fine electronics circuitry (such as high-temperature superconducting (HTS) tapes or foils) and placing them on a receiving sample with high precision (<tens of microns tolerance) is a long-standing problem with the prior art techniques.
A new and an efficient method for depositing a pattern of such solder preforms onto a receiving surface is required.
This disclosure describes a method for placing a pattern of solder preforms simultaneously at multiple locations and bonding them onto a surface with microscopic precision.
This new process described herein is an efficient and scalable method for bonding electrical circuit patterns at specific locations between an upper and lower surface. The pattern of solder preforms is fabricated on a release tape and has indexed alignment holes at prescribed locations. This indexed tape design allows simple integration into a reel-to-reel system for commercial applications. This method is especially applicable to solder bonding the overlay of filaments from upper and lower high-temperature superconducting (HTS) tapes. This method can also be generalized to allow parallel solder bonding of microscopic features at precise locations between any two overlaid adjacent surfaces.
This disclosure teaches methods and products concerning precise alignment and decal bonding of a pattern of solder preforms to a surface.
This new process described herein is an efficient and scalable method for bonding electrical circuit patterns at specific locations between an upper and lower surface. The pattern of solder preforms is fabricated on a release tape and has indexed alignment holes at prescribed locations. This indexed tape design allows simple integration into a reel-to-reel system for commercial applications. This method is especially applicable to solder bonding the overlay of filaments from upper and lower high-temperature superconducting (HTS) tapes. This method can also be generalized to allow parallel solder bonding of microscopic features at precise locations between any two overlaid adjacent surfaces.
It is an object of the invention to provide a method for placing a pattern of solder preforms simultaneously at multiple locations and bonding them onto a surface with microscopic precision.
It is a further object of the invention that the pattern of solder preforms is prefabricated on a release tape.
It is a further object of the invention that the solder preform release tape has indexed registration holes that are aligned with those on a receiving surface.
It is a further object of the invention that this method is adaptable to a reel-to-reel manufacturing system.
It is a further object of the invention that this method can apply and bond patterns of solder preforms to electrically connect current-carrying filaments in an HTS tape structure.
The Decal Imprinting and Bonding of Solder (DIBS) process consists of three steps—the fabrication of the solder preforms (shape and spacing) on the release tape, the alignment and placement of the release tape over a target surface, and release of the individual solder preforms from the release tape onto the target surface and their subsequent bonding to the target surface. The solder preforms can be detached from the release tape and bonded to the target surface by mechanical, thermal or photonic means.
To fabricate the solder release tape, a strip of semiconductor dicing tape, such as ‘low-tack blue’, is used as the support structure for the solder preforms. Components attached to ‘low tack blue’ dicing tape can be removed mechanically. Other types of dicing tape can use heat (Nitto “Revalpha”) or UV light (DU-300) to lower its adhesion properties in order to release its attached components. A strip of dicing or release tape about the same size and shape as the target surface is secured to a stable surface (e.g. vacuum chuck). Next, a ribbon of solder of fixed thickness (e.g. Indium Bismuth eutectic) is pressed onto the release tape. A UV (λ=355 nm) laser is then focused onto the solder and perforates the perimeter of the desired solder preforms without damaging the underlying release tape. To ensure precise alignment of the release tape (and the solder preforms) to the target surface, the same laser is used to drill indexing holes into the release tape outside the solder bonding area. The laser drilling of the index holes and the laser perforation of the solder preforms must be done in the same setup without physically disturbing the release tape. Afterwards, the solder ribbon can be carefully peeled off the release tape, leaving behind the pattern of the desired solder preforms. Note that the size, shape and location of indexing holes of the release tape can be adapted for use in a reel-to-reel system, for example, regularly-spaced holes along both edges of the tape to match index pins on a reel.
This solder preform tape can now be guided over the corresponding indexing pins of an alignment jig, which holds the target surface, and the solder side placed over and pressed onto the target surface. Solder preforms such as InBi, can be mechanically released from the dicing tape and then pressure and/or thermally treated to bond to a compatible surface in a single step. The release tape can then be removed leaving behind a precisely spaced pattern of solder preforms on the target surface. Note that additional layers or tapes with the same pattern of indexing holes can now be precisely aligned and placed over this first layer of solder preforms.
The keys to ensuring high placement accuracy of the solder pattern onto a receiving surface are: 1) to fabricate indexing holes in both the release tape containing the solder preforms and the receiving surface(s) and 2) to fabricate the ‘complementary’ indexing pins on an alignment jig. The alignment jig is a device or structure that helps align and assemble all the separate components together on a 2-D planar or 3-D curved surface with high precision. With judicious choice of indexing holes and pins, individual components are aligned to less than 50 microns spatial tolerance. Other methods of indexing components such as mechanical means (e.g. notches, holes, guides) or optical means (e.g. laser, LED, lamp) can be used. As long as there is a ‘complementary’ structure on the alignment jig to match the indexed component, then high spatial accuracy can be maintained.
The following description and drawings set forth certain illustrative implementations of the disclosure in detail, which are indicative of several exemplary ways in which the various principles of the disclosure may be carried out. The illustrated examples, however, are not exhaustive of the many possible embodiments of the disclosure. Other objects, advantages and novel features of the disclosure will be set forth in the following detailed description when considered in conjunction with the drawings.
This disclosure teaches precise alignment and decal bonding of a pattern of solder preforms to a surface.
This invention fabricates arbitrarily-shaped solder elements in an arbitrary pattern onto a release tape layer and then places all of them with microscopic precision onto a surface at the same time.
This invention, which can be termed “Decal Imprinting and Bonding of Solder” (DIBS) consists of three steps—the fabrication of the solder preforms (shape and spacing) on the release (layer or) tape, the alignment and placement of the release tape over a target surface, and release of the individual solder preforms from the release tape onto the target surface and their subsequent bonding to the target surface.
The solder preforms can be detached from the release tape and bonded to the target surface by mechanical, thermal or photonic means.
To fabricate the solder release tape, a strip of semiconductor dicing tape, such as ‘low-tack blue’ is used as the support structure for the solder preforms. Components attached to low tack blue' dicing tape can be removed mechanically. Other types of dicing tape can use heat (Nitto “Revalpha”) or UV light (DU-300) to lower its adhesion properties in order to release its attached components.
A strip of dicing or release tape about the same size and shape as the target surface is secured to a stable surface, for example a vacuum chuck.
Next, a ribbon of solder of fixed thickness (e.g. Indium Bismuth eutectic) is pressed onto the release tape.
A UV (λ=355 nm) laser is then focused onto the solder and perforates the perimeter or outline of the desired solder preforms without damaging the underlying release tape.
To ensure precise alignment of the release tape (and the solder preforms) to the target surface, the same laser is used to drill indexing holes into the release tape outside the solder bonding area. The laser drilling of the index holes and the laser perforation of the solder preforms can be done in the same setup without physically disturbing the release tape.
Afterwards, the solder ribbon can be carefully peeled off the release tape, leaving behind the pattern of the desired solder preforms. Note that the size, shape and location of indexing holes of the release tape can be adapted for use in a reel-to-reel system (e.g. regularly-spaced holes along both edges of the tape to match index pins on a reel).
This solder preform tape can now be guided over the corresponding indexing pins of an alignment jig, which holds the receiving surface, and the solder side placed over and pressed onto receiving surface.
Solder preforms such as In2Bi, can be mechanically released from the dicing tape and pressure and thermally treated to bond to a compatible surface in a single step.
The release tape can then be removed leaving behind a precisely spaced pattern of solder preforms on the target surface. Note that additional layers or tapes with the same pattern of indexing holes can now be precisely aligned and placed over this first layer of solder preforms.
This invention enables multiple solder preforms of arbitrary size and shape to be fabricated at precise locations on a release tape. This prescribed pattern of solder preforms matches the location of the corresponding “bond pads” and makes the solder process highly parallel in nature.
Current solder technology allows only preforms that are all the same size and shape on a tape reel. They are then placed onto pad locations by a ‘pick-and-place’ machine in a serial manner.
The current invention overcomes these limitations by increasing flexibility in design and increasing the processing speed.
In addition, the thin dimensions of the release tape and the indexing feature of this invention are easily adaptable to a reel-to-reel or sheet-to-sheet environment.
The adhesion of the release tape can be thermally or UV light de-activated as stated earlier. Therefore heat or a UV light source (lamp or laser) could be used carefully to release the solder preforms from the release tape onto a receiving surface. Other solder material besides Indium Bismuth can be used and may require additional heat treatment to bond to the receiving surface before the release tape can be removed.
The materials used in this invention consist of a solder ribbon, for example In2Bi that is 2 mil thick, but can be any other consistent composition or thickness that will work with the DIBS process.
A semiconductor (release) tape with low tackiness or adhesion and leaves no or minimal residue is required for holding the solder ribbon or elements.
A receiving sample or surface of interest with pre-machined indexing or registration holes is required to receive the solder elements.
An alignment jig or fixture with indexing pins is required to align and receive the sample and release tape.
A laser micromachining system is also required to fabricate the solder preform tape and to fabricate the indexing holes. The system includes:
A. Fabrication of the release tape:
B) Application of solder preforms to sample:
Solder preforms are now bonded to the sample surface and ready for further processing if needed.
Solder preforms deliver a precise amount and shape of solder for attaching electronic circuitry. Current methods to emplace the preforms are distinguished by low- or high-volume applications. Low-volume applications employ manual placement of solder preforms using a tweezer or suction tool. High-volume methods place the preforms (all of the same size) onto tape-and-reel packages or trays, which can be removed and placed elsewhere by an automated pick-and-place system. Manual placement is slow and pick-and-place systems cannot handle very small and fragile components. Although high-speed multiple-head pick-and-place machines exist, the increasing complexity and density of circuitry require ever decreasing solder preform size with wider variety, demands that go beyond the capabilities of current pick-and-place machines. Ultimately, both methods place the solder preforms in their final locations in a serial manner which limits their processing speeds.
This invention teaches a method to place a consistent volume and shape of solder in multiple precise locations simultaneously on a surface.
This invention provides a method for placing a pattern of solder preforms (or elements) of well-defined shape and size simultaneously at multiple locations on a surface and bonding them to a surface with high spatial resolution and accuracy.
It is an efficient and scalable method of solder bonding 2-D and 3-D features of an electronic circuit, especially on flexible samples.
The pattern of solder preforms is fabricated with a high-speed scanning laser beam on a release (layer or) tape and has indexed alignment holes at user-defined locations. This indexed tape design allows for placing solder preforms onto and simple integration into a reel-to-reel or sheet-to-sheet system.
This method is especially applicable to solder bonding the sets of filaments originating from separate high-temperature superconducting (HTS) tape or ribbon structures. This method can also be generalized to allow solder bonding of microscopic features at precise locations between any two adjacent surfaces in intimate contact.
This invention enables multiple solder preforms of arbitrary size and shape to be fabricated at precise locations on a release tape. This prescribed pattern of solder preforms matches the location of the corresponding “bond pads” and makes the solder process highly parallel in nature. Current solder technology allows only preforms that are all the same size and shape on a tape reel. They are then placed onto pad locations by a ‘pick-and-place’ machine in a serial manner.
The current invention overcomes these limitations by increasing flexibility in design and increasing the processing speed.
In addition, the thin dimensions of the release tape and the indexing feature of this invention easily lends itself to a reel-to-reel environment and future commercial potential.
The adhesion of the release tape can be thermally or UV light de-activated. Therefore heat or a UV source, for example a lamp or a laser, can be used carefully to release the solder preforms onto a receiving surface. Other solder material besides InBi can be used and may require additional heat treatment to bond to the receiving surface before the release tape can be removed.
The above examples are merely illustrative of several possible embodiments of various aspects of the present disclosure, wherein equivalent alterations and/or modifications will occur to others skilled in the art upon reading and understanding this specification and the annexed drawings. In addition, although a particular feature of the disclosure may have been illustrated and/or described with respect to only one of several implementations, such feature may be combined with one or more other features of the other implementations as may be desired and advantageous for any given or particular application. Also, to the extent that the terms “including”, “includes”, “having”, “has”, “with”, or variants thereof are used in the detailed description and/or in the claims, such terms are intended to be inclusive in a manner similar to the term “comprising”.
This application is a non-provisional of, and claims priority to and the benefits of, U.S. Provisional Patent Application No. 62/598,541 filed on Dec. 14, 2017 and U.S. Provisional Patent Application No. 62/598,539 filed on Dec. 14, 2017 and U.S. Provisional Patent Application No. 62/728,650 filed on Sep. 07, 2018, the entireties of each are hereby incorporated by reference.
| Number | Date | Country | |
|---|---|---|---|
| 62598541 | Dec 2017 | US | |
| 62598539 | Dec 2017 | US | |
| 62728650 | Sep 2018 | US |
