Claims
- 1. A method for designing a routing element for use in a semiconductor device assembly, comprising:
configuring a polymeric film to be disposed between at least two areas of at least one of a substrate and a semiconductor device; and configuring at least one conductive trace to be carried by said polymeric film and to extend substantially between locations of said polymeric film adjacent to said at least two areas upon said disposition of said polymeric film.
- 2. The method of claim 1, wherein said configuring said polymeric film comprises configuring said polymeric film to electrically insulate at least portions of said at least one conductive trace from conductive structures on said at least one of said substrate and said semiconductor device.
- 3. The method of claim 1, wherein said configuring said at least one conductive trace comprises configuring said at least one conductive trace to be at least partially carried internally within said polymeric film.
- 4. The method of claim 1, wherein said configuring said at least one conductive trace comprises configuring said at least one conductive trace to extend substantially between a first contact area and a second contact area.
- 5. The method of claim 1, wherein said configuring said at least one conductive trace comprises configuring a plurality of conductive traces.
- 6. The method of claim 5, wherein said configuring said plurality of conductive traces comprises configuring positions of each of said plurality of conductive traces so as to minimize electrical interference between conductive traces of said plurality.
- 7. The method of claim 1, wherein said configuring said at least one conductive trace comprises configuring a position of said at least one conductive trace to extend substantially directly between said at least two areas.
- 8. The method of claim 1, wherein said configuring said polymeric film comprises configuring said polymeric film to include:
a first end positionable adjacent to a first area of said at least two areas on a first surface of said at least one of said substrate and said semiconductor device; and a second end positionable adjacent to a second area of said at least two areas on a second surface of said at least one of said substrate and said semiconductor device.
- 9. A method for establishing electrical connections in a semiconductor device, comprising:
providing a substrate including at least one first contact area and at least one remote, unconnected, corresponding second contact area; positioning at least one routing element carrying at least one conductive trace between said at least one first contact area and said at least one second contact area with ends of said at least one conductive trace extending proximate said at least one first contact area and said at least one second contact area; and electrically connecting said at least one conductive trace between said at least one first contact area and said at least one second contact area.
- 10. The method of claim 9, wherein said providing comprises providing said substrate with at least one semiconductor device thereon, said at least one semiconductor device comprising at least one of said at least one first contact area and said at least one second contact area.
- 11. The method of claim 10, wherein said positioning comprises positioning said at least one routing element at least partially over said at least one semiconductor device.
- 12. The method of claim 10, wherein said positioning comprises positioning said at least one routing element laterally adjacent to said at least one semiconductor device.
- 13. The method of claim 9, wherein said positioning comprises positioning said at least one routing element adjacent to conductive traces carried by said substrate with said at least one conductive trace of said at least one routing element electrically isolated from said conductive traces carried by said substrate.
- 14. The method of claim 9, wherein said electrically connecting comprises disposing a discrete conductive element between said at least one conductive trace and each of said at least one first contact area and said at least one second contact area.
- 15. The method of claim 9, wherein said positioning comprises extending a portion of said at least one routing element through a plane of said substrate to locate a first end of said at least one conductive trace proximate said at least one first contact area and a second end of said at least one conductive trace proximate said at least one second contact area, located on an opposite side of said substrate from said at least one first contact area.
- 16. A method for designing a carrier, comprising:
configuring a substrate; configuring at least one region on said substrate to receive a semiconductor device; configuring a first plurality of conductive traces to be carried by said substrate; and configuring at least one routing element to carry a second plurality of conductive traces, said at least one routing element to be assembled with said substrate.
- 17. The method of claim 16, further comprising configuring terminal pads on at least one surface of said substrate.
- 18. The method of claim 17, wherein said configuring terminals pads comprises configuring a first plurality of terminal pads to electrically communicate with said first plurality of conductive traces.
- 19. The method of claim 18, wherein said configuring terminal pads further comprises configuring a second plurality of terminal pads to electrically communicate with said second plurality of conductive traces upon assembly of said at least one routing element with said substrate.
- 20. The method of claim 16, wherein said configuring said first plurality of conductive traces comprises configuring said first plurality of conductive traces to extend along at most four conductive layers of said substrate.
- 21. The method of claim 16, wherein said configuring said at least one routing element comprises configuring said second plurality of conductive traces to extend to a location proximate said at least one region upon assembly of said at least one routing element with said substrate.
- 22. The method of claim 15, further comprising configuring an aperture through said substrate.
- 23. The method of claim 22, wherein said configuring said at least one routing element comprises configuring said at least one routing element to include at least a portion carrying at least one conductive trace of said second plurality of conductive traces for extending through said aperture.
CROSS-REFERENCE TO RELATED APPLICATION
[0001] This application is a divisional of application Ser. No. 09/942,183, filed Aug. 29, 2001, pending.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09942183 |
Aug 2001 |
US |
Child |
10299504 |
Nov 2002 |
US |