The present disclosure relates to the processing of substrates, such as for example, semiconductor substrates. In particular, it provides a novel method to pattern substrates utilizing triple patterning techniques.
As geometries in substrate processing continue to shrink, the technical challenges to forming structures on substrates via photolithography techniques increase. As requirements for sub 80 nm pitch structures arose, one technique for achieving suitable photolithography for such pitches involves multiple patterning techniques to provide for pitch splitting. Such multiple patterning techniques have included self-aligned double patterning, self-aligned triple patterning and self-aligned quadruple patterning. These multiple patterning techniques may involve the utilization of sidewall spacers for defining structures at pitches that are less than the original photolithography pitch. Such techniques have allowed the extension of standard photolithography techniques without resort to extreme ultraviolet lithography.
For example, in self-aligned double patterning, sidewall spacers are utilized to double the structure density on the substrate surface. A mandrel structure may be formed on the substrate through known photolithography techniques. Sidewall spacers may then be formed adjacent the mandrel. Removal of the originally patterned mandrel leaves the two sidewall spacers, thus forming two structures for each mandrel. Similarly, self-aligned triple and quadruple patterning techniques are known. These techniques all require the use of one or more sacrificial layers and multiple etch steps, leading to increased costs and process complexities.
It would be desirable to provide a multiple patterning process integration technique that reduces the number of sacrificial layers utilized and can be implemented in a less complex process.
Described herein is an innovative method to implement self-aligned triple patterning techniques for the processing of substrates. In one embodiment, a self-aligned triple processing technique utilizing an organic spacer is provided. The organic spacer may be formed utilizing any of a wide range of techniques including, but not limited to, plasma deposition and spin on deposition. In one embodiment, the organic spacer may be formed via a cyclic deposition etch process. In one embodiment, the organic spacer may be placed between a mandrel and a second spacer. The organic spacer may be removed to allow the use of the mandrel and the second spacer for subsequent masking purposes.
In one embodiment, a method for processing a substrate is provided. The method may comprise providing a substrate with a plurality of first patterned structures and an underlying layer, the plurality of patterned structures having at least a first pitch. The method may further comprise forming an organic layer over the first patterned structures. The method may further comprise forming a plurality of organic spacers from said organic layer by performing a first spacer etch process, forming a second spacer layer over the organic spacers and forming a plurality of second spacers from said second spacer layer by performing a second spacer etch process. The method further comprises performing an organic spacer etch removal process, wherein after performing the organic spacer etch removal process, the plurality of first patterned structures and the plurality of second spacers together form a masking layer for generating a second pattern on the substrate. The second pattern may have a second pitch, the second pitch being less than the first pitch.
In another embodiment, a method for processing a substrate is provided. The method may comprise providing a substrate with a plurality of first patterned structures, forming a plurality of organic spacers adjacent to the plurality of first patterned structures, and forming a plurality of second spacers adjacent to the plurality of organic spacers. The method further includes removing the plurality of organic spacers after forming the plurality of second spacers, wherein after removing the plurality of organic spacers, the plurality of first patterned structures and the plurality of second spacers together form a masking layer which has masking layer structures having a pitch that is 26 nm or less.
In another embodiment, a method for performing a self-aligned triple patterning pitch splitting masking process is provided. The method may comprise providing a plurality of mandrels on a substrate, forming a plurality of organic spacers on the substrate, and forming a plurality of second spacers on the substrate, at least one organic spacer being located between at least one of the mandrels and at least one of the second spacers. The method further comprises performing an organic spacer etch removal process, the plurality of mandrels and the plurality of second spacers remaining on the substrate after the organic spacer etch removal process. The method further comprises after the organic spacer etch removal process, utilizing the plurality of mandrels and the plurality of second spacers as a self-aligned triple patterning pitch splitting mask for masking at least one layer of the substrate during at least one subsequent etch step.
A more complete understanding of the present inventions and advantages thereof may be acquired by referring to the following description taken in conjunction with the accompanying drawings, in which like reference numbers indicate like features. It is to be noted, however, that the accompanying drawings illustrate only exemplary embodiments of the disclosed concepts and are therefore not to be considered limiting of the scope, for the disclosed concepts may admit to other equally effective embodiments.
One embodiment of a process integration flow utilizing an organic spacer in a self-aligned triple patterning process is described with relation to
The techniques for forming a mandrel 108 in a multiple patterning process are well known in the art. As known, mandrel 108 may be patterned by any of a number of photolithography or other patterning techniques. In one embodiment, mandrel 108 may be formed through a process which utilizes photolithography techniques to pattern a resist layer over a mandrel layer. Any of a variety of photolithography techniques may be utilized. In one embodiment, the pitch of the patterned resist layer may be 80 nm or less. One or more intervening layers may be used as part of the photolithography process between the mandrel layer and the resist layer, include spin on glass (SOG) layers, spin on carbon (SOC) layers, antireflective coatings, etc., all as is known in the art.
After the patterning of the mandrel layer, the mandrels 108 remain as shown in
After the formation of mandrels 108, an organic spacer layer 110 may be provided over the mandrels 108 as shown in
In one embodiment, the process steps of
After formation of the organic spacers 112, a second spacer layer 114 may be formed as shown in
After formation of the second spacers 116, as shown in
The pattern formed by the mandrels 108 and the second spacers 116 may then be transferred to the hard mask layer 106 by subjecting the substrate 102 to an etch which etches the hard mask layer 106 selectively to the mandrels 108 and second spacers 116. The mandrels 108 and second spacers 116 may then be removed via an etch or strip step to leave patterned hard mask structures 120 as shown in
As described herein, use of a soft organic spacer is provided in a self-aligned tripling patterning process. The process advantageously provides pitch splitting geometries at 26 nm or less while requiring less sacrificial layers typically required in a self-aligned quadruple patterning scheme. Using the disclosed techniques provides complexity, number of steps, throughput, and/or costs benefits as compared to standard self-aligned quadruple patterning process flows or extreme ultraviolet lithography techniques. The use of an organic spacer material provides a process in which, at the fine geometries desired, sufficient conformity of the spacer deposition may be obtained for a material in which etch selectivity may be obtained between first spacer and both the mandrel and second spacer. In this manner, an organic spacer allows for the use of a self-aligned triple patterning process to be efficiently utilized for structure pitches of 26 nm or less.
As mentioned above, plasma deposition, atomic layer deposition and spin on methods may be utilized to form the organic layer 110. It will be recognized that other techniques may also be utilized. Though exemplary organic materials have been identified herein, it will be recognized that other organic materials may also be utilized. In one embodiment, the organic material may be a plasma deposited unsaturated hydrocarbon. In one embodiment, the organic material may be a plasma deposited pyrrole. In another embodiment, the organic material may be a carbon containing spin on deposited self-assembled monolayer. In one embodiment, organic layer 110 may have thicknesses in the range of 5 nm to 20 nm and more preferably 14 nm to 16 nm. Sidewall conformity of the organic layer 110 may be in the range of 90% to 100% and more preferably 100%. In one embodiment, the second spacer layer 114 may have thicknesses in the range of 5 nm to 20 nm and more preferably 14 nm to 16 nm. Sidewall conformity of the second spacer layer 114 may be in the range of 90% to 100% and more preferably 100%.
Exemplary process flows for utilizing the techniques described herein are provided in
It will be recognized that many of the layers, and the materials that comprise the layers, that are described herein are merely exemplary. For example, the hard mask layer may be formed from aluminum oxide, titanium oxide, aluminum nitride, etc. Further, as an example, the etch stop layer may be formed from silicon nitride, silicon, silicon oxynitride, etc. However, other materials may be utilized and the concepts described herein may be implemented without even using such layers. It will be also recognized that the substrate 102 may be comprised of one or many layers. For example, the substrate 102 may be a semiconductor wafer that has many process layers formed on or in the semiconductor wafer. Thus, for example, the substrate 102 may be a semiconductor wafer at any process step in a semiconductor processing flow. For example, the substrate 102 may comprise a semiconductor wafer and all of its accompanying layers formed up to any particular process step. Further, it will be recognized that the various process layers and structures shown may be utilized with additional intervening process layers and coatings as would be understood by those in the art. Thus, for example, more or less materials may be utilized between the mandrels 108 and the substrate 102, additional layers or coatings may be utilized between the mandrels 108 and the organic layer 110, additional layers or coatings may be utilized between the organic spacers 112 and the second spacer layer 114, etc. Thus, it will be recognized that the use of a self-aligned triple patterning process in which an organic spacer is provided may be accomplished within a wide variety of process flows, all of which may advantageously benefit from the characteristics an organic spacer provides.
Further modifications and alternative embodiments of the inventions will be apparent to those skilled in the art in view of this description. Accordingly, this description is to be construed as illustrative only and is for the purpose of teaching those skilled in the art the manner of carrying out the inventions. It is to be understood that the forms and method of the inventions herein shown and described are to be taken as presently preferred embodiments. Equivalent techniques may be substituted for those illustrated and describe herein and certain features of the inventions may be utilized independently of the use of other features, all as would be apparent to one skilled in the art after having the benefit of this description of the inventions.
This application claims priority to the following co-pending provisional applications: U.S. Provisional Patent Application Ser. No. 62/500,588, filed May 3, 2017, and entitled “LOW COST SELF-ALIGNED TRIPLE PATTERNING SCHEME UTILIZING ORGANIC SPACER MATERIALS” and U.S. Provisional Patent Application Ser. No. 62/527,733, filed Jun. 30, 2017, and entitled “LOW COST SELF-ALIGNED TRIPLE PATTERNING SCHEME UTILIZING ORGANIC SPACER MATERIALS” and U.S. Provisional Patent Application Ser. No. 62/568,046, filed Oct. 4, 2017, and entitled “SELF-ALIGNED TRIPLE PATTERNING PROCESS UTILIZING ORGANIC SPACERS” which are hereby incorporated by reference in their entirety.
Number | Date | Country | |
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62500588 | May 2017 | US | |
62527733 | Jun 2017 | US | |
62568046 | Oct 2017 | US |