This application is based upon and claims the benefit of priority from Japanese Patent Application No. 2005-160661, filed May 31, 2005, the entire contents of which are incorporated herein by reference.
1. Field
One embodiment of the invention relates to a semiconductor device in a BGA package, an electronic part in which the semiconductor device is mounted, and a method for mounting the semiconductor device.
2. Description of the Related Art
An increasing number of semiconductor device products use ball grid arrays (BGAs) for packaging. A BGA package has ball-like projecting electrodes two-dimensionally arranged on a back surface of the device. Each of the electrodes is electrically connected to the semiconductor chip.
If a semiconductor device in a BGA package is mounted on a printed circuit board, mechanical stress is likely to act on projections located in the corners of the device. If the stress results in microcracks in any projecting electrodes, the semiconductor device is electrically disconnected from the printed circuit board.
A technique has been disclosed which suppresses generation of microcracks in the projecting electrodes located close to the corners (Jpn. Pat. Appln. KOKAI Publication No. 9-162241). This document states that reinforcing projections (solder) not electrically connected to the semiconductor chip are provided in the corners to reduce the stress on the electrodes located adjacent to the corners.
The above configuration reduces the stress on the projecting electrodes to suppress generation of microcracks. However, the reinforcing projections increase the external size of the semiconductor device. For mobile apparatuses such as personal computers, efforts have been made to reduce the area of the printed circuit board so as to improve portability. However, the increase in the external size of the semiconductor device makes it difficult to reduce the area of the printed circuit board.
A general architecture that implements the various feature of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention.
Various embodiments according to the invention will be described hereinafter with reference to the accompanying drawings. In general, according to one embodiment of the invention, a semiconductor device comprises, an interposer board having a rectangular shape, a semiconductor chip provided on a front surface of the interposer board; projecting electrodes provided in a first area on a back surface of the interpose board and electrically connected to the semiconductor chip; and auxiliary pins provided in corners of the back surface of the interposer board which corners are located outside the first area, the auxiliary pins having a melting point of at least 250° C.
As shown in
The auxiliary pins 14 are provided in the four corners of the back surface of the interposer board 11, which are located outside the first area of the interposer board. The auxiliary pins 14 are composed of a material having a melting point higher than a reflow heating temperature so as not to melt during reflow. The auxiliary pins 14 are thus made of a metal material of a high melting point (at least 250° C.). The auxiliary pins 14 are made of, for example, a base material of a copper-based metal which is plated with Ni or Ni/Au, or a Sn-plated SUS-based base material. Alternatively, a high-melting-point solder may be used for the auxiliary pins 14. The auxiliary pins 14 have a height Hi smaller than that H2 of the solder balls 13.
A printed circuit board 20 is provided with a multilayer wiring board 21 containing interlayer wiring, and a plurality of pads 22 provided on the multilayer wiring board 21 and corresponding to positions where the corresponding solder balls 13 are arranged. Front wiring is provided on a front surface of the multilayer wiring board 21. A coat layer 23 is provided in those areas on the multilayer wiring board 21 which do not contain the pads 22 or front wiring.
The semiconductor device 10 is mounted on the printed circuit board 20. The solder balls 13 on the semiconductor device 10 are connected to the corresponding pads 22 on the printed circuit board 20. The auxiliary pins 14 are fixed to the printed circuit board 20 using a bonding member 24.
Since the bonding member 24 is used to fix the auxiliary pins 14 provided in the corners of the BGA package to the printed circuit board 20, the corners of the semiconductor device 10 are reinforced to reduce the stress on the corners. The solder balls 13 located close to the corners are thus unlikely to undergo microcracking. This improves the reliability of the semiconductor device concerning mechanical stresses.
The auxiliary pins 14 are used to reinforce the corners. The small diameter of the auxiliary pins 14 prevents the external size of the semiconductor device from being significantly increased. This enables the suppression of an increase in the area of the printed circuit board 20.
Now, a mounting method will be described with reference to
As shown in
As shown in
As shown in
Reflow heating is then carried out to form an alloy layer of the solder balls 13, solder paste 25, and pads 22 as shown in
The auxiliary pins 14 are composed of a material with a melting point of at least 250° C. The temperature for the reflow heating is lower than 250° C. Consequently, the auxiliary pins 14 do not melt during reflow heating. Therefore, even after the reflow heating, the auxiliary pins 14 and the bonding member 24 reduce the stress on the corners of the semiconductor device 10.
In the first embodiment, the thermosetting bonding member is used to fix the semiconductor device 10 to the printed circuit board 20. In the present embodiment, description will be given of a method of using solder to fixing the semiconductor device 10 to the printed circuit board.
As shown in
Since the solder 38 is used to fix the auxiliary pins 14 provided in the corners of the BGA package to the printed circuit board 30, the corners of the semiconductor device 10 are reinforced to reduce the stress on the corners. The solder balls 13 located close to the corners are thus unlikely to undergo microcracking. This improves the reliability of the semiconductor device concerning mechanical stresses.
Now, with reference to
As shown in
As shown in
Reflow heating is then carried out to form an alloy layer of the solder balls 13, solder paste 25, and pads 22 as shown in
The auxiliary pins 14 are composed of a material with a melting point of at least 250° C. The temperature for the reflow heating is lower than 250° C. Consequently, the auxiliary pins 14 do not melt during reflow heating. Therefore, even after the reflow heating, the auxiliary pins 14 and the solder 38 reduce the stress on the corners of the semiconductor device 10.
As shown in
Each auxiliary pin 44 is inserted into the corresponding through-hole 51. Solder 53 is provided in the gap between the auxiliary pin 44 and the dummy through-via 52. An alloy layer is formed at the interface between the auxiliary pin 44 and the solder 53 and at the interface between the dummy through-via 52 and the solder 53.
Since the solder 53 is used to fix the auxiliary pins 44 provided in the corners of the BGA package to the corresponding dummy through-vias 52 formed in the printed circuit board 30, the corners of the semiconductor device 40 are reinforced to reduce the stress on the corners. The solder balls 13 located close to the corners are thus unlikely to undergo microcracking. This improves the reliability of the semiconductor device concerning mechanical stresses.
Now, with reference to
As shown in
As shown in
Reflow heating is then carried out to form an alloy layer of the solder balls 13, solder paste 25, and-pads 22 as shown in
The auxiliary pins 44 are composed of a material with a melting point of at least 250° C. The temperature for the reflow heating is lower than 250° C. Consequently, the auxiliary pins 44 do not melt during reflow heating. Therefore, even after the reflow heating, the auxiliary pins 44 and the solder 53 reduce the stress on the corners of the semiconductor device 40.
While certain embodiments of the inventions have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the inventions. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms; furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the spirit of the inventions. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and spirit of the inventions.
Number | Date | Country | Kind |
---|---|---|---|
2005-160661 | May 2005 | JP | national |