Claims
- 1. A semiconductor device comprising:
- a substrate;
- a first electrode disposed on and insulated from the substrate, the first electrode being comprised of a polycide which comprises a polycrystalline silicon and a metal silicide;
- an insulating film formed on the first electrode, the insulating film being comprised of a single chemical-vapor-deposited oxide film and having a thickness less than 1000 .ANG.; and
- a second electrode disposed on the insulating film.
- 2. A semiconductor device as claimed in claim 1; wherein the semiconductor device comprises a semiconductor capacitive device; and the first and second electrodes comprise capacitor electrodes of the semiconductor capacitive device.
- 3. A non-volatile semiconductor memory device comprising:
- a substrate;
- a floating electrode disposed on and insulated from the substrate, the floating electrode being comprised of a polycide which comprises a polycrystalline silicon and a metal silicide;
- an insulating film formed on the floating electrode, the insulating film being comprised of a single chemical-vapor-deposited silicon dioxide film and having a thickness in the range of 100 to 500 .ANG., and
- a control electrode disposed on the insulating film.
- 4. A semiconductor device as claimed in claim 1; wherein the insulating film is formed by chemical reaction of dichlorosilane (SiH.sub.2 Cl.sub.2) and dinitrogen monoxide (N.sub.2 O) at a temperature in the range of 700.degree. C. to 950.degree. C.
- 5. A semiconductor device as claimed in claim 4; wherein the insulating film is formed at a growth rate of 6.2 .ANG./min.
- 6. A semiconductor device as claimed in claim 1; wherein the insulating film has a thickness less than 100 .ANG..
- 7. A semiconductor device comprising:
- a substrate;
- a polycide layer disposed on and insulated from the substrate, the polycide layer being comprised of a polycrystalline silicon and a metal silicide; and
- an insulating film formed on a surface portion of the polycide layer, the insulating film being comprised of a single layer of a chemical-vapor-deposited oxide and having a thickness less than 1000 .ANG..
- 8. A semiconductor device according to claim 7; wherein the single film layer of oxide is composed of silicon dioxide.
- 9. A semiconductor device according to claim 7; including an electrode layer disposed on the insulating film.
- 10. A semiconductor device according to claim 9; wherein the semiconductor device comprises a non-volatile semi-conductor memory device, the polycide layer defines a floating electrode of the memory device, and the electrode layer defines a control electrode of the memory device.
- 11. A semiconductor device according to claim 9; wherein the semiconductor device comprises a semiconductor capacitive device, and the polycide and electrode layers define electrodes of the capacitive device.
- 12. A semiconductor device according to claim 7; wherein the insulating film has a thickness less than 100 .ANG..
- 13. A semiconductor device according to claim 7; wherein the insulating film has a thickness in the range of 100 to 500 .ANG..
Parent Case Info
This is a continuation of application Ser. No. 071,987, filed July 10, 1987, abandoned.
US Referenced Citations (4)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0002997 |
Jul 1979 |
EPX |
0118878 |
Sep 1984 |
EPX |
Non-Patent Literature Citations (2)
Entry |
8172 IEEE International Solid-State Circuits Conference, vol. 24 (1981), Feb., New York, U.S.A., pp. 152-153, "Memory Techniques", H. H. Chao et al. |
Solid State Technology, Apr. 1977, "Low Pressure CVD Production Processes for Poly, Nitride, and Oxide", pp. 63-70, R. S. Rosler. |
Continuations (1)
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Number |
Date |
Country |
Parent |
71987 |
Jul 1987 |
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