Claims
- 1. A plastic molded semiconductor device comprising:
- a mass of a plastic material;
- a pair of semiconductor chips disposed in said mass of plastic material and in spaced relationship with each other so that circuit-formed surfaces of said semiconductor chips are directed towards each other;
- at least one set of leads comprising first and second leads;
- each of said first and second leads having an inner section disposed in said mass of plastic material between said semiconductor chips and an outer section integral with and extending from said inner section also disposed in said mass of plastic material and extending from an area of an associated semiconductor chip toward an outer surface of said mass of plastic material;
- a length of metal wire disposed in said mass of plastic material for electrically connecting each of said first and second leads to an associated semiconductor chip;
- the outer section of said first lead extending in overlapping and face-to-face contacting relationship with the outer section of said second lead and having an outer end extremity welded to the outer section of said second lead; and
- the outer section of said second lead having an outer extension extending outwardly from said mass of plastic material.
- 2. A plastic molded semiconductor device according to claim 1, wherein the inner sections of said first and second leads are spaced away from each other and towards associated semiconductor chips and a layer of an insulating material is disposed between the inner section of each of said first and second leads and an associated semiconductor chip.
- 3. A plastic molded semiconductor device according to claim 2, wherein said length of metal wire extends between and is connected to the inner section of each lead and the associated semiconductor chip.
- 4. A plastic molded semiconductor device according to claim 2, wherein each of said semiconductor chips has a plurality of electrodes arranged in a row on the circuit-formed surface of the semiconductor chip and wherein a plurality of sets of leads are arranged in two substantially parallel and spaced rows and two pairs of common leads disposed between said semiconductor chips and extending substantially parallel to the rows of the sets of leads, and each pair of said common leads comprising two common leads each extending in substantially parallel relationship with and electrically connected to the row of the electrodes of the associated semiconductor chip.
Priority Claims (1)
Number |
Date |
Country |
Kind |
4-006522 |
Jan 1992 |
JPX |
|
Parent Case Info
This application is a Continuation application of application Ser. No. 005,036, filed Jan. 15, 1993, now abandoned.
US Referenced Citations (5)
Foreign Referenced Citations (3)
Number |
Date |
Country |
209119 |
Dec 1983 |
JPX |
102549 |
May 1987 |
JPX |
045967 |
Feb 1990 |
JPX |
Continuations (1)
|
Number |
Date |
Country |
Parent |
5036 |
Jan 1993 |
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