The second substrate 24 has a first surface 241 and a second surface 242. The second surface 242 of the second substrate 24 is directly adhered to the first molding compound 23 by the use of an adhesive layer 271. The first surface 241 of the second substrate 24 has a plurality of first pads 243 and a plurality of second pads 244 disposed thereon, and the first pads 243 are disposed on the periphery of a corresponding position of the chip 22. The area of the first molding compound 23 is adjusted according to the area of the second substrate 24. That is, the area of the first molding compound 23 is extended to be close to the area of the second substrate 24, so as to support the second substrate 24 to prevent the second substrate 24 from swaying during the wire bonding process. Moreover, the area of the second substrate 24 can be increased to receive more devices disposed thereon. In addition, the thickness of the second substrate 24 can be reduced, so as to reduce the overall thickness of the stackable semiconductor package 2. In the present embodiment, the first substrate 21, the chip 22, and the first molding compound 23 constitute a wire-bonding package. However, it is reasonable that the chip 22 can be a flip chip attached to the first surface 211 of the first substrate 21.
The first wires 25 electrically connect the first pads 243 of the second substrate 24 to the first surface 211 of the first substrate 21. The second molding compound 26 encapsulates the first surface 211 of the first substrate 21, the first molding compound 23, a portion of the second substrate 24, and the first wires 25, and the second pads 244 on the first surface 241 of the second substrate 24 are exposed 1S outside the second molding compound 26, thus forming a mold area opening 29. Under common circumstances, the stackable semiconductor package 2 further includes another package 30 or other devices stacked at the mold area opening 29, wherein solder balls 301 of the package 30 are electrically connected to the second pads 244 of the second substrate 24.
The second substrate 54 has a first surface 541 and a second surface 542. The second chip 55 has a first surface 551 and a second surface 552. The first surface 551 of the second chip 55 is adhered to the second surface 542 of the second substrate 54 by the use of an adhesive layer 61. The second surface 552 of the second chip 55 is electrically connected to the second surface 542 of the second substrate 54 via a plurality of third wires 62. The third molding compound 56 encapsulates the second chip 55, the third wires 62, and a portion of the second surface 542 of the second substrate 54, and is directly adhered to the first molding compound 53 by the use of an adhesive layer 63.
The first surface 541 of the second substrate 54 has a plurality of first pads 543 and a plurality of second pads 544 disposed thereon. The area of the first molding compound 53 is adjusted according to the area of the second substrate 54 and the third molding compound 56. That is, the area of the first molding compound 53 is extended to be close to the area of the second substrate 54 and third molding compound 56, so as to support the second substrate 54 to prevent the second substrate 54 from swaying during the wire bonding process. In the present embodiment, the first substrate 51, the first chip 52, and the first molding compound 53 constitute a wire-bonding package. However, it is reasonable that the first chip 52 can be a flip chip attached to the first surface 511 of the first substrate 51. Furthermore, in the present embodiment, the second substrate 54, the second chip 55, and the third molding compound 56 constitute a wire-bonding package. However, it is reasonable that the second chip 55 can be a flip chip attached to the second surface 541 of the second substrate 54.
The first wires 57 electrically connect the first pads 543 of the second substrate 54 to the first surface 511 of the first substrate 51. The second molding compound 58 encapsulates the first surface 511 of the first substrate 51, the first molding compound 53, a portion of the second substrate 54, the third molding compound 56, and the first wires 57, and the second pads 544 on the first surface 541 of the second substrate 54 are exposed outside the second molding compound 58, thus forming a mold area opening 64. Under ordinary circumstances, the stackable semiconductor package 5 further includes another package 65 or other devices stacked at the mold area opening 64, wherein solder balls 651 of the package 65 are electrically connected to the second pads 544 of the second substrate 54.
The method of fabricating the stackable semiconductor package of the present invention is illustrated with reference to the first embodiment below. Referring to
First, a package including a first substrate 21, a chip 22, and a first molding compound 23 is provided. The first substrate 21 has a first surface 211 and a second surface 212. The chip 22 is disposed on the first surface 211 of the first substrate 21. The chip 22 has a first surface 221 and a second surface 222. The second surface 222 of the chip 22 is adhered to the first surface 211 of the first substrate 21 by the use of an adhesive layer 27. The first surface 221 of the chip 22 is electrically connected to the first surface 211 of the first substrate 21 via a plurality of second wires 28. The first molding compound 23 encapsulates the chip 22, the second wires 28, and a portion of the first surface 211 of the first substrate 21.
In the present embodiment, the package is a wire-bonding package. However, it is reasonable that the chip 22 can be a flip chip attached to the first surface 211 of the first substrate 21. Preferably, the package further includes a semiconductor device 223 (
Then, a second substrate 24 is provided, which is disposed above the first molding compound 23. The second substrate 24 has a first surface 241 and a second surface 242. The second surface 242 of the second substrate 24 is directly adhered to the first molding compound 23 by the use of an adhesive layer 271. The first surface 241 of the second substrate 24 has a plurality of first pads 243 and a plurality of second pads 244 disposed thereon. The area of the first molding compound 23 is adjusted according to the area of the second substrate 24.
Preferably, a step of disposing a semiconductor device 224 (
Afterward, a plurality of first wires 25 is provided. The first wires 25 electrically connect the first pads 243 of the second substrate 24 to the first surface 211 of the first substrate 21.
Finally, a second molding compound 26 is provided. The second molding compound 26 encapsulates the first surface 211 of the first substrate 21, the first molding compound 23, a portion of the second substrate 24, and the first wires 25, and the second pads 244 on the first surface 241 of the second substrate 24 are exposed outside the second molding compound 26, thus forming a mold area opening 29.
Preferably, the fourth embodiment of the stackable semiconductor package in
While several embodiments of the present invention have been illustrated and described, various modifications and improvements can be made by those skilled in the art. The embodiments of the present invention are therefore described in an illustrative but not restrictive sense. It is intended that the present invention may not be limited to the particular forms as illustrated, and that all modifications which maintain the spirit and scope of the present invention are within the scope as defined in the appended claims.
Number | Date | Country | Kind |
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095115345 | Apr 2006 | TW | national |