Claims
- 1. A method of forming a membrane having compliant studs thereon for use in conjunction with a semiconductor carrier for electrically coupling die pads of a semiconductor device to said compliant studs, which comprises the steps of:(a) providing a semiconductor carrier and an electrically insulating substrate; (b) forming an interconnect pattern on said electrically insulating substrate; (c) forming at least one stud coupled to said interconnect pattern and over said substrate, each of said at least one stud being formed by the steps of: (i) forming at least one gold ball on said interconnect pattern; (ii) coating the portion of said at least one gold ball most remote from said interconnect pattern with an electrically conductive compliant material; and (d) placing said substrate with said interconnect pattern and at least one gold ball in said semiconductor carrier.
- 2. The method of claim 1 wherein step (c)(i) includes the step of forming said gold ball by forming a ball bond on said interconnect pattern.
- 3. The method of claim 1 wherein said step of coating said gold ball includes the step of immersing a portion of said ball into a compliant epoxy resin to coat only the portion of said ball most remote from said interconnect pattern with said electrically conductive compliant material.
- 4. The method of claim 2 wherein said step of coating said gold ball includes the step of immersing a portion of said ball into a compliant epoxy resin to coat only the portion of said ball most remote from said interconnect pattern with said electrically conductive compliant material.
- 5. The method of claim 1 further including a semiconductor device having contact pads thereon, said contact pads having an oxide film thereon, said compliant material being filled with a material having sufficient hardness to be capable of penetrating the oxide film on the contact pads of said semiconductor device in standard operation.
- 6. The method of claim 2 further including a semiconductor device having contact pads thereon, said contact pads having an oxide film thereon, said compliant material being filled with a material having sufficient hardness to be capable of penetrating the oxide film on the contact pads of said semiconductor device in standard operation.
- 7. The method of claim 3 further including a semiconductor device having contact pads thereon, said contact pads having an oxide film thereon, said compliant material being filled with a material having sufficient hardness to be capable of penetrating the oxide film on the contact pads of said semiconductor device in standard operation.
- 8. The method of claim 4 further including a semiconductor device having contact pads thereon, said contact pads having an oxide film thereon, said compliant material being filled with a material having sufficient hardness to be capable of penetrating the oxide film on the contact pads of said semiconductor device in standard operation.
- 9. The method of claim 5 wherein said material is silver or silver-based flakes.
- 10. The method of claim 6 wherein said material is silver or silver-based flakes.
- 11. The method of claim 7 wherein said material is silver or silver-based flakes.
- 12. The method of claim 8 wherein said material is silver or silver-based flakes.
- 13. The method of claim 9 wherein said compliant material has a compliance of about 30 percent.
- 14. The method of claim 10 wherein said compliant material has a compliance of about 30 percent.
- 15. The method of claim 11 wherein said compliant material has a compliance of about 30 percent.
- 16. The method of claim 12 wherein said compliant material has a compliance of about 30 percent.
CROSS REFERENCE TO RELATED APPLICATIONS
This application is related to Ser. No. 09/164,580, filed Oct. 1, 1998, which claims priority from provisional application Ser. No. 60/060,800, filed Oct. 3, 1997, the contents of which are incorporated herein by reference.
US Referenced Citations (10)
Foreign Referenced Citations (2)
Number |
Date |
Country |
0633607 |
Nov 1995 |
EP |
411145320 |
May 1999 |
JP |
Non-Patent Literature Citations (1)
Entry |
Lin, J-K. et al, “Conductive Polymer Bump Interconnects”, Proceedings, Electronic Components and Technology conference, p 1059 (1996). |
Provisional Applications (1)
|
Number |
Date |
Country |
|
60/107230 |
Nov 1998 |
US |