This application claims priority from Japanese Patent Application No. 2011-080236 filed on Mar. 31, 2011, the entire contents of which are hereby incorporated by reference.
1. Field
Embodiments described herein relate to a wiring substrate and an electronic device including the wiring substrate.
2. Description of Related Art
In recent years, a central processing unit (CPU) used in an information processor such as a computer has achieved a high degree of performance, and as a result, a caloric value has also increased rapidly. As a method for cooling a heat generating component such as the CPU, a technology has been known that cools the heat generating component by contacting a heat dissipating member having a heat dissipating fin with the heat generating component. Meanwhile, a method has been conceived for dissipating heat by conducting the heat to the surface, the inside or a rear surface of a substrate on which the heat generating component is mounted.
A general architecture that implements the various features of the invention will now be described with reference to the drawings. The drawings and the associated descriptions are provided to illustrate embodiments of the invention and not to limit the scope of the invention:
According to exemplary embodiments of the present invention, there is provided a wiring substrate. The wiring substrate includes: a substrate body comprising a first surface and a second surface opposite to the first surface, wherein the substrate body has a plurality of first through holes; a plurality of first pads on the first surface of the substrate body; a plurality of second pads on the first surface of the substrate body, wherein the second pads are surrounded by the first pads. Each of the second pads has at least one second through hole, and the second pads are disposed on the first surface of the substrate body such that each of the second through holes is communicated with a corresponding one of the first through holes.
Hereinafter, exemplary embodiments will be described with reference to the accompanying drawings.
PC 1 includes a body unit 2 and a display unit 3. The body unit 2 includes, for example, a lower case 4 made of a synthetic resin in a box shape, a substrate assembly 5 disposed in the lower case 4, an information recording device such as a HDD or an SSD (not shown), and a battery, or the like. A keyboard 6, a touch pad 7, and a button 8 are installed on a top surface of the lower case 4. A CPU, a read only memory (ROM), a random access memory (RAM), a flash memory, and other semiconductor components are mounted on the substrate assembly 5.
The display unit 3 includes, for example, an upper case 9 made of the synthetic resin and a display 10 disposed in the upper case 9, or the like. The upper case 9 is formed to surround the circumference of the display 10. The display 10 is, for example, a liquid crystal display. A hinge portion 11 is provided between the lower case 4 and the upper case 9, rotatably supporting the upper case 9 with respect to the lower case 4.
On a surface 13b of a package 13a of the component 12, electrodes 14, 15 are disposed and serve as a first electrode and a second electrode, respectively. The electrode 15 is positioned substantially at the center of the surface 13b and is formed in a rectangular shape. The electrode 15 serves as a heat dissipating electrode that dissipates heat to the outside from the inside of the component 12. Further, the electrode 15 may serve as a ground electrode. In addition, there may be the case where the electrode 15 is not used as the ground electrode.
Electrodes 14 are provided in a rectangular annular region between a rectangular side of the electrode 15 and an outer peripheral side of the surface 13b. Further, the electrodes 14 are provided to surround the electrode 15. The electrodes 14 may serve as signal electrodes. In addition, some of the electrodes 14 may not be used as the signal electrode.
In the package 13a of the component 12, a chip 16 is disposed substantially at the center, and plural signal pads (not shown) on the chip 16 and the electrodes 14 are connected with each other by a bonding wire 17. The chip 16 is mounted on the electrode 15 through a bonding material 18, and the bonding material 18 conducts heat of the chip 16 to the electrode 15. The chip 16 and the bonding wire 17 are sealed by a sealing member 19 such as an underfill agent or a molding agent including a synthetic resin.
In the substrate 20, pads 22 serving as first pads and pads 23 serving as second pads are disposed on a surface 21b where the component 12 is mounted. A solder resist 25 is formed in a region 24 other than regions where the pads 22, 23 are formed.
The pads 23 are formed at a position opposite to the electrode 15 serving as the second electrode of the component 12. As shown in
Each of the pads 23 has substantially the same shape, and also has substantially the same area size. The through holes 26 is disposed substantially at the center of the pads 23, and formed in a substantially circular. The diameter of each of the through holes 26 is substantially the same. The pads 23 are electrically connected to pads 27 provided on a rear surface 21c of the substrate 20 through inner walls of the through holes 26. A solder resist 29 is formed in a region 28 other than regions where the pads 27 or other pads are formed. Further, the shape of the pads 27 is not limited to a rectangular shape.
The pads 22 are formed at a position opposite to the electrodes 14 serving as the first electrode of the component 12. As shown in
Each of the electrodes 14 is bonded to a corresponding one of the pads 22 through the bonding material 30a. The electrode 15 is bonded to each of the pads 23 through the bonding material 30a.
The bonding material 30b flows in the through holes 26 in a reflow process and extends to the rear surface 21c of the substrate 20. With this configuration, the heat of the chip 16 conducted to the bonding material 30b is dissipated from the rear surface 21c, and therefore the heat of the component 12 can be efficiently dissipated. Further, in a case where the substrate 20 is a multi-layered substrate, heat is easily conducted to copper in inner layers of the substrate to be efficiently dissipated in a substrate thickness direction.
In general, as the volume of the bonding materials bonded to the electrode 15 increases, it is difficult to form a void. As shown in
The voids generated within the bonding materials 30b flows into the through holes 26 while some of the bonding materials 30b flow into the through holes 26, and then are discharged from the rear surface 21c. As a result, it is possible to suppress the voids from being remained within the bonding materials 30b.
As the volume of the bonding materials bonded to the electrode 15 increases, the component 12 tends to be easily deviated or inclined by the influence of a deviation caused by the condensation of the bonding materials. For this reason, the bonding materials are divided as described above. As shown in
A bonding area of the electrode 15 and the bonding materials 30b may be increased so that heat of the chip 16 can be conducted to the bonding materials 30b. A heat dissipating pad of LLCC or QFN is formed in a rectangular shape in most cases, and thus the electrode 15a is formed in a rectangular shape (see
For example, when the pads 23 are formed in a circular shape, a gap is formed between the adjacent pads 23. Also, when the pads 23 are formed in a triangular shape or a hexagonal shape, a gap is formed between the adjacent electrode 15. Therefore, when the shape of the electrode 15 is a rectangular shape, the shape of the pads 23 is also a rectangular to increase the bonding area. The divided number of the pads 23 may be appropriately determined depending on the size of the electrode 15, the size of the pads 23, and the size of the through holes 26.
Subsequently, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
Next, as shown in
As described above, the region E of the substrate 20 is divided into plural regions, and the respective pads 23 are disposed on the corresponding area divided in a lattice pattern. Each of the pads 23 is formed in substantially rectangular shape and separated from each other, and the through holes 26 are formed in the pads 23. With this configuration, the bonding materials 30b flow into the respective through holes 26 through the reflow process, and extend to the rear surface 21c of the substrate 20. Thus, the heat of the chip 16 conducted to the bonding materials 30b may also be dissipated from the rear surface 21c, thereby dissipating the heat of the component 12 efficiently.
Further, the bonding materials bonded to the electrode 15 may be divided into the plural bonding materials 30b to suppress the formation of the void in the bonding materials. In addition, the areas of the pads 23 may be substantially the same, so that the volumes of the bonding materials 30b are constant and the deviation of the condensation between the divided bonding materials 30b can be reduced. Thus, it is possible to prevent the component 12 from being deviated or inclined. As a result, the component 12 may be bonded onto the substrate 20 in an excellent condition.
While certain embodiments have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the invention. Indeed, the novel methods and systems described herein may be embodied in a variety of other forms. Furthermore, various omissions, substitutions and changes in the form of the methods and systems described herein may be made without departing from the sprit of the invention. The accompanying claims and their equivalents are intended to cover such forms or modifications as would fall within the scope and sprit of the invention.
Number | Date | Country | Kind |
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2011-080236 | Mar 2011 | JP | national |