3381185

Information

• Patent Grant
• 3381185

• References
• Source

• Patent Number

  3,381,185

• Date Filed

  Not available

• Date Issued

  Tuesday, April 30, 1968
  56 years ago

• CPC

  • H01L23/488 - consisting of soldered or bonded constructions
  • H01L21/00 - Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
  • H01L23/041 - the container being a hollow construction having no base used as a mounting for the semiconductor body
  • H01L23/051 - another lead being formed by a cover plate parallel to the base plate
  • H01L23/485 - consisting of layered constructions comprising conductive layers and insulating layers
  • H01L24/01 - Means for bonding being attached to, or being formed on, the surface to be connected
  • H01L29/00 - Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier
  • H01L2224/73253 - Bump and layer connectors
  • H01L2924/01079 - Gold [Au]
  • H01L2924/01322 - Eutectic Alloys
  • H01L2924/09701 - Low temperature co-fired ceramic [LTCC]
  • H01L2924/12036 - PN diode
  • H01L2924/12042 - LASER
  • H01L2924/12043 - Photo diode
  • Y10S148/026 - Deposition thru hole in mask
  • Y10S148/029 - Differential crystal growth rates
  • Y10S438/98 - Utilizing process equivalents or options

• US Classifications

  • 257 - Active solid-state devices