Integrated circuits are often fabricated on chips that are connected to a larger package via bond pads and/or other types of electrical connectors, using a connective joining material such as solder. These packages may include multiple circuits and devices, and can be incorporated into larger circuits (e.g., onto a printed circuit board). The packaging process may involve integrating many circuit dies upon a particular package, with connections between each die and the package.
Many integrated circuit components and related manufacturing processes have been challenging to implement due to issues with materials and processes used in making electrical connections. For example, lead and lead-based materials have been used in solder connectors, but pose environmental challenges on many fronts. In addition, many soldering approaches are susceptible to undesirable characteristics, such as solder voiding, solder splash, flux contamination, misalignment, solder dedicated re-melting temperatures, or peeling, which can be detrimental to device integration and performance.
These and other matters have presented challenges to connecting integrated circuits, and related device operation.
Various example embodiments are directed to circuit connectors and approaches to connecting circuits, such as for connecting integrated circuit chips with leadframes using a bond pad.
In accordance with an example embodiment, an integrated circuit device is manufactured as follows. A metal barrier layer/adhesion promoter is sputtered on a bond connection surface (e.g., a redistribution layer), and a seed layer of copper is applied on the barrier layer/adhesion promoter. Copper is plated on the seed layer to form a plated copper layer. A layer of tin is introduced to the plated copper layer, such as by positioning a circuit component having the layer of tin thereupon, such that the tin layer contacts the plated copper layer. In some implementations, the seed layer and barrier layer/adhesion promoter are patterned to form a bond pad pattern, and copper is galvanically plated on the patterned seed layer to form a patterned metal stack having a pattern that matches the patterned seed layer. The copper and tin is heated to form a Cu—Sn alloy, melt the Cu—Sn alloy, and react substantially all of the tin to form a Cu—Sn intermetallic compound from the alloy. The compound physically and electrically connects the connection surface with another connector (e.g., a copper connector).
Another example embodiment is directed to a method for joining a semiconductor substrate with a leadframe having tin connectors. A barrier layer/adhesion promoter is sputtered on a surface of the substrate, and a seed layer of copper is sputtered on the barrier layer/adhesion promoter. The seed layer and barrier layer/adhesion promoter are patterned to form a bond pad pattern, and copper is galvanically plated on the patterned seed layer to form a patterned copper layer having a pattern that matches the patterned seed layer. The leadframe (e.g., a copper lead frame that is galvanically tin plated) is positioned to contact the patterned copper layer. The copper and tin are heated to form a Cu—Sn alloy, melt the alloy, and react substantially all of the tin to form a Cu—Sn intermetallic compound that physically and electrically connects the substrate surface with the leadframe.
In connection with another example embodiment, an integrated circuit package includes an integrated circuit substrate and a leadframe. The substrate includes a bond connection surface, and a sputtered barrier layer/adhesion promoter is located on the connection surface. A seed layer of copper is on the barrier layer/adhesion promoter, and plated copper is on the seed layer. The leadframe has a layer of tin for bonding with the integrated circuit substrate via the plated copper. The tin layer is configured via its thickness to, upon contact with the copper and heating of the copper and tin, form a Cu—Sn alloy that melts, and to form a Cu—Sn intermetallic compound from the alloy via reaction of substantially all of the tin. The compound physically and electrically connecting the connection surface with the leadframe.
The above discussion/summary is not intended to describe each embodiment or every implementation of the present disclosure. The figures and detailed description that follow also exemplify various embodiments.
Various example embodiments may be more completely understood in consideration of the following detailed description in connection with the accompanying drawings, in which:
While the invention is amenable to various modifications and alternative forms, specifics thereof have been shown by way of example in the drawings and will be described in detail. It should be understood, however, that the intention is not to limit the invention to the particular embodiments described. On the contrary, the intention is to cover all modifications, equivalents, and alternatives falling within the scope of the invention including aspects defined in the claims.
The present invention is believed to be applicable to a variety of different types of processes, devices and arrangements for use with various circuits, including integrated circuits coupled into package arrangements using a joining material and related processes. While the present invention is not necessarily so limited, various aspects of the invention may be appreciated through a discussion of examples using this context.
According to an example embodiment, a copper and tin-based joining material is used to connect circuits in an integrated circuit device. A copper and tin alloy is formed over a surface, heated (melted) and reacted to form a copper-tin (Cu—Sn) intermetallic compound, in which substantially all of the tin is reacted in forming the compound. The Cu—Sn intermetallic compound includes a material such as Cu6Sn5 that both physically and electrically couples the surface and another circuit component. This approach can be carried out, and the resulting structure can be made, in a lead-free manner addressing various challenges including those discussed in the background above.
The respective thicknesses of the copper and/or tin, as well as other adjacent materials and processing conditions relating to heating are selected to suit various applications and facilitate the reaction of substantially all of the tin. In various applications, reacting substantially all of the tin involves reacting at least 80% of the tin, at least 90% of the tin, at least 95% of the tin or at least 98% of the tin. In addition, various embodiments involving the formation of a Cu—Sn compound involve doing so in a lead-free or substantially lead-free environment.
In some implementations, the respective thicknesses of the copper and/or tin are set to achieve a selected (low) melting point temperature of the alloy, and a correspondingly higher melting point temperature of the resulting intermetallic compound. The copper and tin alloy is heated to melt/flow the alloy at the desirably low temperature (e.g., around 230° C.), to form the intermetallic compound and join circuit components. As the resulting intermetallic compound is formed, it solidifies and exhibits a relatively higher melting temperature (e.g., at or above about 400° C.).
According to a more particular example embodiment, a barrier layer/adhesion promoter is used as an interface between the copper and tin alloy and the surface over which the alloy is formed. The barrier layer/adhesion promoter may operate to effect one or both of barrier and adhesion properties and may include, for example, titanium-based material, a nickel-based material an, or a vanadium-based material. The barrier layer/adhesion promoter can be sputtered upon the surface underlying the copper/tin alloy before the formation thereof. In many implementations, the barrier layer/adhesion promoter has barrier properties that mitigate the formation of additional intermetallic compound (in later processing) at a particular temperature.
The copper and corresponding copper/tin alloy can be formed using a variety of approaches. In one embodiment, a seed layer of copper is applied first and functions as a landing place for subsequently-formed copper (e.g., via galvanic plating), followed by plating of a copper layer on the seed layer to form a plated copper layer. Where a barrier layer/adhesion promoter is used as discussed above, the seed layer of copper is applied to the barrier layer/adhesion promoter, with the combined adhesion-layer material and copper seed layer forming a combined material that facilitates the subsequent plating of the copper layer, from an adhesion and formation perspective. Once the plated copper layer is formed, tin (e.g., a layer) is contacted with the plated copper layer to form a copper-tin (Cu—Sn) alloy.
The tin (layer) is introduced to and contacts the plated copper in a variety of manners. In one implementation, a tin layer of a selected thickness is formed on an integrated circuit package component, such as a leadframe, to be joined to a chip on which the plated copper is formed. The integrated circuit package component is then positioned to contact the tin layer with the plated copper. In another implementation, a tin layer is formed directly on the plated copper layer. In these (or other) implementations, the thickness of the tin layer can be set thin enough such that all of the tin is consumed in a subsequent reaction to form an intermetallic compound, as discussed further below.
Upon heating, the copper and tin in the Cu—Sn alloy melt and the copper and tin in the melted alloy react to form a copper-tin (Cu—Sn) intermetallic compound. During the reaction, all or substantially all of the tin reacts. This compound physically (e.g., mechanically) and electrically couples the underlying surface with the resulting (overlying) circuit. This approach is applicable to joining a bond package arrangement in which a package component such as a silicon chip is joined to another package component such as a leadframe.
In some embodiments, upper and lower surfaces of an integrated circuit chip are coated with a barrier layer/adhesion promoter and copper seed layer, and subsequently plated with copper as described herein. Additional package components are subsequently connected to each side of the chip, using a tin layer as discussed to form a copper-tin alloy and, therefrom, a copper-tin intermetallic compound via consumption of the tin.
In connection with various example embodiments, it has been discovered that the respective thicknesses of layers including one or more of respective copper and tin materials, adhesion material and seed material can be set together with the temperature and time at which the Cu—Sn alloy is heated to effect the reaction of substantially all of the Sn to form the Cu—Sn intermetallic compound. The respective layers are formed to the set thicknesses, and the materials are subjected to heating at the set temperature for the selected time, to form the Cu—Sn intermetallic compound.
In some embodiments, respective layer thicknesses as discussed above include a 0.2 μm layer of Titanium adhesion material, a 0.2 μm seed layer of copper, a 5 μm plated copper layer and a 3 μm layer of tin. The thickness of the tin layer is varied, in connection with different embodiments, to ensure the consumption of the tin in forming a Cu—Sn compound with the underlying copper.
The package components that the Cu—Sn alloy is used to connect may vary depending upon the application. For example, the alloy (and subsequent compound) can be formed on an underlying surface of a circuit board or other package component, with another package component such as a leadframe added above and coupled with the underlying surface via heating and reaction to form the Cu—Sn compound. For instance, bond pads of respective circuits on different package components can be connected to one another using this approach. In addition, the alloy (and subsequent compound) can also be formed upon the underside of a device such as a circuit or package component, to be coupled to an underlying circuit board (or other package component).
As consistent with the examples discussed herein, various embodiments are directed to integrated circuits, circuit packages, circuit boards and related devices employing a copper-tin based joining material as described. Other embodiments are directed to methods for manufacturing such circuits, packages, boards and devices using the copper-tin based joining material.
Still other embodiments are directed to devices at an intermediate stage of manufacture. For example, one such embodiment is directed to an intermediate device having a copper/tin alloy material, together with one or more related materials and material layers as described (e.g., adhesion and/or seed layers). The intermediate device and the respective layers are configured for subsequent heating, at an appropriate stage of further manufacture, when the device is joined to another package component. Other examples involve devices at other stages of manufacture, such as a device amenable to the addition of tin to a plated copper layer that has been prepared for further processing. For instance, such embodiments may involve one or both components of a two-component package (e.g., chip and leadframe) that is yet to be joined, with one component having a plated copper layer and the other component having a tin layer, as discussed. Various embodiments are also directed to methods for manufacturing such devices.
Turning now to the Figures,
Beginning with
In
In
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In
The package components 110 and 160 may include one or more of a variety of components, such as individual bond pad contacts or devices having an array of such contacts. For example, various embodiments involve manufacturing a bond-pad sized Cu—Sn compound 170, having dimensions that fit the particular application. Other embodiments are directed to the formation of several bond pad connections. These applications are particularly amenable to small-dimension packages, and can be effected without solder prints.
As an example of bond pad arrangements,
At block 240, a tin (Sn) layer is provided on the plated copper layer formed at block 230, to form a copper-tin (Cu—Sn) alloy. A secondary package component is positioned for bonding at block 250, such as by bringing one or more bonding pads into contact with the Cu—Sn alloy. In many applications, the secondary package component (e.g., a leadframe) has the layer of Sn, which is contacted to the plated copper layer formed at block 230. At block 260, the Cu—Sn alloy is heated to form a Cu—Sn intermetallic compound (IMC) such as Cu6Sn5. After solidification, the Cu—Sn IMC exhibits a higher melting point than the Cu—Sn alloy, which facilitates further high-temperature processing. In some implementations, a flux is applied (e.g., sprayed) to mitigate the oxidation or other degradation of the materials as the Cu—Sn intermetallic compound is formed, and removed as appropriate after formation of the IMC.
The positioning of the secondary package component at block 250 may also be carried out in connection with the heating at block 260. For example, the Cu—Sn alloy may be heated to melt the alloy, with the secondary package component brought into contact with the alloy before it cools and solidifies.
In some embodiments, the thickness of one or both of the respective copper and tin layers, and sometimes of the adhesion and seed layers as well, are selected together with IMC heating conditions at block 225 to facilitate consumption of the Sn layer provided at block 240 in forming the Cu—Sn IMC at block 260. For instance, as discussed in connection with the above discovery-type embodiments, the respective thicknesses can be so chosen along with temperature and time parameters of the heating in the IMC formation at block 260 to ensure the consumption of the Sn layer. Such thicknesses and temperatures may include those as discussed herein, such as by heating a 2-4 μm layer of tin to a temperature of about 230° C. for several minutes, an hour or more. As would be understood, the respective thicknesses, temperature and time can be set to suit various applications and facilitate the use of these approaches with different types of equipment. As appropriate, the thickness selection steps at block 225 may be carried out prior to and/or in connection with any of the steps as shown, such as in connection with one or both of the application of the copper seed layer at block 220 and the sputtering of adhesion material at block 210. Dashed lines connecting block 225 to the other blocks represent these exemplary processes, in which thickness and heating conditions are selected for one or more steps as shown.
In certain embodiments, the copper seed layer is patterned at block 227, prior to plating the copper layer at block 230. In some implementations, the adhesion material is also patterned at block 227. This patterning facilitates the formation of the plated copper at block 230 in a predefined pattern as applied to the copper layer.
The plot 410 represents a line of temperature below which a Cu—Sn alloy is in solid form, and above which melting occurs. Held above the melting temperature for a significant amount of time (and at a sufficiently thin layer of tin), substantially all of the tin reacts with the copper to form a Cu—Sn compound as described. As the Cu—Sn is initially heated, liquid CuSn is formed as shown in liquid region 420. As more of the copper and tin reacts to form a Cu—Sn IMC (Cu6Sn5), a combination of liquid +Cu6Sn5 is present and, as the tin is consumed, becomes all Cu6Sn5 (solidified).
Based upon the above discussion and illustrations, those skilled in the art will readily recognize that various modifications and changes may be made to the present invention without strictly following the exemplary embodiments and applications illustrated and described herein. For example, the content of the copper/tin (Cu—Sn) materials as shown may be varied depending upon the application, as may be the relative thickness and placement as shown in and/or described in connection with the figures, or otherwise. In addition, the phase of the resulting intermetallic compound of Cu—Sn material may vary, depending upon the application. Such modifications do not depart from the true spirit and scope of the present invention, including that set forth in the following claims.
Number | Date | Country | Kind |
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10166436.5 | Jun 2010 | EP | regional |