CHEMICAL VAPOR CONDENSATION DEPOSITION OF PHOTORESIST FILMS

Abstract

Embodiments disclosed herein include methods of depositing a metal oxo photoresist using chemical vapor condensation deposition processes. In an example, a method for forming a photoresist layer over a substrate in a vacuum chamber includes providing a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature. The method further includes providing an oxidant vapor into the vacuum chamber, where a reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate. The photoresist layer is a metal oxo containing material. The substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

Description

BACKGROUND

1) Field

Embodiments of the present disclosure pertain to the field of semiconductor processing and, in particular, to methods of depositing a photoresist layer onto a substrate using chemical vapor condensation processes.

2) Description of Related Art

Lithography has been used in the semiconductor industry for decades for creating 2D and 3D patterns in microelectronic devices. The lithography process involves spin-on deposition of a film (photoresist), irradiation of the film with a selected pattern by an energy source (exposure), and removal (etch) of exposed (positive tone) or non-exposed (negative tone) region of the film by dissolving in a solvent. A bake will be carried out to drive off remaining solvent.

The photoresist should be a radiation sensitive material and upon irradiation a chemical transformation occurs in the exposed part of the film which enables a change in solubility between exposed and non-exposed regions. Using this solubility change, either exposed or non-exposed regions of the photoresist is removed (etched). The photoresist is then developed and the pattern can be transferred to the underlying thin film or substrate by etching. After the pattern is transferred, the residual photoresist is removed and repeating this process many times can give 2D and 3D structures to be used in microelectronic devices.

Several properties are important in lithography processes. Such important properties include sensitivity, resolution, lower line-edge roughness (LER), etch resistance, and ability to form thinner layers. When the sensitivity is higher, the energy required to change the solubility of the as-deposited film is lower. This enables higher efficiency in the lithographic process. Resolution and LER determine how narrow features can be achieved by the lithographic process. Higher etch resistant materials are required for pattern transferring to form deep structures. Higher etch resistant materials also enable thinner films. Thinner films increase the efficiency of the lithographic process.

SUMMARY

Embodiments disclosed herein include methods of depositing a metal oxo photoresist using chemical vapor condensation deposition processes.

In an embodiment, a method for forming a photoresist layer over a substrate in a vacuum chamber includes providing a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature. In an embodiment, the method further includes providing an oxidant vapor into the vacuum chamber, where a reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate, where the photoresist layer is a metal oxo containing material, and where the substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

In an embodiment, a method of forming a photoresist layer over a substrate in a vacuum chamber includes repeating a cycle a plurality of times. In an embodiment, the cycle includes providing a first pulse of a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature, and providing a second pulse of an oxidant vapor into the vacuum chamber. In an embodiment, a reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate. In an embodiment, the photoresist layer is a metal oxo containing material. In an embodiment, the substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

In an embodiment, a semiconductor processing tool comprises a chamber. In an embodiment, the semiconductor processing tool further comprises a pedestal within the chamber for supporting a substrate. In an embodiment, the pedestal is temperature controlled. In an embodiment, the semiconductor processing tool further comprises an ampoule fluidically coupled to the chamber. In an embodiment, the ampoule is temperature controlled. In an embodiment, the pedestal is configured to keep the substrate at a first temperature, and the ampoule is configured to be at a second temperature that is greater than the first temperature.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 illustrates cross-sectional views representing various operations in a patterning process using a photo-resists material formed by processes described herein, in accordance with an embodiment of the present disclosure.

FIG. 2A includes a general formula for metal precursors suitable for use in fabricating a photoresist film, in accordance with an embodiment of the present disclosure.

FIG. 2B illustrates a chemical representation of a tin (Sn) precursor that can be used together with precursors from FIG. 2A, in accordance with an embodiment of the present disclosure.

FIG. 3 is a cross-sectional illustration of a processing tool that may be used to implement a chemical vapor condensation process described herein, in accordance with an embodiment of the present disclosure.

FIG. 4 is a cross-sectional illustration of a processing tool for depositing a photoresist layer over a substrate with a chemical vapor condensation process, in accordance with an embodiment of the present disclosure.

FIG. 5 is a zoomed in illustration of an edge of a displaceable column in a processing tool for depositing a photoresist layer over a substrate with a chemical vapor condensation process, in accordance with an embodiment of the present disclosure.

FIG. 6A is a zoomed in illustration of an edge of a displaceable column in a processing tool, where the shadow ring is not engaged with the edge ring, in accordance with an embodiment of the present disclosure.

FIG. 6B is a zoomed in illustration of an edge of a displaceable column in a processing tool, where the shadow ring is engaged with the edge ring, in accordance with an embodiment of the present disclosure.

FIG. 7A is a sectional view of a processing tool for depositing a photoresist layer over a substrate with a chemical vapor condensation process, in accordance with an embodiment of the present disclosure.

FIG. 7B is a sectional view of a processing tool with the pedestal removed to expose the channels in a baseplate, in accordance with an embodiment of the present disclosure.

FIG. 8 illustrates a block diagram of an exemplary computer system, in accordance with an embodiment of the present disclosure.

DETAILED DESCRIPTION

Methods of depositing a photoresist on a substrate using chemical vapor condensation processes are described herein. In the following description, numerous specific details are set forth, such as chemical vapor deposition (CVD) and atomic layer deposition (ALD) processes and material regimes for depositing a photoresist, in order to provide a thorough understanding of embodiments of the present disclosure. It will be apparent to one skilled in the art that embodiments of the present disclosure may be practiced without these specific details. In other instances, well-known aspects, such as integrated circuit fabrication, are not described in detail in order to not unnecessarily obscure embodiments of the present disclosure. Furthermore, it is to be understood that the various embodiments shown in the Figures are illustrative representations and are not necessarily drawn to scale.

To provide context, photoresist systems used in extreme ultraviolet (EUV) lithography suffer from low efficiency. That is, existing photoresist material systems for EUV lithography require high dosages in order to provide the needed solubility switch that allows for developing the photoresist material. Traditionally, carbon based films called organic chemically amplified photoresists (CAR) have been used as a photoresist. However, more recently organic-inorganic hybrid materials (metal-oxo) have been used as a photoresist with extreme ultraviolet (EUV) radiation. Such materials typically include a metal (such as Sn, Hf, Zr), oxygen, and carbon. Transformation from deep UV (DUV) to EUV in the lithographic industry facilitated narrow features with high aspect ratio. Metal oxo based organic-inorganic hybrid materials have been shown to exhibit lower line edge roughness (LER) and higher resolution which are required for forming narrow features. Also, such films have higher sensitivity and etch resistance properties and can be implemented to fabricate relatively thinner films.

Currently, a metal-oxo photoresist is deposited by spin-on methods which includes wet chemistries. Post bake processes are required to drive off any remaining solvents from the film and to render the film stable. Also, wet methods can generate a lot of wet waste that the industry wants to move away from. Photoresist films deposited by spin-on methods often result in non-uniformity issues. In accordance with embodiments of the present disclosure, addressing one or more of the above issues, processes for vacuum deposition of a metal oxo photoresist are described herein.

In accordance with one or more embodiments of the present disclosure, chemical vapor condensation deposition approaches for forming photoresist films are described herein. In an embodiment, a wafer/substrate is maintained at a temperature at which the metal precursor can be condensed. Precursor condensation can be achieved by maintaining the wafer temperature at a lower temperature than a precursor ampoule temperature.

To provide further context, as a comparison, during conventional vapor phase depositions, the ampoule is maintained at a temperature that would convert the precursor to gas phase from its liquid or solid form. Then, the lines that carry precursor vapor are heated to a higher temperature than the ampoule temperature (e.g., to avoid condensation). The gas phase precursor is transported to a chamber where a wafer is maintained at a higher temperature than the precursor line and ampoule temperature. Essentially, for conventional processing, downstream temperatures are higher than upstream temperatures. Because of this, precursor condensation does not occur and the precursor is always in its gas phase.

By contrast to conventional processes, in accordance with one or more embodiments, a wafer is maintained at a lower temperature than an ampoule and line temperatures, enabling condensation of the precursor vapor on the wafer. A resulting photoresist layer may then be used in a patterning process. For example, FIG. 1 illustrates cross-sectional views representing various operations in a patterning process using a photo-resists material formed by processes described herein, in accordance with an embodiment of the present disclosure.

Referring to part (a) of FIG. 1, a starting structure 100 includes a photoresist layer 104 above a substrate or underlying layer 102. In one embodiment, the photoresist layer 104 is deposited using chemical vapor condensation. Referring to part (b) of FIG. 1, the starting structure 100 is irradiated 106 in select locations to form an irradiated photoresist layer 104A having irradiated regions 105A and non-irradiated regions 105B. Referring to part (c) of FIG. 1, a removal or etch process 108 is used to provide a developed photoresist layer of irradiated regions 105A. Referring to part (d) of FIG. 1, an etch process 11 is used to pattern the substrate or underlying layer 102 to form patterned substrate or patterned underlying layer 102A including etched features 112.

Referring again to FIG. 1, the photoresist 104 is a radiation sensitive material and, upon irradiation, a chemical transformation occurs in the exposed part of the film which enables a change in solubility between exposed and non-exposed regions. Using the solubility change, either exposed or non-exposed regions of the photoresist are removed (etched). The photoresist is then developed and the pattern can be transferred to the underlying thin film or substrate by etching. After the pattern is transferred, the residual photoresist is removed. The process can be repeated many times can fabricate 2D and 3D structures, e.g., for use in microelectronic devices.

In accordance with one or more embodiments of the present disclosure, tin (Sn) precursors are used for vacuum deposition processes used to form Sn oxo photoresist materials. An “SnOC” film can have advantages for use as a photoresist film due to its high sensitivity to exposure. In general, a tin-oxo photoresist film contains Sn—O and Sn—C bonds in a SnOC network. Upon exposure (e.g., such as UV/EUV) a Sn—C bond breaks and carbon percentage is reduced in the film. This can lead to a selective etch during the develop process. Sn—C can be incorporated to the film by using a metal precursor with Sn—C bond(s). In one embodiment, the precursors described herein have Sn—C(R contains C to be bound to Sn) for exposure sensitivity and have ligands (L) to react with an oxidant (e.g., water as an example) to form a photoresist film. Reactivity between the precursor and oxidant can be modulated by changing the R and/or L on the Sn precursor. Also, the sensitivity can be modulated by changing the R group in the precursor. In other embodiments, indium-oxo or tin-indium-oxo films also can be used as photoresist films. In yet other embodiments, concepts described herein can be extended to many other metals-containing films.

FIG. 2A includes a general formula for metal precursors 200 suitable for use in fabricating a photoresist film, in accordance with an embodiment of the present disclosure.

FIG. 2B illustrates a chemical representation of a tin (Sn) precursor 250 that can be used together with precursors from FIG. 2A, in accordance with an embodiment of the present disclosure. In one embodiment, combining the precursor 250 (tetrakis(dimethylamino)tin(IV), (TDMASn)) and one or more precursors from FIG. 2A in different ratios can enable modulation of carbon percent (C %) in the resulting photoresist film) 250.

With reference again to FIG. 2A, it is to be appreciated that all R groups within a single molecule may be the same, or different R groups may be included within a single molecule. It is to be appreciated that modifications to the R groups and modifications to the length of the carbon backbone may contribute to the photoresist film properties, such as sensitivity to exposure and etch selectivity during the develop process. Accordingly, optimizations to the resulting metal oxo photoresist may be provided by modifying the R groups and/or the length of the carbon backbone. For example, modifying the length of the carbon backbone may allow for the carbon percentage in the resulting photoresist to be tuned.

In an embodiment, an oxidant for use as a co-reactant is one such as, but not limited to, water (H₂O), O₂, N₂O, NO, CO₂, CO, ethylene glycol, alcohols (e.g.: methanol, ethanol), peroxides (e.g.: H₂O₂), acids (e.g.: formic acid, acetic acid).

In accordance with an embodiment of the present disclosure, a methodology for depositing a photoresist film by chemical vapor condensation deposition involves: (A) One or more metal precursor from FIGS. 2A and 2B and one or more oxidants (e.g.: water, ethylene glycol) being vaporized to an vacuum chamber where a substrate wafer is maintained at a lower temperature than a metal precursor ampoule temperature. Substrate temperature can vary from −40 degrees Celsius to 200 degrees Celsius. When the metal precursors/oxidants are vaporized to the chamber, they can be diluted with inert gases such as Ar, N₂, He. Since the substrate is maintained at a lower temperature than metal precursor evaporation/sublimation temperature, the precursor vapor condenses on the wafer. It is to be appreciated that the oxidant may or may not condense on the wafer as well. In either case, due to the reactivity of the metal precursor and oxidant, the metal precursor and the oxidant can react and a metal oxo film is deposited on the wafer. (B) Vaporization to the chamber can be performed by all precursors simultaneously or alternative pulsing of metal precursor(s) and oxidant(s). (C) If precursors are pulsed, a purge between precursors can also be included. (D) The above aspects (A)-(C) can be carried out with the assistance of plasma. For example, a plasma can be turned on simultaneously with precursor vaporization to the chamber or independently. (E) After a desired thickness is achieved, the resulting film can be subjected to post treatments to prepare a final photoresist layer. In one embodiment, a post treatment includes an anneal at a higher temperature than the deposition temperature (e.g., 25-400 degrees Celsius) under vacuum, Ar, N₂, He, O₂, H₂, NH₃, moisture. In one embodiment, a post treatment includes plasma treatment (Ar, He, N₂, O₂, H₂, NH₃, individually or any combination thereof).

Advantages to implementing one or more of the approaches described herein include that the photoresist film deposition approaches are vacuum deposition approaches and do not involve wet chemistry. Wet chemistry methods can generate a substantial amount of wet by-products which may be preferable to avoid. Also, spin-on (wet methods) often lead to non-uniformity issues which can be successfully addressed by vacuum deposition methods described herein. Also, the percentage of metal and carbon (C) in the film can be tuned by vacuum deposition method. In spin-on, metal percentage and C are often fixed in a given deposition system. Precursors used for depositing photoresist films under vacuum need to be volatile, and the precursors described herein are volatile based on L and R structure. Chemical vapor condensation deposition method requires lower temperatures than other vacuum deposition methods such as ALD or CVD. When the deposition is performed at low temperatures, relatively higher amounts of carbon can be retained in the film, which can be helpful in patterning.

In an embodiment, a vacuum deposition process relies on chemical reactions between a metal precursor and an oxidant. The metal precursor and the oxidant are vaporized to a vacuum chamber. In some embodiments, the metal precursor and the oxidant are provided to the vacuum chamber together. In other embodiments, the metal precursor and the oxidant are provided to the vacuum chamber with alternating pulses. After a metal oxo photoresist film with a desired thickness is formed, the process may be halted. In an embodiment, an optional plasma treatment operation may be executed after a metal oxo photoresist film with a desired thickness is formed.

In an embodiment, a cycle including a pulse of the metal precursor vapor and a pulse of the oxidant vapor may be repeated a plurality of times to provide a metal oxo photoresist film with a desired thickness. In an embodiment, the order of the cycle may be switched. For example, the oxidant vapor may be pulsed first and the metal precursor vapor may be pulsed second. In an embodiment, a pulse duration of the metal precursor vapor may be substantially similar to a pulse duration of the oxidant vapor. In other embodiments, the pulse duration of the metal precursor vapor may be different than the pulse duration of the oxidant vapor. In an embodiment, the pulse durations may be between 0 seconds and 1 minute. In a particular embodiment, the pulse durations may be between 1 second and 5 seconds. In an embodiment, each iteration of the cycle uses the same processing gasses. In other embodiments, the processing gasses may be changed between cycles. For example, a first cycle may utilize a first metal precursor vapor, and a second cycle may utilize a second metal precursor vapor. Subsequent cycles may continue alternating between the first metal precursor vapor and the second metal precursor vapor. In an embodiment, multiple oxidant vapors may be alternated between cycles in a similar fashion. In an embodiment, an optional plasma treatment of operation may be executed after every cycle. That is, each cycle may include a pulse of metal precursor vapor, a pulse of oxidant vapor, and a plasma treatment. In an alternate embodiment, an optional plasma treatment of operation may be executed after a plurality of cycles. In yet another embodiment, an optional plasma treatment operation may be executed after the completion of all cycles (i.e., as a post treatment).

Providing metal oxo photoresist films using chemical vapor condensation processes such as described in the embodiments above can achieve significant advantages over wet chemistry methods. One such advantage is the elimination of wet byproducts. With a chemical vapor condensation process, liquid waste is eliminated and byproduct removal is simplified. Additionally, chemical vapor condensation processes can provide a more uniform photoresist layer. Uniformity in this sense may refer to thickness uniformity across the wafer and/or uniformity of the distribution of metal components of the metal oxo film.

Additionally, the use of chemical vapor condensation processes provides the ability to fine-tune the percentage of metal in the photoresist and the composition of the metal in the photoresist. The percentage of the metal may be modified by increasing/decreasing the flow rate of the metal precursor into the vacuum chamber and/or by modifying the pulse lengths of the metal precursor/oxidant. The use of a chemical vapor condensation process also allows for the inclusion of multiple different metals into the metal oxo film. For example, a single pulse flowing two different metal precursors may be used, or alternating pulses of two different metal precursors may be used.

Furthermore, it has been shown that metal oxo photoresists that are formed using chemical vapor condensation processes are more resistant to thickness reduction after exposure. It is believed, without being tied to a particular mechanism, that the resistance to thickness reduction is attributable, at least in part, to the reduction of carbon loss upon exposure.

In an embodiment, a vacuum chamber utilized in a chemical vapor condensation deposition process is any suitable chamber capable of providing a sub-atmospheric pressure. In an embodiment, the vacuum chamber may include temperature control features for controlling chamber wall temperatures and/or for controlling a temperature of the substrate. In an embodiment, the vacuum chamber may also include features for providing a plasma within the chamber. A more detailed description of a suitable vacuum chamber is provided below with respect to FIG. 3. FIG. 3 is a schematic of a vacuum chamber configured to perform a chemical vapor condensation deposition of a metal oxo photoresist, in accordance with an embodiment of the present disclosure.

Vacuum chamber 300 includes a grounded chamber 305. A substrate 310 is loaded through an opening 315 and clamped to a temperature controlled chuck 320. In an embodiment, the substrate 310 may be temperature controlled during a chemical vapor condensation deposition process. For example, the temperature of the substrate 310 may be between approximately −40 degrees Celsius to 200 degrees Celsius. In a particular embodiment, the substrate 310 may be held to a temperature between room temperature and 150° C.

Process gases, are supplied from gas sources 344 through respective mass flow controllers 349 to the interior of the chamber 305. In certain embodiments, a gas distribution plate 335 provides for distribution of process gases 344, such as a metal precursor, an oxidant, and an inert gas. Chamber 305 is evacuated via an exhaust pump 355. In one embodiment, one or more of the process gases are contained/stored in one or more ampoules, and is maintained at a temperature above the substrate temperature, such as at a temperature 25 degrees Celsius or greater than the substrate temperature.

When RF power is applied during processing of a substrate 310, a plasma is formed in chamber processing region over substrate 310. Bias power RF generator 325 is coupled to the temperature controlled chuck 320. Bias power RF generator 325 provides bias power, if desired, to energize the plasma. Bias power RF generator 325 may have a low frequency between about 2 MHz to 60 MHz for example, and in a particular embodiment, is in the 13.56 MHz band. In certain embodiments, the vacuum chamber 300 includes a third bias power RF generator 326 at a frequency at about the 2 MHz band which is connected to the same RF match 327 as bias power RF generator 325. Source power RF generator 330 is coupled through a match (not depicted) to a plasma generating element (e.g., gas distribution plate 335) to provide a source power to energize the plasma. Source RF generator 330 may have a frequency between 100 and 180 MHz, for example, and in a particular embodiment, is in the 162 MHz band. Because substrate diameters have progressed over time, from 150 mm, 200 mm, 300 mm, etc., it is common in the art to normalize the source and bias power of a plasma etch system to the substrate area.

The vacuum chamber 300 is controlled by controller 370. The controller 370 may include a CPU 372, a memory 373, and an I/O interface 374. The CPU 372 may execute processing operations within the vacuum chamber 300 in accordance with instructions stored in the memory 373. For example, one or more processes such as processes 120 and 440 described above may be executed in the vacuum chamber by the controller 370.

In another aspect, embodiments disclosed herein include a processing tool that includes an architecture that is particularly suitable for optimizing chemical vapor condensation depositions. For example, the processing tool may include a pedestal for supporting a wafer that is temperature controlled. In some embodiments, a temperature of the pedestal may be maintained between approximately −40° C. and approximately 200° C. Additionally, an edge purge flow and shadow ring may be provided around a perimeter of the column on which the substrate is supported. The edge purge flow and shadow ring prevent the photoresist from depositing along the edge or backside of the wafer. In an embodiment, the pedestal may also provide any desired chucking architecture, such as, but not limited to vacuum chucking, monopolar chucking, or bipolar chucking, depending on the operating regime of the processing tool.

In some embodiments, the processing tool may be suitable for deposition processes without a plasma. Alternatively, the processing tool may include a plasma source to enable plasma enhanced operations. Furthermore, while embodiments disclosed herein are particularly suitable for the deposition of metal oxo photoresists for EUV patterning, it is to be appreciated that embodiments are not limited to such configurations. For example, the processing tools described herein may be suitable for depositing any photoresist material for any regime of lithography using a chemical vapor condensation process.

Referring now to FIG. 4, a cross-sectional illustration of a processing tool 400 is shown, in accordance with an embodiment. In an embodiment, the processing tool 400 may include a chamber 405. The chamber 405 may be any suitable chamber capable of supporting a sub-atmospheric pressure (e.g., a vacuum pressure). In an embodiment, an exhaust (not shown) that includes a vacuum pump may be coupled to the chamber 405 to provide a sub-atmospheric pressure. In an embodiment, a lid may seal the chamber 405. For example, the lid may include a showerhead assembly 440 or the like. The showerhead assembly 440 may include fluidic pathways to enable processing gasses and/or inert gasses to be flown into the chamber 405. In some embodiments where the processing tool 400 is suitable for plasma enhanced operation, the showerhead assembly 440 may be electrically coupled to an RF source and matching circuitry 450. In yet another embodiment, the tool 400 may be configured in an RF bottom fed architecture. That is, the pedestal 430 is connected to an RF source, and the showerhead assembly 440 is grounded. In such an embodiment, the filtering circuitry may still be connected to the pedestal. In one embodiment, a precursor gas is stored in an ampoule 499.

In an embodiment, a displaceable column for supporting a wafer 401 is provided in the chamber 405. In an embodiment, the wafer 401 may be any substrate on which a photoresist material is deposited. For example, the wafer 401 may be a 300 mm wafer or a 450 mm wafer, though other wafer diameters may also be used. Additionally, the wafer 401 may be replaced with a substrate that has a non-circular shape in some embodiments. The displaceable column may include a pillar 414 that extends out of the chamber 405. The pillar 414 may have a port to provide electrical and fluidic paths to various components of the column from outside the chamber 405.

In an embodiment, the column may include a baseplate 410. The baseplate 410 may be grounded. As will be described in greater detail below, the baseplate 410 may include fluidic channels to allow for the flow of an inert gas to provide an edge purge flow.

In an embodiment, an insulating layer 415 is disposed over the baseplate 410. The insulating layer 415 may be any suitable dielectric material. For example, the insulating layer 415 may be a ceramic plate or the like. In an embodiment, a pedestal 430 is disposed over the insulating layer 415. The pedestal 430 may include a single material or the pedestal 430 may be formed from different materials. In an embodiment, the pedestal 430 may utilize any suitable chucking system to secure the wafer 401. For example, the pedestal 430 may be a vacuum chuck or a monopolar chuck. In embodiments where a plasma is not generated in the chamber 405, the pedestal 430 may utilize a bipolar chucking architecture.

The pedestal 430 may include a plurality of cooling channels 431. The cooling channels 431 may be connected to a fluid input and a fluid output (not shown) that pass through the pillar 414. In an embodiment, the cooling channels 431 allow for the temperature of the wafer 401 to be controlled during operation of the processing tool 400. For example, the cooling channels 431 may allow for the temperature of the wafer 401 to be controlled to between approximately −40° C. and approximately 200° C. In an embodiment, the pedestal 430 connects to the ground through filtering circuitry 445, which enables DC and/or RF biasing of the pedestal with respect to the ground.

In an embodiment, an edge ring 420 surrounds a perimeter of the insulating layer 415 and the pedestal 430. The edge ring 420 may be a dielectric material, such as a ceramic. In an embodiment, the edge ring 420 is supported by the base plate 410. The edge ring 420 may support a shadow ring 435. The shadow ring 435 has an interior diameter that is smaller than a diameter of the wafer 401. As such, the shadow ring 435 blocks the photoresist from being deposited onto a portion of the outer edge of the wafer 401. A gap is provided between the shadow ring 435 and the wafer 401. The gap prevents the shadow ring 435 from contacting the wafer 401, and provides an outlet for the edge purge flow that will be described in greater detail below.

While the shadow ring 435 provides some protection of the top surface and edge of the wafer 401, processing gasses may flow/diffuse down along a path between the edge ring 420 and the wafer 401. As such, embodiments disclosed herein may include a fluidic path between the edge ring 420 and the pedestal 430 to enable an edge purge flow. Providing an inert gas in the fluidic path increases the local pressure in the fluidic path and prevents processing gasses from reaching the edge of the wafer 401. Therefore, deposition of the photoresist is prevented along the edge of the wafer 401.

Referring now to FIG. 5, a zoomed in cross-sectional illustration of a portion of a column 560 within a processing tool is shown, in accordance with an embodiment. In FIG. 5, only the left edge of the column 560 is shown. However, it is to be appreciated that the right edge of the column 560 may substantially mirror the left edge.

In an embodiment, the column 560 may include a baseplate 510. An insulating layer 515 may be disposed over the baseplate 510. In an embodiment, the pedestal 530 may include a first portion 530_A and a second portion 530_B. The cooling channels 531 may be disposed in the second portion 530_B. The first portion 530_A may include features for chucking the wafer 501.

In an embodiment, an edge ring 520 surrounds the baseplate 510, the insulating layer 515, the pedestal 530, and the wafer 501. In an embodiment, the edge ring 520 is spaced away from the other components of the column 550 to provide a fluidic path 512 from the baseplate 510 to the topside of the column 560. For example, the fluidic path 512 may exit the column between the wafer 501 and shadow ring 535. In a particular embodiment, an interior surface of the fluidic path 512 includes an edge of the insulating layer 515, an edge of the pedestal 530 (i.e., the first portion 530_A and the second portion 530_B), and an edge of the wafer 501. In an embodiment, the outer surface of the fluidic path 512 includes an interior edge of the edge ring 520. In an embodiment, the fluidic path 512 may also continue over a top surface of a portion of the pedestal 530 as it progresses to the edge of the wafer 501. As such, when an inert gas (e.g., helium, argon, etc.) is flown through the fluidic path 512, processing gasses are prevented from flowing/diffusing down the side of the wafer 501.

In an embodiment, the width W of the fluidic path 512 is minimized in order to prevent the striking of a plasma along the fluidic path 512. For example, the width W of the fluidic path 512 may be approximately 1 mm or less. In an embodiment, a seal 517 blocks the fluidic path 512 from exiting the bottom of the column 560. The seal 517 may be positioned between the edge ring 520 and the baseplate 510. The seal 517 may be a flexible material, such as a gasket material or the like. In a particular embodiment, the seal 517 includes silicone.

In an embodiment, a channel 511 is disposed in the baseplate 510. The channel 511 routes an inert gas from the center of the column 560 to the interior edge of the edge ring 520. It is to be appreciated that only a portion of the channel 511 is illustrated in FIG. 5. A more comprehensive illustration of the channel 511 is provided below with respect to FIG. 7B.

In an embodiment, the edge ring 520 and the shadow ring 535 may have features suitable for aligning the shadow ring 535 with respect to the wafer 501. For example, a notch 521 in the top surface of the edge ring 520 may interface with a protrusion 536 on the bottom surface of the shadow ring 535. The notch 521 and protrusion 536 may have tapered surfaces to allow for coarse alignment of the two components to be sufficient to provide a more precise alignment as the edge ring 520 is brought into contact with the shadow ring 535. In an additional embodiment, an alignment feature (not shown) may also be provided between the pedestal 530 and the edge ring 520. The alignment feature between the pedestal 530 and the edge ring 520 may include a tapered notch and protrusion architecture similar to the alignment feature between the edge ring 520 and the shadow ring 535.

Referring now to FIGS. 6A and 6B, a pair of cross-sectional illustrations depicting portions of a processing tool with the pedestal at different locations (in the Z-direction) are shown, in accordance with an embodiment. In FIG. 6A, the pedestal is at a lower position within the chamber. The position of the pedestal in FIG. 6A is where the wafer is inserted or removed from the chamber through a slit valve. In FIG. 6B, the pedestal is at a raised position within the chamber. The position of the pedestal in FIG. 6B is where the wafer is processed.

Referring now to FIG. 6A, a cross-sectional illustration of a displaceable column 660 in a first position is shown, in accordance with an embodiment. As shown in FIG. 6A, the column includes a baseplate 610, an insulating layer 615, a pedestal 630 (i.e., first portion 630_A and second portion 630_B), and an edge ring 620. Such components may be substantially similar to the similarly named components described above. For example, cooling channels 631 may be provided in the second portion 630_B of the pedestal 630, a channel 611 may be disposed in the baseplate 610, and a seal 617 may be provided between the edge ring 620 and the baseplate 610.

As shown in FIG. 6A, a wafer 601 is placed over a top surface of the pedestal 630. The wafer 601 may be inserted into the chamber through a slit valve (not shown). Additionally, the shadow ring 635 is shown at a raised position above the edge ring 620. Since the inner diameter of the shadow ring 635 is smaller than the diameter of the wafer 601, the wafer 601 needs to be placed on the pedestal before the shadow ring 635 is brought into contact with the edge ring 620.

In an embodiment, the shadow ring 635 is supported by a chamber liner 670. The chamber liner 670 may surround an outer perimeter of the column 660. In an embodiment, a holder 671 is positioned on a top surface of the chamber liner 670. The holder 671 is configured to hold the shadow ring 635 at an elevated position above the edge ring 620 when the column 660 is in the first position. In an embodiment, the shadow ring 635 includes a protrusion 636 for aligning with a notch 621 in the edge ring 620.

Referring now to FIG. 6B, a cross-sectional illustration of the column 660 after the shadow ring 635 is engaged is shown, in accordance with an embodiment. As shown, the column 660 is displaced in the vertical direction (i.e., the Z-direction) until the shadow ring 635 engages the edge ring 620. Additional vertical displacement of the column 660 lifts the shadow ring 635 off of the holder 671 on the chamber liner 670. In an embodiment, the shadow ring 635 is aligned properly as a result of the alignment features in the shadow ring 635 and the edge ring 620 (i.e., the notch 621 and the protrusion 636). In an additional embodiment, an alignment feature (not shown) may also be provided between the pedestal 630 and the edge ring 620. The alignment feature between the pedestal 630 and the edge ring 620 may include a tapered notch and protrusion architecture similar to the alignment feature between the edge ring 620 and the shadow ring 635.

While in the second position, the wafer 601 may be processed. Particularly, the processing may include a deposition of a photoresist material over a top surface of the wafer 601. For example, the process may be a chemical vapor condensation deposition process with or without assistance of a plasma. In a particular embodiment, the photoresist is a metal oxo photoresist suitable for EUV patterning. However, it is to be appreciated that the photoresist may be any type of photoresist, and the patterning may include any lithography regime. During deposition of the photoresist onto the wafer 601, an inert gas may be flown along the fluidic channel between the interior surface of the edge ring 610 and the outer surfaces of the insulating layer 615, the pedestal 630, and the wafer 601. As such, photoresist deposition along the edge or backside of the wafer 601 is substantially eliminated. In an embodiment, the wafer temperature 601 may be maintained between approximately −40° C. and approximately 200° C. by the cooling channels 631 in the second portion of the pedestal 630_B.

Referring now to FIG. 7A, a sectional illustration of a processing tool 700 is shown, in accordance with an additional embodiment. As shown in FIG. 7A, the column includes a baseplate 710. The baseplate 710 may be supported by a pillar 714 that extends out of the chamber. That is, in some embodiments, the baseplate 710 and the pillar 714 may be discrete components instead of a single monolithic part as shown in FIG. 4. The pillar 714 may have a central channel for routing electrical connections and fluids (e.g., cooling fluids and inert gasses for the purge flow).

In an embodiment, an insulating layer 715 is disposed over the baseplate 710, and a pedestal 730 (i.e., first portion 730_A and second portion 730_B) are disposed over the insulating layer 715. In an embodiment, coolant channels 731 are provided in the second portion 730_B of the pedestal 730. A wafer 701 is disposed over the pedestal 730.

In an embodiment, an edge ring 720 is provided around the baseplate 710, the insulating layer 715, the pedestal 730, and the wafer 701. The edge ring 720 may be coupled to the baseplate 713 by a fastening mechanism 713, such as a bolt, pin, screw, or the like. In an embodiment, a seal 717 blocks the purge gas from exiting the column out the bottom between a gap between the baseplate 710 and the edge ring 720.

In the illustrated embodiment, the pedestal 730 is in the first position. As such, the shadow ring 735 is supported by the holders 771 and the chamber liner 770. As the pedestal 730 is displaced vertically, the edge ring 720 will engage with the shadow ring 735 and lift the shadow ring 735 off of the holders 771.

Referring now to FIG. 7B, a sectional illustration of the chamber 700 is shown, in accordance with an additional embodiment. In the illustration of FIG. 7B, the insulating layer 715 and the pedestal 730 are omitted in order to more clearly see the construction of the baseplate 710. As shown, the baseplate 710 may include a plurality of channels 711 that provide fluidic routing from a center of the baseplate 710 to an edge of the baseplate 710. In the illustrated embodiment, a plurality of first channels connect the center of the baseplate 710 to a first ring channel, and a plurality of second channels connect the first ring channel to the outer edge of the baseplate 710. In an embodiment, the first channels and the second channels are misaligned from each other. While a specific configuration of channels 711 is shown in FIG. 7B, it is to be appreciated that any channel configuration may be used to route inert gasses from the center of the baseplate 710 to the edge of the baseplate 710.

FIG. 8 illustrates a diagrammatic representation of a machine in the exemplary form of a computer system 800 within which a set of instructions, for causing the machine to perform any one or more of the methodologies described herein, may be executed. In alternative embodiments, the machine may be connected (e.g., networked) to other machines in a Local Area Network (LAN), an intranet, an extranet, or the Internet. The machine may operate in the capacity of a server or a client machine in a client-server network environment, or as a peer machine in a peer-to-peer (or distributed) network environment. The machine may be a personal computer (PC), a tablet PC, a set-top box (STB), a Personal Digital Assistant (PDA), a cellular telephone, a web appliance, a server, a network router, switch or bridge, or any machine capable of executing a set of instructions (sequential or otherwise) that specify actions to be taken by that machine. Further, while only a single machine is illustrated, the term “machine” shall also be taken to include any collection of machines (e.g., computers) that individually or jointly execute a set (or multiple sets) of instructions to perform any one or more of the methodologies described herein.

The exemplary computer system 800 includes a processor 802, a main memory 804 (e.g., read-only memory (ROM), flash memory, dynamic random access memory (DRAM) such as synchronous DRAM (SDRAM) or Rambus DRAM (RDRAM), etc.), a static memory 806 (e.g., flash memory, static random access memory (SRAM), MRAM, etc.), and a secondary memory 818 (e.g., a data storage device), which communicate with each other via a bus 830.

Processor 802 represents one or more general-purpose processing devices such as a microprocessor, central processing unit, or the like. More particularly, the processor 802 may be a complex instruction set computing (CISC) microprocessor, reduced instruction set computing (RISC) microprocessor, very long instruction word (VLIW) microprocessor, processor implementing other instruction sets, or processors implementing a combination of instruction sets. Processor 802 may also be one or more special-purpose processing devices such as an application specific integrated circuit (ASIC), a field programmable gate array (FPGA), a digital signal processor (DSP), network processor, or the like. Processor 802 is configured to execute the processing logic 826 for performing the operations described herein.

The computer system 800 may further include a network interface device 808. The computer system 800 also may include a video display unit 810 (e.g., a liquid crystal display (LCD), a light emitting diode display (LED), or a cathode ray tube (CRT)), an alphanumeric input device 812 (e.g., a keyboard), a cursor control device 814 (e.g., a mouse), and a signal generation device 816 (e.g., a speaker).

The secondary memory 818 may include a machine-accessible storage medium (or more specifically a computer-readable storage medium) 832 on which is stored one or more sets of instructions (e.g., software 822) embodying any one or more of the methodologies or functions described herein. The software 822 may also reside, completely or at least partially, within the main memory 804 and/or within the processor 802 during execution thereof by the computer system 800, the main memory 804 and the processor 802 also constituting machine-readable storage media. The software 822 may further be transmitted or received over a network 820 via the network interface device 808.

While the machine-accessible storage medium 832 is shown in an exemplary embodiment to be a single medium, the term “machine-readable storage medium” should be taken to include a single medium or multiple media (e.g., a centralized or distributed database, and/or associated caches and servers) that store the one or more sets of instructions. The term “machine-readable storage medium” shall also be taken to include any medium that is capable of storing or encoding a set of instructions for execution by the machine and that cause the machine to perform any one or more of the methodologies of the present disclosure. The term “machine-readable storage medium” shall accordingly be taken to include, but not be limited to, solid-state memories, and optical and magnetic media.

In accordance with an embodiment of the present disclosure, a machine-accessible storage medium has instructions stored thereon which cause a data processing system to perform a method of forming a photoresist layer over a substrate in a vacuum chamber. The method includes providing a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature. The method also includes providing an oxidant vapor into the vacuum chamber. A reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate. The substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

Thus, methods for forming a metal oxo photoresist using chemical vapor condensation processes have been disclosed.

Claims

1. A method of forming a photoresist layer over a substrate in a vacuum chamber, comprising: providing a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature; andproviding an oxidant vapor into the vacuum chamber, wherein a reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate, wherein the photoresist layer is a metal oxo containing material, and wherein the substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

2. The method of claim 1, wherein the second temperature is between −40 degrees Celsius and 200 degrees Celsius.

3. The method of claim 1, wherein the metal precursor vapor and the oxidant vapor are provided into the vacuum chamber at the same time.

4. The method of claim 1, wherein the metal precursor vapor and the oxidant vapor are pulsed into the chamber with alternating pulses.

5. The method of claim 4, wherein a first cycle of pulses comprises a first metal precursor vapor and a second cycle of pulses comprises a second metal precursor vapor that is different than the first metal precursor vapor.

6. The method of claim 4, wherein a purge is provided between the pulses of the metal precursor vapor and the oxidant vapor.

7. The method of claim 1, wherein a plasma is turned on in the chamber during one or both of providing the metal precursor vapor and providing the oxidant vapor.

8. The method of claim 1, further comprising a post treatment after formation of the photoresist on the substrate.

9. The method of claim 8, wherein the post treatment includes an anneal at a higher substrate temperature than the second temperature.

10. The method of claim 8, wherein the post treatment includes a plasma treatment.

11. The method of claim 1, wherein the metal precursor comprises tin.

12. The method of claim 1, wherein the oxidant comprises one or more of H2O, O2, N2O, NO, CO2, CO, ethylene glycol, alcohols, peroxides, and acids.

13. A method of forming a photoresist layer over a substrate in a vacuum chamber, comprising: repeating a cycle a plurality of times, wherein the cycle comprises: providing a first pulse of a metal precursor vapor into the vacuum chamber from an ampoule maintained at a first temperature; andproviding a second pulse of an oxidant vapor into the vacuum chamber, wherein a reaction between the metal precursor vapor and the oxidant vapor results in the formation of the photoresist layer on a surface of the substrate, wherein the photoresist layer is a metal oxo containing material, and wherein the substrate is maintained at a second temperature less than the first temperature during the formation of the photoresist layer on the surface of the substrate.

14. The method of claim 13, wherein the first pulse is provided into the chamber before the second pulse.

15. The method of claim 13, wherein the second pulse is provided into the chamber before the first pulse.

16. The method of claim 13, wherein a purge of the chamber is provided between the first pulse and the second pulse.

17. The method of claim 13, wherein the cycle further comprises a plasma treatment.

18. The method of claim 13, wherein a plasma treatment of the photoresist is executed after a plurality of cycles.

19. A semiconductor processing tool, comprising: a chamber;a pedestal within the chamber for supporting a substrate, wherein the pedestal is temperature controlled; andan ampoule fluidically coupled to the chamber, wherein the ampoule is temperature controlled, wherein the pedestal is configured to keep the substrate at a first temperature, and the ampoule is configured to be at a second temperature that is greater than the first temperature.

20. The semiconductor processing tool of claim 19, further comprising: an edge ring around a perimeter of the pedestal; anda shadow mask over the edge ring, wherein a fluidic channel is provided between the edge of the pedestal and the interior of the edge ring.