This invention relates generally to integrated circuits and more particularly to bonding within such integrated circuits.
Integrated circuits are known to include one or more die mounted in a package (e.g., a standard package, surface mount package, ball grid array package, flip-chip package, et cetera). Each die includes a plurality of bonding pads that are coupled, via bonding wires, to bond posts of the package to provide external connectivity to the die or dies. Bonding wires are typically short (e.g., less than 1 centimeter), thin (e.g., less than 30 gage wire), and constructed of aluminum and/or gold to have a small impedance (e.g., less than 0.5 Ohm and 2–20 nano Henries). Thus, for most applications, a bond wire has negligible affects on signals inputted to and/or outputted from the die.
As the frequencies of signals increase, the impedance of a bond wire becomes an issue. For example, at 5 gigahertz, the impedance of a bond wire may be approximately 157 OHMS to 628 OHMS (impedance=2πfL). For RF transceivers, such a large bond wire impedance makes impedance matching of an antenna via an impedance transformation circuit very difficult.
Therefore, a need exists for a low impedance bonding technique for use in high frequency applications.
Generally, the present invention provides a high frequency integrated circuit that includes a die, a package and capacitive bond. The die includes a circuit that processes a high frequency signal and also includes at least one bonding pad coupled to the circuit. The package includes a plurality of bonding posts, at least one of the bonding posts is allocated to the at least one bond pad of the die. A bonding capacitor couples the at least one bond pad on the die to the at least one bond post of the package. As such, the bonding of the die to the package is done using a capacitive bond. Thus, for high frequency applications, the impedance of the bonding is reduced in comparison with a bond wire and thus is well suited for high frequency applications.
The present invention can be more fully described with reference to
The package 14 includes a plurality of pins 24, where each pin has a corresponding bonding post 22. The capacitor 16 includes a 1st plate 26, a 2nd plate 28, and a dielectric 32. As illustrated, the 2nd plate 28 is bonded 30 to the bonding post 22. As also shown, the 1st plate 26 is bonded 30 to the bond pad 20. As such, the circuit 18, which is operably coupled to bonding pad 20, is capacitively coupled to the bonding post 22 and pin 24.
The size of the capacitor 16, both physically and capacitively, is dependent on the particular frequency of use. For example, for a 5 gigahertz signal, and a desire to achieve an effective impedance of 1 OHM, the capacitor 16 has a capacitance value of approximately 31 pico Farads.
As one of average skill in the art will appreciate, the package 14 may be a standard dual inline package, surface mount package, ball grid array package and/or flip-chip package. As one of average skill in the art will also appreciate, the shape of the 1st and 2nd plates 26 and 28 of capacitor 16 may have geometric configurations other than the shape illustrated in
The power amplifier 36 provides the amplified RF signal 48 to the bond pad 20 of die 12. Capacitor 16 operably couples the amplified RF signal 48 to the bond post 22 of the package 14. External to the integrated circuit is an inductor 40, a capacitor 38 and an antenna 42. The inductor 40 in combination with capacitor 16 and capacitor 38 form an impedance transformation circuit. Such an impedance transformation circuit is used to match the impedance of the antenna with the output impedance of the power amplifier and may include variable component. Typically, the power amplifier 36 will have an output impedance of approximately 5 OHMS while the antenna will have an input impedance of approximately 50 OHMS. As such, the size of capacitor 16, capacitor 38 and inductor 40 will be sized to provide the desired impedance matching.
The package 14 includes pin 24 and corresponding bond post 12. As shown, the bond post 22 has an L shape that bends around the package to form a 2nd plate of capacitor 16. Positioned between the bond post 22 and bond pad 20 is a dielectric 32. In this configuration, the bond post 22, the bond pad 20 and the corresponding dielectric 32 form a bonding capacitor. The material used for dielectric 32 will be dependent on the desired capacitance and surface area of bond post 22 and bond pad 20. For example, the dielectric 32 may be air, silicon dioxide, or any other material that exhibits dielectric properties to produce the bonding capacitor.
The process then proceeds to either Step 72 or Step 75. At Step 72, a 1st plate of a capacitor is bonded to the at least one bond pad of the die. The bonding may be done by ultrasonic bonding, ionic bonding, thermal compression bonding and/or any other bonding technique. The process then proceeds to Step 74 where a 2nd plate of the capacitor is bonded to the at least one bonding post of the package.
At Step 75, a dielectric is created (e.g., deposited, etched, placed, formed, etc.) between the at least one bond pad in the at least one bond post to produce a bond capacitor. The bond capacitor provides electrical coupling between the circuit and the corresponding bond post.
The high frequency integrated circuit may be further manufactured to include Steps 76 and 78 and/or Steps 80 and 82. At Step 76, a 1st end of a bond wire is bonded to the at least one of the plurality of bond posts. The process then proceeds to Step 78 where a 2nd end of the bond wire is bonded to the at least one bond pad. In this configuration, the bond wire forms an inductor, which, in combination with the capacitance of the capacitor, forms a tank circuit.
At Step 80, a 1st end of a bond wire is bonded to the at least one of the plurality of bond posts. The process then proceeds to Step 82 where a 2nd end of the bond wire is bonded to a ground pad of the die. In this configuration, the inductance of the bond wire in combination with the capacitance of the capacitor form at least a portion of an impedance transformation circuit.
The preceding discussion has presented a high frequency integrated circuit that utilizes capacitive bonding to couple a die with pins of a package. As such, high frequency signals may be readily transceived between a die and external connections without significant loss due to bonding wires as in previous integrated circuits. As one of average skill in the art will appreciate, other embodiments may be derived from the teaching of the present invention, without deviating from the scope of the claims.
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