Patent Application
20120156890
1. Field of the Invention
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to methods for forming low-k dielectric layers that include air gaps.
2. Description of the Related Art
Integrated circuit geometries have dramatically decreased in size since such devices were first introduced several decades ago. Since then, integrated circuits have generally followed the two year/half-size rule (often called Moore's Law), which means that the number of devices on a chip doubles every two years. Today's fabrication facilities are routinely producing devices having 0.1 micron feature sizes, and tomorrow's facilities soon will be producing devices having even smaller feature sizes.
The continued reduction in device geometries has generated a demand for layers having lower dielectric constant (k) values because the capacitive coupling between adjacent metal lines must be reduced to further reduce the size of devices on integrated circuits. In particular, insulators having low dielectric constants, less than about 4.0, are desirable. Examples of insulators having low dielectric constants include spin-on glass, fluorine-doped silicon glass (FSG), carbon-doped oxide, and polytetrafluoroethylene (PTFE), which are all commercially available.
More recently, low dielectric constant organosilicon layers having k values less than about 3.5 have been developed. One method that has been used to develop low dielectric constant organosilicon layers has been to deposit the layers from a gas mixture comprising an organosilicon compound and a compound comprising thermally labile species or volatile groups and then post-treat the deposited layers to remove the thermally labile species or volatile groups, such as organic groups, from the deposited layers. The removal of the thermally labile species or volatile groups from the deposited layers creates nanometer-sized voids or “air-gaps” in the layers, which lowers the dielectric constant of the layers, e.g., to about 2.5, as air has a dielectric constant of approximately 1. However, the porous characteristics of such dielectric films lead to undesired damage after further integration steps (e.g. etching or chemical mechanical polishing (CMP)).
In view of the continuing decrease in integrated circuit feature sizes and increase in circuit density, there remains a need for a method of forming devices and films that have dielectric layers with even lower dielectric constants.
Embodiments of the present invention generally relate to the fabrication of integrated circuits. More particularly, embodiments of the present invention relate to methods for forming low-k dielectric layers that include an air gap. In one embodiment, a method of processing a substrate is provided. The method comprises disposing a substrate within a processing region, reacting an organosilicon compound, with an oxidizing gas, and a porogen providing precursor in the presence of a plasma to deposit a porogen containing low-k dielectric layer comprising silicon, oxygen, and carbon on the substrate, depositing a porous dielectric capping layer comprising silicon, oxygen and carbon on the porogen containing low-k dielectric layer, and ultraviolet (UV) curing the porogen containing low-k dielectric layer and the porous dielectric capping layer to remove at least a portion of the porogen from the porogen containing low-k dielectric layer through the porous dielectric capping layer to convert the porogen containing low-k dielectric layer to a porous low-k dielectric layer having air gaps.
In another embodiment a method of processing a substrate is provided. The method comprises depositing a porogen containing low-k dielectric layer comprising silicon, oxygen, and carbon on a substrate positioned in a processing region of a processing chamber by a method comprising flowing an organosilicon compound into the processing region at a flow rate between 500 and 1,500 mgm, flowing a porogen providing precursor into the processing region at a flow rate between 1,000 and 2,000 mgm, flowing an oxidizing gas into the processing region at a flow rate between 100 and 500 sccm, and flowing a dilutant into the processing region at a flow rate between 1,500 and 2,200 sccm, wherein the organosilicon compound, the porogen providing precursor, the oxidizing gas, and the dilutant are reacted in the presence of a plasma, depositing a porous dielectric capping layer comprising silicon, oxygen and carbon on the porogen containing low-k dielectric layer by a porogen-free method comprising flowing the organosilicon compound at a flow rate between 500 and 1,500 mgm, flowing the oxidizing gas at a flow rate between 100 and 500 sccm, and flowing the dilutant at a flow rate between 2,400 and 3,400 sccm, wherein the organosilicon compound, the oxidizing gas, and the dilutant are reacted in the presence of a plasma, and ultraviolet (UV) curing the porogen containing low-k dielectric layer and the porous dielectric capping layer to remove at least a portion of the porogen from the porogen containing low-k dielectric layer through the porous dielectric capping layer to convert the porogen containing low-k dielectric layer to a porous low-k dielectric layer having air gaps.
So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.
To facilitate understanding, identical reference numerals have been used, wherever possible, to designate identical elements that are common to the figures. It is contemplated that elements and/or process steps of one embodiment may be beneficially incorporated in other embodiments without additional recitation.
Embodiments of the present invention are described by reference to a method and apparatus for depositing a porous dielectric capping layer over a porogen containing low-k dielectric layer. The dielectric capping layer and the porogen containing low-k dielectric layer may then be exposed to a UV treatment process to liberate and outgas the porogen from the porogen containing low-k dielectric layer through the porous dielectric capping layer converting the porogen containing low-k dielectric layer to a low-k dielectric layer having air gaps.
Low-k dielectric materials based on SiCOH materials formed by methods of plasma-enhanced chemical vapor deposition (PECVD) have been developed. However, as previously discussed, as the size of the electronic devices is reduced, materials with a low dielectric constant (low-k) of less than 2.5 are required for micro-devices. One approach for ultra low-k materials is to fabricate hybrid organic-inorganic films using silicon precursors with organic functional groups chemically attached to silicon atoms. Thereafter, the films are annealed, resulting in the degradation of the weak organic molecules in the hybrid films. However, the porous characteristics of such low-k films (k<2.2) induce undesired damage after further integration steps. Embodiments described herein reduce such undesired damage using a new scheme for capping the porous low-k film. In certain embodiments described herein, a porous in-situ capping layer is deposited over a porogen containing low-k dielectric layer prior to air-gap formation. This porous dielectric capping layer may be a denser low-k film with lower porosity relative to the underlying low-k film resulting in better resistance against integration damage such as plasma treatment during barrier deposition and CMP processes while being permeable enough to allow the porogen to be outgassed to increase the porosity and lower the k value of the underlying dielectric film.
The term “organosilicon compound” as used herein is intended to refer to compounds containing carbon atoms in organic groups, and can be cyclic or linear. Organic groups may include alkyl, alkenyl, cyclohexenyl, and aryl groups in addition to functional derivatives thereof. Preferably, the organosilicon compounds include one or more carbon atoms attached to a silicon atom whereby the carbon atoms are not readily removed by oxidation at suitable processing conditions. The organosilicon compounds may also preferably include one or more oxygen atoms. In certain embodiments, a preferred organosilicon compound has an oxygen to silicon atom ratio of at least 1:1, and more preferably at least 2:1, such as about 4:1.
Suitable cyclic organosilicon compounds include a ring structure having three or more silicon atoms, and optionally one or more oxygen atoms. Commercially available cyclic organosilicon compounds include rings having alternating silicon and oxygen atoms with one or two alkyl groups bonded to the silicon atoms. Some exemplary cyclic organosilicon compounds include: 1,3,5-trisilano-2,4,6-trimethylene, (Si H2CH2—)3-(cyclic); 1,3,5,7-tetramethylcyclotetrasiloxane (TMCTS) (SiHCH3—O—)4-(cyclic); octamethylcyclotetrasiloxane(OMCTS), (Si(CH3)2—O—)4-(cyclic); 1,3,5,7,9-pentamethylcyclopentasiloxane, (SiHCH3—O—)5-(cyclic); 1,3,5,7-tetrasilano-2,6-dioxy-4,8-dimethylene, (SiH2—CH2—SiH2—O—)2-(cyclic); and hexamethylcyclotrisiloxane Si(CH3)2—O—)3-(cyclic).
Suitable linear organosilicon compounds include organosilicon compounds having linear, branched structures, or cyclic side groups with one or more silicon atoms and one or more carbon atoms. The organosilicon compounds may further include one or more oxygen atoms. Some exemplary linear organosilicon compounds include: methylsilane, CH3—SiH3; dimethylsilane, (CH3)2—SiH2; trimethylsilane, (CH3)3—SiH; ethylsilane, CH3—CH2—SiH3; disilanomethane, SiH3—CH2—SiH3; bis(methylsilano)methane, CH3—SiH2—CH2—SiH2—CH3; 1,2-disilanoethane, SiH3—CH2—CH2—SiH3; 1,2-bis(methylsilano)ethane, CH3—SiH2—CH2—CH2—SiH2—CH3; 2,2-disilanopropane, SiH3—C(CH3)2—SiH3; diethoxymethylsilane (DEMS), CH3—SiH—(O—CH2—CH3)2; 1,3-dimethyldisiloxane, CH3; 1,1,3,3-tetramethyldisiloxane, (CH3)2—SiH—O—SiH—(CH3)2; hexamethyldisiloxane (HMDS), (CH3)3—Si—O—Si—(CH3)3; 1,3-bis(silanomethylene)disiloxane, (SiH3—CH2—SiH2—)2—O; bis(1-methyldisiloxanyl)methane, (CH3—SiH2—O—SiH2—)2—CH2; 2,2-bis(1-methyldisiloxanyl)propane, (CH3—SiH2—O—SiH2—)2—C(CH3)2; hexamethoxydisiloxane (HMDOS), (CH3O)3—Si—O—Si—(OCH3)3; dimethyldimethoxysilane (DMDMOS), (CH3O)2—Si—(CH3)2; dimethoxymethylvinylsilane (DMMVS), (CH3O)2—Si—(CH3)—CH2—CH3.
The porogen-providing precursor including one or more organic compounds having at least one cyclic group is referred to as a porogen or porogen material. The term “cyclic group” as used herein is intended to refer to a ring structure. The ring structure may contain as few as three atoms. The atoms may include carbon, silicon, nitrogen, oxygen, fluorine, and combinations thereof, for example. The cyclic group may include one or more single bonds, double bonds, triple bonds, and any combination thereof. For example, a cyclic group may include one or more aromatics, aryls, phenyls, cyclohexanes, cyclohexadienes, cycloheptadienes, and combinations thereof. The cyclic group may also be bi-cyclic or tri-cyclic. Further, the cyclic group is preferably bonded to a linear or branched functional group. The linear or branched functional group preferably contains an alkyl or vinyl alkyl group and has between one and twenty carbon atoms. The linear or branched functional group may also include oxygen atoms, such as a ketone, ether, and ester. Some exemplary compounds having at least one cyclic group include alpha-terpinene (ATP), vinylcyclohexane (VCH), and phenylacetate, just to name a few.
Suitable oxidizing gases include oxygen (O2), ozone (O3), carbon monoxide (CO), carbon dioxide (CO2), water (H2O), 2,3-butane dione or combinations thereof. Disassociation of oxygen or the oxygen containing compounds may occur in a microwave chamber prior to entering the deposition chamber to reduce excessive dissociation of the silicon containing compounds. Preferably, radio frequency (RF) power is applied to the reaction zone to increase dissociation.
Suitable dilutants include non-reactive gases and/or inert gases, for example, helium or argon.
The CVD chamber 100 has a chamber body 102 that defines separate processing regions 118, 120. Each processing region 118, 120 has a pedestal 128 for supporting a substrate (not shown) within the CVD chamber 100. Each pedestal 128 typically includes a heating element (not shown). Preferably, each pedestal 128 is movably disposed in one of the processing regions 118, 120 by a stem 126 which extends through the bottom of the chamber body 102 where it is connected to a drive system 103.
Each of the processing regions 118, 120 also preferably includes a gas distribution assembly 108 disposed through a chamber lid 104 to deliver gases into the processing regions 118, 120. The gas distribution assembly 108 of each processing region normally includes a gas inlet passage 140 which delivers gas from a gas flow controller 119 into a gas distribution manifold 142, which is also known as a showerhead assembly. Gas flow controller 119 is typically used to control and regulate the flow rates of different process gases into the chamber. Other flow control components may include a liquid flow injection valve and liquid flow controller (not shown) if liquid precursors are used. The gas distribution manifold 142 comprises an annular base plate 148, a face plate 146, and a blocker plate 144 between the base plate 148 and the face plate 146. The gas distribution manifold 142 includes a plurality of nozzles (not shown) through which gaseous mixtures are injected during processing. An RF (radio frequency) power supply 125 provides a bias potential to the gas distribution manifold 142 to facilitate generation of a plasma between the showerhead assembly and the pedestal 128. During a plasma-enhanced chemical vapor deposition process, the pedestal 128 may serve as a cathode for generating the RF bias within the chamber body 102. The cathode is electrically coupled to an electrode power supply to generate a capacitive electric field in the CVD chamber 100. Typically an RF voltage is applied to the cathode while the chamber body 102 is electrically grounded. Power applied to the pedestal 128 creates a substrate bias in the form of a negative voltage on the upper surface of the substrate. This negative voltage is used to attract ions from the plasma formed in the CVD chamber 100 to the upper surface of the substrate.
During processing, process gases are uniformly distributed radially across the substrate surface. The plasma is formed from one or more process gases or a gas mixture by applying RF energy from the RF power supply 125 to the gas distribution manifold 142, which acts as a powered electrode. Film deposition takes place when the substrate is exposed to the plasma and the reactive gases provided therein. The chamber walls 112 are typically grounded. The RF power supply 125 can supply either a single or mixed-frequency RF signal to the gas distribution manifold 142 to enhance the decomposition of any gases introduced into the processing regions 118, 120.
A system controller 134 controls the functions of various components such as the RF power supply 125, the drive system 103, the gas flow controller 119, and other associated chamber and/or processing functions. The system controller 134 executes system control software stored in a memory 138, which in the preferred embodiment is a hard disk drive, and can include analog and digital input/output boards, interface boards, and stepper motor controller boards. Optical and/or magnetic sensors are generally used to move and determine the position of movable mechanical assemblies.
The above CVD system description is mainly for illustrative purposes, and other plasma processing chambers may also be employed for practicing embodiments of the invention.
During deposition on a 300 mm substrate, a controlled plasma is typically formed in the chamber adjacent to the substrate by RF energy applied to the showerhead using the RF power supply 125 as depicted in
During deposition, the substrate may be maintained at a temperature between about −20° C. and about 500° C., preferably between about 100° C. and about 450° C. The spacing between the substrate and the manifold may be between about 200 mils and about 1,200 mils. The deposition pressure may be between about 1 Torr and about 20 Torr, preferably between about 4 Torr and about 10 Torr. The deposition rate may be between about 2,000 Å/min. and about 20,000 Å/min.
Deposition of a Porous Dielectric Capping Layer
At block 204, a lining layer may be deposited over the substrate. The lining layer may be a barrier layer deposited by a PECVD process from a plasma comprising a reactive silicon containing compound. The deposition process for the barrier layer can include a capacitively coupled plasma or both a capacitively coupled and inductively coupled plasma formed in the processing region according to embodiments described herein. An inert gas such as helium or argon may be used during plasma formation.
At block 206, a porogen containing low-k dielectric layer is deposited over the substrate. In embodiments where the lining layer is present, the porogen containing low-k dielectric layer may be deposited over the lining layer. The porogen containing low-k dielectric layer may be deposited by depositing a silicon/oxygen containing material that further contains thermally liable organic groups or porogens.
At block 208, a porous dielectric capping layer of the present invention may then be deposited over the porogen containing low-k dielectric layer. The porous dielectric capping layer may be deposited in the same processing region and/or processing chamber as the porogen containing low-k dielectric layer. The porous dielectric capping layer may be deposited using a back-to-back plasma process. The porous dielectric capping layer may be deposited using the same precursors as the porogen containing low-k dielectric layer deposited in block 206, except that the porous dielectric capping layer is generally porogen free. The porous dielectric capping layer may also be deposited using similar processing conditions to the processing conditions used for the porogen containing low-k dielectric layer. The substrate may be removed from the processing chamber and transferred to a UV treatment chamber. The porous dielectric capping layer may be a porous dielectric low-k capping layer. In certain embodiments, the porous dielectric capping layer is a porous oxide dielectric capping layer. One exemplary porous oxide dielectric capping layer is described in US 2003/0224591.
At block 210, the porogen containing low-k dielectric layer and porous dielectric capping layer are exposed to a UV treatment or “curing” process. Exposure of the porogen containing low-k dielectric layer and the porous dielectric capping layer to a UV curing process results in liberation of the porogen containing compound from the porogen containing low-k dielectric layer resulting in the formation of air pockets or “air gaps” within the dielectric layer. The porous dielectric capping layer generally has a lower porosity then the low-k dielectric layer having air-gaps. During the UV curing process, the gaseous porogen containing compound escapes through the porous dielectric capping layer. Therefore it is important that the porous dielectric capping layer be permeable enough to allow the gaseous porogen containing compound to escape while maintaining enough structural integrity to prevent the porous low-k dielectric layer from collapsing during subsequent integration steps.
Referring to
Referring to
Referring to
The porogen containing low-k dielectric layer 302 may have a thickness between about 10 Å and 20,000 Å. Preferably, the porogen containing low-k dielectric layer 302 may have a thickness between about 500 Å and 10,000 Å.
Referring to
The porous dielectric capping layer 312 may have a thickness between about 100 Å and 1,000 Å. Preferably, the porous dielectric capping layer 312 may have a thickness between about 200 Å and 600 Å.
As shown in
An example of an ultra-violet cure process comprises providing a chamber pressure between about 2 torr and about 12 torr, providing a chamber temperature between about 50° C. and about 600° C., a UV source wavelength between about 200 nm and about 300 nm, a helium gas flow rate between about 100 sccm and 20,000 sccm, and optionally, additional gases such as argon, nitrogen, and oxygen or any combination thereof may be provided for the UV process. The UV power may be between about 25% and about 100% and the processing time period may be between about 0 minutes and about 200 minutes. The process may be carried out using a UV system manufactured by Applied Materials, Inc. of Santa Clara, Calif., for example a NanoCure system. Other UV systems, such as the system described in U.S. patent application Ser. No. 11/124,908, filed on May 9, 2005, entitled TANDEM UV CHAMBER FOR CURING DIELECTRIC MATERIALS, published as U.S. 2006/0251827, which is herein incorporated by reference to the extent not inconsistent with the current specification, may also be used. This process may be carried out using a static or dual-sweeping source.
The porous dielectric capping layer may have a porosity from about 10% to about 20% relative to a solid film formed from the same material and the porous low-k dielectric layer having air gaps may have a porosity from about 25% to about 40% relative to a solid film formed from the same material.
Objects and advantages of the embodiments described herein are further illustrated by the following examples. The particular materials and amounts thereof, as well as other conditions and details, recited in these examples should not be used to limit embodiments described herein. The following examples demonstrate deposition of a porous low-k dielectric layer having air-gaps with a porous dielectric capping layer deposited thereon. This example is undertaken using a PRODUCER° system, available from Applied Materials, Inc. of Santa Clara, Calif.
The porous low-k dielectric layer having air gaps and the porous dielectric capping layer were deposited in a back-to-back process using the process conditions depicted in Table II. As shown in Table II, the porous dielectric capping layer was deposited using a porogen free deposition process.
The porogen containing low-k dielectric layer was deposited to a thickness of about 5,000 Å and the porous dielectric capping layer was deposited to a thickness of about 400 Å. Identical silicon containing precursors were used for deposition of the porogen containing low-k dielectric layer and the porous dielectric capping layer.
Certain embodiments described herein provide a new process of in-situ capping for porous low-k dielectric films. The capping layer comprises denser SiCOH materials with low porosity, resulting in improved damage resistance against subsequent integration steps, while it is permeable enough to allow porogen to be outgassed to make low-k films underneath.
While the foregoing is directed to embodiments of the present invention, other and further embodiments of the invention may be devised without departing from the basic scope thereof, and the scope thereof is determined by the claims that follow.
This application claims benefit of U.S. provisional patent application Ser. No. 61/425,020, filed Dec. 20, 2010, which is herein incorporated by reference.
| Number | Date | Country | |
|---|---|---|---|
| 61425020 | Dec 2010 | US |
