Low K interlevel dielectric layer fabrication methods

Abstract
A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. A low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. In a chamber, an interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is plasma enhanced chemical vapor deposited over the substrate at subatmospheric pressure. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen at a subatmospheric pressure effective to reduce the dielectric constant by at least 10% below what it was prior to said exposing. The exposing occurs without removing the substrate from the chamber between the depositing and the exposing, and pressure within the chamber is maintained at subatmospheric between the depositing and the exposing.
Description
TECHNICAL FIELD

This invention relates to methods of forming low k interlevel dielectric layers.


BACKGROUND OF THE INVENTION

In methods of forming integrated circuits, it is frequently desired so to electrically isolate components of the integrated circuits from one another with an insulative material. For example, conductive layers can be electrically isolated from one another by separating them with an insulating material. Insulating material received between two different elevation conductive or component layers is typically referred to as an interlevel dielectric material. Also, devices which extend into a semiconductive substrate can be electrically isolated from one another by insulative materials formed within the substrate between the components, such as for example, trench isolation regions.


One typical insulative material for isolating components of integrated circuits is silicon dioxide, which has a dielectric constant of about 4. Yet in many applications, it is desired to utilize insulative materials having dielectric constants lower than that of silicon dioxide to reduce parasitic capacitance from occurring between conductive components separated by the insulative material. Parasitic capacitance reduction continues to have increasing importance in the semiconductor fabrication industry as device dimensions and component spacing continues to shrink. Closer spacing adversely effects parasitic capacitance.


One way of reducing the dielectric constant of certain inherently insulative materials is to provide some degree of carbon content therein. One example technique for doing so has recently been developed by Trikon Technology of Bristol, UK which they refer to as Flowfill™ Technology. Where more carbon incorporation is desired, methylsilane in a gaseous form and H2O2 in a liquid form are separately introduced into a chamber, such as a parallel plate reaction chamber. A reaction between the methylsilane and H2O2 can be moderated by introduction of nitrogen into the reaction chamber. A wafer is provided within the chamber and ideally maintained at a suitable low temperature, such as 0° C., and at an exemplary pressure of 1 Torr to achieve formation of a methylsilanol structure. Such structure/material condenses on the wafer surface. Although the reaction occurs in the gas phase, the deposited material is in the form of a viscous liquid which flows to fill small gaps on the wafer surface. In applications where deposition thickness increases, surface tension drives the deposited layer flat, thus forming a planarized layer over the substrate.


The liquid methylsilanol is converted to a silicon dioxide structure by a two-step process occurring in two separate chambers from that in which the silanol-type structure was deposited. First, planarization of the liquid film is promoted by increasing the temperature to above 100° C., while maintaining the pressure at about 1 Torr, to result in solidification and formation of a polymer layer. Thereafter, the temperature is raised to approximately 450° C., while maintaining a pressure of about 1 Torr, to form (CH3)xSiOy. The (CH3)xSiOy has a dielectric constant of less than or equal to about 3, and is accordingly less likely to be involved in parasitic capacitance than silicon dioxide and/or phosphorous doped silicon dioxide.


Nevertheless, it would be desirable to develop improved methods for reducing parasitic capacitance of interlevel dielectric layers which comprise carbon and regardless of the method of manufacture of such layers.


SUMMARY

The invention comprises methods of forming low k interlevel dielectric layers. In one implementation, a low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An oxide comprising interlevel dielectric layer comprising carbon and having a dielectric constant no greater than 3.5 is formed over the substrate. After forming the carbon comprising dielectric layer, it is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing.


In one implementation, a low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An interlevel dielectric layer comprising a compound having silicon bonded to both nitrogen and an organic material and having a dielectric constant no greater than 8.0 is formed over the substrate. After forming the dielectric layer, it is exposed to a plasma comprising nitrogen effective to reduce the dielectric constant to below what it was prior to said exposing.


In one implementation, a low k interlevel dielectric layer fabrication method includes providing a substrate having integrated circuitry at least partially formed thereon. An interlevel dielectric layer comprising a compound having silicon bonded to both nitrogen and an organic material and having a dielectric constant no greater than 8.0 over is formed over the substrate. After forming the dielectric layer, it is exposed to a plasma comprising nitrogen effective to reduce the dielectric constant to below what it was prior to said exposing.





BRIEF DESCRIPTION OF THE DRAWINGS

Preferred embodiments of the invention are described below with reference to the following accompanying drawings.



FIG. 1 is a diagrammatic view of a semiconductor wafer fragment at one processing step in accordance with the invention.



FIG. 2 is a view of the FIG. 1 wafer at a processing step subsequent to that shown by FIG. 1.





DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

This disclosure of the invention is submitted in furtherance of the constitutional purposes of the U.S. Patent Laws “to promote the progress of science and useful arts” (Article 1, Section 8).


Referring to FIG. 1, an exemplary semiconductor wafer fragment or substrate in process is indicated generally with reference numeral 10. In the context of this document, the term “semiconductor substrate” or “semiconductive substrate” is defined to mean any construction comprising semiconductive material, including, but not limited to, bulk semiconductive materials such as a semiconductive wafer (either alone or in assemblies comprising other materials thereon), and semiconductive material layers (either alone or in assemblies comprising other materials). The term “substrate” refers to any supporting structure, including, but not limited to, the semiconductive substrates described above.


Substrate 10 comprises a bulk monocrystalline silicon substrate 12 having trench isolation oxide regions 14 formed therein. Integrated circuitry is at least partially formed thereon in the illustrated example in the form of a pair of transistors 16 and 18. Transistors 16 and 18 can comprise conventional constructions, such as overlying layers of gate oxide, polysilicon and silicide. Insulative spacers 20 are formed adjacent transistor gates 16 and 18. Conductively doped diffusion regions 22, 24 and 26 are formed within substrate 12 and proximate gates 16 and 18.


Referring to FIG. 2 and in accordance with but one aspect of the invention, an interlevel dielectric layer 30 comprising carbon and having a dielectric constant no greater than 3.5 is formed over the FIG. 1 substrate where layer 30 comprises oxide material. Such layer might be formed by a number of methods. One example preferred method includes the Flowfill™ technique referred to above, whereby the formed interlevel dielectric level comprises or ultimately consists essentially of (CH3)xSiOy, where x ranges from 1 to 3, and y ranges from 0-2. Such provides but one example where the dielectric layer formed comprises silicon bonded to organic material. Other dielectric layers, as well as the same or other layers, fabricated by different methods are also contemplated.


By way of example only, example preferred alternate methods of producing an interlevel dielectric layer at this point in the process are now described. Such encompass methods of forming insulative materials comprising carbon, silicon and oxygen. In one example, a first gaseous precursor compound comprising carbon and silicon is combined with a second gaseous precursor compound comprising oxygen to form a second compound comprising carbon, silicon and oxygen. The first compound can comprise, for example, (CH3)ySiHx, wherein y is an integer of from 1 to 4 and x is an integer from 0 to 3. The second precursor compound is an oxygen-containing moiety that is preferably a “dry” compound (i.e., a compound that does not either contain water or decompose to form water), and can comprise, for example, N2O, or an activated oxygen species (e.g., high energy O2, monatomic oxygen, or oxygen radicals). Such provides but one example process whereby water formation is avoided. In one example, the oxygen-containing moiety is generated by exposing O2 to ultra-violet light (a process which can generate, for example, activated oxygen species in the form of O3). In another aspect, the oxygen-containing moiety is generated by exposing an oxygen-containing gas (e.g., O3, O2 N2O, CO, or CO2) to a plasma. The plasma can be within the reaction chamber or remote from the chamber (i.e., not in the chamber). In another example, a compound comprising silicon, carbon and oxygen is formed by reaction of SiH4 with an organic compound comprising oxygen (e.g., CO or CO2).


In a more specific example, methylsilane or trimethylsilane is combined with N2O in a reaction chamber. A pressure within the chamber is maintained at from about 300 mTorr to about 30 Torr, and is preferably maintained at from about 1 Torr to about 10 Torr. An exemplary reaction chamber comprises a spacing from about 400 mils to about 600 mils with methylsilane being flowed into the chamber at a rate from about 25 standard cubic centimeters per minute (sccm) to about 2000 sccm (preferably at from about 50 sccm to about 250 sccm). The N2O is flowed into the reaction chamber at a rate from about 50 sccm to about 3000 sccm (preferably at a rate from about 100 sccm to about 1500 sccm, and more preferably at a rate of from about 500 sccm to about 1200 sccm), and, additionally, helium is flowed into the reaction chamber at a rate of about 500 sccm to about 5000 sccm (preferably from 1000 sccm to about 3000 sccm). A radio frequency (RF) power within the chamber is maintained at from about 50 watts to about 500 watts, and preferably from about 100 watts to about 200 watts. The semiconductor substrate (such as a monocrystalline silicon wafer) is provided within the chamber and maintained at a temperature from about 25° C. to about 450° C.


The above-described processing forms (CH3)xSiOy over a substrate. The concentration of methyl groups within the (CH3)xSiOy is typically from about 10% to about 50% (mole percent), i.e., where x equals or ranges from about 1 to about 3, and y ranges from 0 to about 2. Alternately by way of example only, x can be from about 0.1 to about 1, i.e., the concentration of methyl groups can be from about 5% to about 50% molar. In a particular example, a plasma can be generated within the chamber at a RF power of from about 50 watts to about 500 watts (preferably from about 80 watts to about 200 watts).


Such describes but one example process of forming an interlevel dielectric layer, here by chemical vapor deposition with or without plasma in a chemical vapor deposition chamber. In but another considered example, a gaseous precursor compound is introduced into a chemical vapor deposition reaction chamber and subjected to a plasma treatment. A semiconductor substrate is provided in the chamber, and material comprising carbon and silicon is deposited from the plasma-treated precursor compound to over the substrate. After the material is deposited, it is exposed to an oxygen containing moiety and converted to a second material comprising silicon, carbon and oxygen.


In a more specific example, methylsilane is flowed into a reaction chamber at a pressure of from 300 mTorr to about 30 Torr (preferably from about 1 Torr to about 10 Torr) and subjected to a plasma formed at a power of from about 50 watts to about 500 watts (preferably from 100 watts to about 200 watts). A semiconductor substrate is provided in the reaction chamber and maintained at a temperature of about 0° C. to about 600° C. The plasma treated methylsilane deposits a material comprising methyl groups and silicon over the substrate. The deposited material is then exposed to an oxygen-containing moiety to convert the material to (CH3)xSiOy. Accordingly in this example from the oxygen exposure, a whole of the deposited dielectric layer is transformed from one base chemistry (i.e., that comprising a nondescript combination of methyl groups and silicon) to another base chemistry (i.e., (CH3)xSiOy) by the oxygen exposure. The oxygen-containing moiety is preferably in gaseous form, and can comprise, for example ozone, O2 and/or N2O. In particular embodiments, the oxygen-containing moiety is subjected to plasma, heat or ultra-violet light. The oxygen treatment preferably occurs at a pressure of from about 300 mTorr to about 1 atmosphere, with the deposited material being maintained at a temperature of from about 0° C. to about 600° C. during the oxygen treatment to convert the base chemistry to (CH3)xSiOy.


The above-described processings are again only example preferred techniques of forming the preferred interlevel dielectric layer material comprising carbon, here in the form of CH3, and here producing a if preferred layer of (CH3)xSiOy. Alternate interlevel dielectric materials comprising carbon are of course contemplated. Further and by way of example only, the deposited interlevel dielectric layer at this point in the process might comprise silicon atoms bonded to both organic material and nitrogen, for example as described below.


After forming carbon comprising dielectric layer 30, in but one aspect of the invention, such layer is exposed to a plasma comprising oxygen effective to reduce the dielectric constant to below what it was prior to said exposing. Preferably, the exposing is at subatmospheric pressure to reduce the dielectric constant by at least 10%, and even more preferably by at least 15%, below what it was prior to said exposing. In a most preferred embodiment, the method by which the interlevel dielectric layer is initially formed is by plasma enhanced chemical vapor deposition in a chamber, with the subsequent exposing of the plasma occurring in subatmospheric pressure in the same chamber. Further, the substrate is preferably not removed from the chamber between the depositing and the exposing. Further, the pressure within the chamber is preferably maintained at subatmospheric between the depositing and the exposing. Further, the exposing is ideally effective to increase stability of the dielectric constant to variation from what the stability was prior to the exposing. Specifically, stability of the dielectric constant of interlevel dielectric materials can have a tendency to increase over time or when exposed to subsequent thermal processing of at least 400° C. Ideally, the exposing is also effective to increase the stability of the dielectric constant of such film.


Exemplary processing in accordance with the invention has been achieved whereby a predominately (CH3)xSiOy interlevel dielectric layer after the exposing had a dielectric constant reduced from 3.0 to about 2.5 or 2.0.


The preferred wafer surface temperature during the exposing is always less than or equal to 550° C., with the exposing also preferably being conducted at subatmospheric pressure. The oxygen comprising plasma is preferably derived at least in part from at least one of O2, O3, N2O, and NOx. Preferred parameters for the exposing in a dual plate capacitively coupled reactor include an RF power range of from 300 to 1000 watts, a pressure range of from 1 Torr to 6 Torr, a temperature range of from 100° C. to 450° C., a spacing between the plates of from 400 to 600 mils, an oxygen gas exposure flow of from 500 to 1500 sccm, an inert gas flow (i.e., He and/or Ar) of from 200 sccm to 800 sccm, and a treatment time of from 20 to 100 to more seconds. It is a preferred intent of the exposing to further not transform the whole or all of the dielectric layer from one base chemistry to another base chemistry by the exposing. An outermost portion of the exposed layer might experience a slight reduction in carbon content, but otherwise that portion and the whole of the layer is not transformed from one fundamental material to another even in spite of the low k reducing or resulting property. In one preferred aspect of the invention, the exposing comprises at least 20 seconds of processing time. More preferably and in preferred sequence, the processing comprises at least 40 seconds, 60 seconds, 80 seconds, and 100 seconds of oxygen containing plasma exposure. The plasma exposing is preferably ineffective to appreciably etch the interlevel dielectric layer.


Where the invention is conducted in situ in a plasma enhanced chemical vapor deposition chamber subsequent to the deposition, the exposing might comprise substantially ceasing feeding of one of the reactive gases while maintaining a feed of one of the precursors which comprises oxygen, and thereby maintaining plasma conditions from the deposition through an extended exposure time with the oxygen containing precursor to achieve the exposing effect.


In another considered aspect of the invention, a nitride comprising interlevel dielectric layer 30 is formed over the substrate to also comprise carbon and having a dielectric constant no greater than 8.0. More preferred, interlevel dielectric layer 30 comprises a compound having silicon bonded to both nitrogen and an organic material and having a dielectric constant no greater than 8.0. After forming such dielectric layer, it is exposed to a plasma comprising nitrogen effective to reduce the dielectric constant to below what it was prior to said exposing, and preferably at least 15% below what it was prior to the exposing. By way of example only, a preferred deposited interlevel dielectric layer material comprises or consists essentially of (CH3)xSi3N(4−x), wherein x is greater than 0 and no greater than 4. Such a composition can be formed by, for example, reacting inorganic silane with one or more of ammonia (NH3), hydrazine (N2H4), or a combination of nitrogen (N2) and hydrogen (H2). The reaction can occur with or without plasma. However, if the reaction comprises an organic silane in combination with dinitrogen and dihydrogen, the reaction preferably occurs in the presence of plasma.


An exemplary specific reaction is to combine methylsilane (CH3SiH3) with NH3 in the presence of a plasma to form (CH3)xSi3N(4-x). The exemplary reaction can occur, for example, under the following conditions. A substrate is placed within a reaction chamber of a reactor, and a surface of the substrate is maintained at a temperature of from about 0° C. to about 600° C. Ammonia and methyl silane are flowed into the reaction chamber, and a pressure within the chamber is maintained at from about 300 mTorr to about 30 Torr, with a plasma at a radio frequency (RF) power of from about 50 watts to about 500 watts. A product comprising (CH3)xSi3N(4-x) is then formed and deposited on the substrate.


Using this particular described example, it was found that the product deposited from the described reaction consists essentially of (CH3)xSi3N(4−x), (wherein x is generally about 1). The (CH3)xSi3N(4-x) is present in the product to a concentration of from greater than 0% to about 50% (mole percent) and is preferably from about 10% to about 20%. The amount of (CH3)xSi3N(4-x) present in the product can be adjusted by providing a feed gas of SiH4 in the reactor in addition to the CH3SiH3, and by varying a ratio of the SiH4 to the CH3SiH3, and/or by adjusting RF power.


The above provides but only one example of forming an interlevel dielectric layer comprising a compound having silicon bonded to both nitrogen and an organic material. Other methods of forming the same or different materials are of course contemplated.


After forming the dielectric layer, the nitrogen comprising plasma to which the layer is exposed preferably comprises one or more of N2, NH3, N2H4, N2O, and NOx. More preferably, the plasma exposing is preferably void of oxygen atoms therein. Wherein the dielectric layer is formed by chemical vapor deposition in a chamber, such as described above, the exposing preferably occurs within the chamber without removing the substrate from the chamber between the forming and the exposing. Again, the plasma exposing like in the first described example is preferably conducted to be ineffective to appreciably etch the interlevel dielectric layer. Further, a whole of the dielectric layer subjected to the exposing is preferably not transformed from one base chemistry to another by the exposing. Preferred temperature, pressure, power, space arrangements, flows, and treatment times are as described above with respect to the first described embodiments. Further, forming an oxide comprising interlevel dielectric layer comprising silicon atoms bonded to both organic material and nitrogen is contemplated.


In compliance with the statute, the invention has been described in language more or less specific as to structural and methodical features. It is to be understood, however, that the invention is not limited to the specific features shown and described, since the means herein disclosed comprise preferred forms of putting the invention into effect. The invention is, therefore, claimed in any of its forms or modifications within the proper scope of the appended claims appropriately interpreted in accordance with the doctrine of equivalents.

Claims
  • 1. A method for forming an insulative layer having a relatively low dielectric constant comprising: providing a substrate, having integrated circuitry at least partially formed thereon, into a chemical vapor deposition chamber; chemical vapor depositing a first material comprising carbon and silicon on the integrated circuitry, the deposited first material being formed via exposing a gaseous precursor compound comprising carbon and silicon to a plasma; after chemical vapor depositing, converting the whole first material to form the insulative layer comprising carbon, silicon and oxygen by exposing the first material to a dry oxygen-containing moiety; and after the converting, exposing the insulative layer to an oxygen-comprising plasma effective to reduce a dielectric constant of the insulative layer compared to the dielectric constant prior to exposing the insulative layer.
  • 2. The method of claim 1, where chemical vapor depositing includes chemical vapor depositing where the gaseous precursor compound is a methylsilane compound.
  • 3. The method of claim 1, where converting comprises exposing the first material to the dry oxygen-containing moiety selected from a group consisting of oxygen, nitrous oxide and mixtures thereof.
  • 4. The method of claim 1, wherein: chemical vapor depositing includes chemical vapor depositing using a methylsilane compound as the gaseous precursor compound; and converting comprises exposing the first material to the dry oxygen-containing moiety selected from a group consisting of oxygen, nitrous oxide and mixtures thereof.
  • 5. The method of claim 1, where converting comprises exposing the first material to O2.
  • 6. The method of claim 1, where converting comprises exposing the first material to N2O.
  • 7. The method of claim 1, where converting the first material comprises exposing to a plasma, heat, ultra-violet light or combinations thereof.
  • 8. The method of claim 7, further comprising maintaining pressure in a range extending from about 300 mTorr to about 1 atmosphere during exposing to convert the first material.
  • 9. The method of claim 1, where converting the first material comprises exposing the first material to a plasma.
  • 10. The method of claim 1, further comprising maintaining the chemical vapor deposition chamber at a pressure in a range extending from about 300 mTorr to about 30 Torr during chemical vapor depositing.
  • 11. The method of claim 1, further comprising maintaining the chemical vapor deposition chamber at a pressure in a range extending from about 1 Torr to about 10 Torr during chemical vapor depositing.
  • 12. The method of claim 1, where exposing the gaseous precursor compound comprises forming a plasma of the gaseous precursor compound at a power of from about 50 watts to about 500 watts.
  • 13. The method of claim 12, further comprising maintaining the chemical vapor deposition chamber at a pressure in a range extending from about 1 Torr to about 10 Torr during chemical vapor depositing.
  • 14. The method of claim 1, where converting at least some of the first material comprises converting at least some of the first material to (CH3)xSiOy.
  • 15. The method of claim 2, where converting at least some of the first material comprises converting at least some of the first material to consist essentially of (CH3)xSiOy.
  • 16. The method of claim 2 wherein the insulative layer subjected to the exposing comprises silicon atoms bonded to both organic material and nitrogen.
  • 17. The method of claim 1, wherein exposing the insulative layer occurs at subatmospheric pressure.
RELATED PATENT DATA

This patent resulted from a divisional application of U.S. patent application Ser. No. 09/388,826, filed on Sep. 1, 1999, the disclosure of which is incorporated by reference.

US Referenced Citations (199)
Number Name Date Kind
4158717 Nelson Jun 1979 A
4444617 Whitcomb Apr 1984 A
4474975 Clemons et al. Oct 1984 A
4523214 Hirose et al. Jun 1985 A
4552783 Stoll et al. Nov 1985 A
4562091 Sachdev et al. Dec 1985 A
4592129 Legge Jun 1986 A
4600671 Saitoh et al. Jul 1986 A
4648904 DePasquale et al. Mar 1987 A
4695859 Guha et al. Sep 1987 A
4702936 Maeda et al. Oct 1987 A
4755478 Abernathey et al. Jul 1988 A
4764247 Leveriza et al. Aug 1988 A
4805683 Magdo et al. Feb 1989 A
4833096 Huang et al. May 1989 A
4863755 Hess et al. Sep 1989 A
4870470 Bass, Jr. et al. Sep 1989 A
4910160 Jennings et al. Mar 1990 A
4940509 Tso et al. Jul 1990 A
4954867 Hosaka Sep 1990 A
4971655 Stefano et al. Nov 1990 A
4992306 Hochberg et al. Feb 1991 A
5034348 Hartswick et al. Jul 1991 A
5036383 Mori Jul 1991 A
5061509 Naito et al. Oct 1991 A
5140390 Li et al. Aug 1992 A
5219613 Fabry et al. Jun 1993 A
5234869 Mikata et al. Aug 1993 A
5244537 Ohnstein Sep 1993 A
5260600 Harada Nov 1993 A
5270267 Quellet Dec 1993 A
5286661 de Fresart et al. Feb 1994 A
5302366 Schuette et al. Apr 1994 A
5312768 Gonzalez May 1994 A
5314724 Tsukune et al. May 1994 A
5340621 Matsumoto et al. Aug 1994 A
5356515 Tahara et al. Oct 1994 A
5376591 Maeda et al. Dec 1994 A
5405489 Kim et al. Apr 1995 A
5413963 Yen et al. May 1995 A
5429987 Allen Jul 1995 A
5439838 Yang Aug 1995 A
5441797 Hogan Aug 1995 A
5461003 Havemann et al. Oct 1995 A
5470772 Woo Nov 1995 A
5472827 Ogawa et al. Dec 1995 A
5472829 Ogawa Dec 1995 A
5482894 Havemann Jan 1996 A
5498555 Lin Mar 1996 A
5536857 Narula et al. Jul 1996 A
5541445 Quellet Jul 1996 A
5543654 Dennen Aug 1996 A
5554567 Wang Sep 1996 A
5591494 Sato et al. Jan 1997 A
5591566 Ogawa Jan 1997 A
5593741 Ikeda Jan 1997 A
5600165 Tsukamoto et al. Feb 1997 A
5639687 Roman et al. Jun 1997 A
5641607 Ogawa et al. Jun 1997 A
5648202 Ogawa et al. Jul 1997 A
5652187 Kim et al. Jul 1997 A
5656330 Niiyama et al. Aug 1997 A
5656337 Park et al. Aug 1997 A
5661093 Ravi et al. Aug 1997 A
5667015 Harestad et al. Sep 1997 A
5670297 Ogawa et al. Sep 1997 A
5674356 Nagayama Oct 1997 A
5677015 Hasegawa Oct 1997 A
5677111 Ogawa Oct 1997 A
5691212 Tsai et al. Nov 1997 A
5698352 Ogawa et al. Dec 1997 A
5709741 Akamatsu et al. Jan 1998 A
5710067 Foote Jan 1998 A
5711987 Bearinger et al. Jan 1998 A
5731242 Parat et al. Mar 1998 A
5741721 Stevens Apr 1998 A
5744399 Rostoker et al. Apr 1998 A
5747388 Küsters et al. May 1998 A
5750442 Juengling May 1998 A
5753320 Mikoshiba et al. May 1998 A
5759755 Park et al. Jun 1998 A
5783493 Yeh et al. Jul 1998 A
5786039 Brouquet Jul 1998 A
5792689 Yang et al. Aug 1998 A
5800877 Maeda et al. Sep 1998 A
5801399 Hattori et al. Sep 1998 A
5807660 Lin et al. Sep 1998 A
5817549 Yamazaki et al. Oct 1998 A
5831321 Nagayama Nov 1998 A
5838052 McTeer Nov 1998 A
5840610 Gilmer et al. Nov 1998 A
5858880 Dobson et al. Jan 1999 A
5872035 Kim et al. Feb 1999 A
5872385 Taft et al. Feb 1999 A
5874367 Dobson Feb 1999 A
5883011 Lin et al. Mar 1999 A
5883014 Chen et al. Mar 1999 A
5933721 Hause et al. Aug 1999 A
5948482 Brinker et al. Sep 1999 A
5960289 Tsui et al. Sep 1999 A
5962581 Hayase et al. Oct 1999 A
5968324 Cheung et al. Oct 1999 A
5968611 Kaloyeros et al. Oct 1999 A
5981368 Gardner et al. Nov 1999 A
5985519 Kakamu et al. Nov 1999 A
5986318 Kim et al. Nov 1999 A
5994217 Ng Nov 1999 A
5994730 Shrivastava et al. Nov 1999 A
6001741 Alers Dec 1999 A
6001747 Annapragada Dec 1999 A
6004850 Lucas et al. Dec 1999 A
6008121 Yang et al. Dec 1999 A
6008124 Sekiguchi et al. Dec 1999 A
6017614 Tsai et al. Jan 2000 A
6017779 Miyasaka Jan 2000 A
6020243 Wallace et al. Feb 2000 A
6022404 Ettlinger et al. Feb 2000 A
6028015 Wang et al. Feb 2000 A
6030901 Hopper et al. Feb 2000 A
6040619 Wang et al. Mar 2000 A
6054379 Yau et al. Apr 2000 A
6057217 Uwasawa May 2000 A
6060765 Maeda May 2000 A
6060766 Mehta et al. May 2000 A
6071799 Park et al. Jun 2000 A
6072227 Yau et al. Jun 2000 A
6087064 Lin et al. Jul 2000 A
6087267 Dockrey et al. Jul 2000 A
6096656 Matzke et al. Aug 2000 A
6114255 Juengling Sep 2000 A
6121133 Iyer et al. Sep 2000 A
6124641 Matsuura Sep 2000 A
6130168 Chu et al. Oct 2000 A
6133096 Su et al. Oct 2000 A
6133613 Yao et al. Oct 2000 A
6133618 Steiner Oct 2000 A
6136636 Wu Oct 2000 A
6140151 Akram Oct 2000 A
6140677 Gardner et al. Oct 2000 A
6143670 Cheng et al. Nov 2000 A
6153504 Shields et al. Nov 2000 A
6156674 Li Dec 2000 A
6159804 Gardner et al. Dec 2000 A
6159871 Loboda et al. Dec 2000 A
6184151 Adair et al. Feb 2001 B1
6184158 Shufflebotham et al. Feb 2001 B1
6187657 Xiang et al. Feb 2001 B1
6187694 Cheng et al. Feb 2001 B1
6198144 Pan et al. Mar 2001 B1
6200835 Manning Mar 2001 B1
6200863 Xiang et al. Mar 2001 B1
6204168 Naik et al. Mar 2001 B1
6209484 Huang et al. Apr 2001 B1
6218292 Foote Apr 2001 B1
6225217 Usami et al. May 2001 B1
6235568 Murthy et al. May 2001 B1
6235591 Balasubramanian et al. May 2001 B1
6238976 Noble et al. May 2001 B1
6268282 Sandhu et al. Jul 2001 B1
6274292 Holscher et al. Aug 2001 B1
6281100 Yin et al. Aug 2001 B1
6284677 Hsiao et al. Sep 2001 B1
6348407 Gupta et al. Feb 2002 B1
6373114 Jeng et al. Apr 2002 B1
6403464 Chang Jun 2002 B1
6429115 Tsai et al. Aug 2002 B1
6432791 Hutter et al. Aug 2002 B1
6435943 Chang et al. Aug 2002 B1
6436808 Ngo et al. Aug 2002 B1
6440860 DeBoer et al. Aug 2002 B1
6444593 Ngo et al. Sep 2002 B1
6465372 Xia et al. Oct 2002 B1
6486057 Yeh et al. Nov 2002 B1
6486061 Xia et al. Nov 2002 B1
6492688 Ilg Dec 2002 B1
6498084 Bergemont Dec 2002 B1
6503818 Jang Jan 2003 B1
6518122 Chan et al. Feb 2003 B1
6627535 MacNeil et al. Apr 2003 B1
6632712 Ang et al. Oct 2003 B1
6638875 Han et al. Oct 2003 B1
6720247 Kirkpatrick et al. Apr 2004 B1
6723631 Noguchi et al. Apr 2004 B1
6790778 Cheng et al. Sep 2004 B1
20010003064 Ohto Jun 2001 A1
20010019868 Gonzalez et al. Sep 2001 A1
20010038919 Berry, III et al. Nov 2001 A1
20020016085 Huang et al. Feb 2002 A1
20020033486 Kim et al. Mar 2002 A1
20020081834 Daniels et al. Jun 2002 A1
20030013311 Chang et al. Jan 2003 A1
20030077916 Xu et al. Apr 2003 A1
20030126671 Smith et al. Sep 2003 A1
20030164354 Hsieh et al. Sep 2003 A1
20030173671 Hironaga et al. Sep 2003 A1
20030207594 Catabay et al. Nov 2003 A1
20040071878 Schuhmacher et al. Apr 2004 A1
20040173671 Shishida et al. Sep 2004 A1
20050023691 Watanabe et al. Feb 2005 A1
Foreign Referenced Citations (30)
Number Date Country
0 471 185 Jul 1991 EP
0 464 515 Aug 1992 EP
0 464 515 Aug 1992 EP
0 588 087 Aug 1993 EP
0 588 087 Aug 1993 EP
0 778 496 May 1996 EP
0 771 886 Jul 1997 EP
0 942330 Sep 1999 EP
1 172 845 Jan 2002 EP
593727 Oct 1947 GB
63-157443 Jun 1988 JP
63316476 Dec 1988 JP
5-263255 Oct 1993 JP
406244172 Sep 1994 JP
7201716 Aug 1995 JP
8046186 Feb 1996 JP
8051058 Feb 1996 JP
08-0452926 Feb 1996 JP
8078322 Mar 1996 JP
08-213386 Aug 1996 JP
09-050993 Feb 1997 JP
09050993 Feb 1997 JP
09055351 Feb 1997 JP
10-163083 Jun 1998 JP
06067019 Sep 1999 JP
2000068261 Mar 2000 JP
368687 Sep 1999 TW
420844 Feb 2001 TW
429473 Apr 2001 TW
471112 Jan 2002 TW
Related Publications (1)
Number Date Country
20020098684 A1 Jul 2002 US
Divisions (1)
Number Date Country
Parent 09388826 Sep 1999 US
Child 10102110 US