METHOD AND APPARATUS FOR FABRICATING A HIGH DIELECTRIC CONSTANT TRANSISTOR GATE USING A LOW ENERGY PLASMA SYSTEM

Abstract

The present invention generally provides methods and apparatuses that are adapted to form a high quality dielectric gate layer on a substrate. Embodiments contemplate a method wherein a metal plasma treatment process is used in lieu of a standard nitridization process to form a high dielectric constant layer on a substrate. Embodiments further contemplate an apparatus adapted to “implant” metal ions of relatively low energy in order to reduce ion bombardment damage to the gate dielectric layer, such as a silicon dioxide layer and to avoid incorporation of the metal atoms into the underlying silicon. In general, the process includes the steps of forming a high-k dielectric and then terminating the surface of the deposited high-k material to form a good interface between the gate electrode and the high-k dielectric material. Embodiments of the invention also provide a cluster tool that is adapted to form a high-k dielectric material, terminate the surface of the high-k dielectric material, perform any desirable post treatment steps, and form the polysilicon and/or metal gate layers.

Description

BRIEF DESCRIPTION OF THE DRAWINGS

So that the manner in which the above recited features of the present invention can be understood in detail, a more particular description of the invention, briefly summarized above, may be had by reference to embodiments, some of which are illustrated in the appended drawings. It is to be noted, however, that the appended drawings illustrate only typical embodiments of this invention and are therefore not to be considered limiting of its scope, for the invention may admit to other equally effective embodiments.

FIG. 1A (prior art) is a schematic cross-sectional view of FET and can be produced in accordance with the present invention.

FIG. 1B (prior art) is a graph showing nitrogen concentration profiles, based on secondary ion mass spectroscopy data, for a conventional thermal nitridation process and for a conventional plasma nitridation process.

FIG. 2A is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIG. 2B is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIG. 2C is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIG. 2D is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIG. 2E is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIG. 2F is a process flow diagram illustrating a method for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIGS. 3A-3F illustrate a series of schematic cross-sectional views of a substrate upon which a gate structure is fabricated using the method of FIG. 2A.

FIG. 4A illustrates a schematic cross-sectional view of a plasma treatment chamber according to another embodiment of the invention.

FIG. 4B illustrates a schematic cross-sectional view of a plasma treatment chamber according to another embodiment of the invention.

FIG. 4C illustrates a schematic cross-sectional view of a plasma treatment chamber according to one embodiment of the invention.

FIG. 4D is a table of theoretical calculations that illustrate the various properties of a hafnium and lanthanum targets according to one embodiment of the invention.

FIG. 4E is a graph of self-bias voltage versus frequency for a capacitively coupled plasma processing chamber according to one embodiment of the invention.

FIG. 4F illustrates a schematic cross-sectional view of a plasma processing chamber according to one embodiment of the invention.

FIG. 4G illustrates a schematic cross-sectional view of a plasma processing chamber according to one embodiment of the invention.

FIG. 4H illustrates a schematic cross-sectional view of a plasma processing chamber according to one embodiment of the invention.

FIG. 5A illustrates the timing of the off-cycle of the pulsed RF/VHF excitation energy and pulsed DC voltage applied to a target according to another embodiment of the invention.

FIG. 5B illustrates the timing of the off-cycle of the pulsed RF/VHF excitation energy and pulsed DC voltage applied to a target according to another embodiment of the invention.

FIG. 5C illustrates the timing of the off-cycle of the pulsed DC voltage and continuous RF/VHF energy applied to a target according to another embodiment of the invention.

FIG. 6A is a process flow diagram illustrating a method 100 for fabricating a gate dielectric of a field effect transistor in accordance with one embodiment of the present invention.

FIGS. 6B-6G illustrate a series of schematic cross-sectional views of a substrate upon which a gate structure is fabricated using the method of FIG. 6A.

FIG. 7 illustrates an integrated processing system according to one embodiment of the invention.

Claims

1. A method of forming a semiconductor device, comprising: forming a dielectric layer having a desired thickness on a surface of a substrate;disposing an amount of a first material within the dielectric layer to form a concentration gradient through at least a portion of the thickness of the formed dielectric layer using a low energy sputtering process, wherein the low energy sputtering process comprises providing an RF energy at a first RF frequency and a first RF power to a processing region of a low energy sputtering chamber so that a first material of a target can be disposed within the dielectric layer;exposing the dielectric layer and the first material to an RF plasma comprising nitrogen; anddepositing a second material over the dielectric layer.

2. The method of claim 1, wherein the first RF frequency is between about 1 MHz and about 200 MHz.

3. The method of claim 1, wherein the thickness of the dielectric layer is less than about 40 Angstroms.

4. The method of claim 1, wherein the first material is hafnium and the concentration of the first material in the dielectric layer is less than about 30 atomic percent.

5. The method of claim 1, wherein the first material is selected from a group consisting of zirconium, hafnium, lanthanum, strontium, lead, yttrium, and barium.

6. The method of claim 1, wherein the dielectric layer contains a material selected from a group consisting silicon dioxide, hafnium oxide, zirconium oxide, hafnium silicate oxides, lanthanum oxides, and aluminum oxide.

7. The method of claim 1, further comprising disposing an amount of a third material within the dielectric layer before exposing the dielectric layer to an RF plasma comprising nitrogen, wherein the third material contains an element selected from a group consisting of hafnium, lanthanum, aluminum, titanium, zirconium, strontium, lead, yttrium, and barium.

8. The method of claim 7, wherein the third material is lanthanum that has a concentration less than about 10 atomic percent or the third material is aluminum that has a concentration less than about 10 atomic percent.

9. The method of claim 7, further comprising exposing the dielectric layer, the first material and the third material to an oxidizing environment, wherein the oxidizing environment using a thermal oxidation process or a plasma oxidation process.

10. The method of claim 1, wherein the second material contains a material selected from a group consisting of polysilicon, tantalum, tantalum nitride, tantalum carbide, tungsten, tungsten nitride, tantalum silicon nitride, hafnium, aluminum, ruthenium, cobalt, titanium, nickel, and titanium nitride.

11. The method of claim 1, wherein the low energy sputtering process comprises: pulsing the RF energy delivered from an RF generator at a first frequency; andpulsing a DC voltage delivered to the target from a DC source assembly; andsynchronizing the pulsed RF energy and the pulsed DC voltage using a system controller.

12. The method of claim 11, wherein the pulsed RF energy and the pulsed DC voltage do not overlap in time.

13. The method of claim 1, further comprising annealing the dielectric layer and the first material disposed on the substrates surface at a temperature between about 800° C. and about 1100° C.

14. The method of claim 1, further comprising exposing the surface of the substrate to an RF plasma comprising nitrogen prior to forming the dielectric layer.

15. A method of forming a semiconductor device, comprising: forming a dielectric layer having a desired thickness on a surface of a substrate;disposing an amount of a first material within the dielectric layer to form a concentration gradient through at least a portion of the thickness of the formed dielectric layer using a using a low energy sputtering process, wherein the low energy sputtering process comprises providing an RF energy at a first RF frequency and a first RF power to a processing region of a low energy sputtering chamber so that a first material of a target can be disposed within the dielectric layer;annealing the substrate at a temperature between about 800° C. and about 1100° C.; anddepositing a second material over the dielectric layer.

16. The method of claim 15, further comprising exposing the surface of the substrate or the formed dielectric layer to an RF plasma comprising nitrogen.

17. The method of claim 15, wherein the first RF frequency is between about 1 MHz and about 200 MHz.

18. The method of claim 15, wherein the thickness of the dielectric layer is less than about 40 Angstroms.

19. The method of claim 15, wherein the first material is hafnium and the concentration of the first material in the dielectric layer is less than about 30 atomic percent.

20. The method of claim 15, wherein the first material is selected from a group consisting of zirconium, hafnium, lanthanum, strontium, lead, yttrium, and barium.

21. The method of claim 15, wherein the dielectric layer contains a material selected from a group consisting silicon dioxide, hafnium oxide, zirconium oxide, hafnium silicate oxides, lanthanum oxides, and aluminum oxide.

22. The method of claim 15, further comprising disposing an amount of a third material within the dielectric layer before exposing the dielectric layer to an RF plasma comprising nitrogen, wherein the third material contains an element selected from a group consisting of hafnium, lanthanum, aluminum, titanium, zirconium, strontium, lead, yttrium, and barium.

23. The method of claim 22, wherein the third material is lanthanum that has a concentration less than about 10 atomic percent or the third material is aluminum that has a concentration less than about 10 atomic percent.

24. The method of claim 15, further comprising exposing the dielectric layer, the first material and the third material to an oxidizing environment, wherein the oxidizing environment using a thermal oxidation process or a plasma oxidation process.

25. The method of claim 15, wherein the second material contains a material selected from a group consisting of polysilicon, tantalum, tantalum nitride, tantalum carbide, tungsten, tungsten nitride, tantalum silicon nitride, hafnium, aluminum, ruthenium, cobalt, titanium, nickel, and titanium nitride.

26. The method of claim 15, wherein the low energy sputtering process comprises: pulsing the RF energy delivered from an RF generator at a first frequency; andpulsing a DC voltage delivered to the target from a DC source assembly; andsynchronizing the pulsed RF energy and the pulsed DC voltage using a system controller.

27. The method of claim 26, wherein the pulsed RF energy and the pulsed DC voltage do not overlap in time.

28. The method of claim 15, further comprising depositing a high-k dielectric layer over the dielectric layer.

29. The method of claim 28, wherein the high-k dielectric layer contains a material selected from a group consisting silicon dioxide, zirconium oxide, hafnium silicate oxides, lanthanum oxides, and aluminum oxide.

30. A method of forming a semiconductor device, comprising: positioning a substrate having a dielectric layer disposed on a surface of a substrate in a processing region of a low energy sputtering chamber; anddisposing an amount of a first material within the dielectric layer to form a concentration gradient through at least a portion of the thickness of the formed dielectric layer using a low energy sputtering process, wherein the low energy sputtering process comprises providing an RF energy at a first RF frequency and a first power to a first target which comprises the first material, wherein the first frequency is between about 1 MHz and about 200 MHz.

31. The method of claim 30, further comprising disposing an amount of a second material within the dielectric layer to form a concentration gradient through at least a portion of the thickness of the formed dielectric layer using a using a low energy sputtering process, wherein the low energy sputtering process comprises providing an RF energy at a second RF frequency and a second power to second target comprising a second material, wherein the second frequency is between about 1 MHz and about 200 MHz.

32. The method of claim 31, wherein the first material is hafnium and the second material is lanthanum or aluminum.

33. The method of claim 30, wherein the first material is hafnium and the concentration of the first material in the dielectric layer is less than about 30 atomic percent.

34. The method of claim 33, wherein the second material is lanthanum that has a concentration that is less than about 10 atomic percent or the second material is aluminum that has a concentration that is less than about 10 atomic percent.

35. The method of claim 30, further comprising depositing a second material over the dielectric layer, wherein the second material contains at least one material selected from a group consisting of polysilicon, tantalum, tantalum nitride, tantalum carbide, tungsten, tungsten nitride, tantalum silicon nitride, hafnium, aluminum, ruthenium, cobalt, titanium, nickel, titanium aluminum nitride, ruthenium nitride, hafnium nitride, nickel silicide, and titanium nitride.

36. The method of claim 30, wherein the thickness of the dielectric layer is less than about 40 Angstroms.

37. The method of claim 30, wherein the dielectric layer contains a material selected from a group consisting silicon dioxide, zirconium oxide, hafnium silicate oxides, lanthanum oxides, and aluminum oxide.

38. The method of claim 30, further comprising delivering DC voltage to the target from a DC source assembly.

39. The method of claim 30, further comprising annealing the dielectric layer and the first material at a temperature between about 800° C. and about 1100° C.

40. The method of claim 30, further comprising pulsing the first RF energy delivered to the target.

41. The method of claim 40, wherein pulsing further comprises providing pulses at a duty cycle between about 1 and about 50%.