Claims
- 1. A method for shielding one or more circuits of a printed circuit board wherein said one or more circuits are printed on a substrate, comprising the steps of:
depositing a layer of dielectric material over the substrate and over the one or more printed circuits thereon; creating a trench-like opening in the dielectric layer such that the trench-like opening surrounds the one or more circuits to be shielded; depositing a layer of metal over the layer of dielectric material and within the trench-like openings; creating a solder pad at each location where an electrical connection is to be made to the one or more printed circuits by removing a border of the metal layer surrounding each connection location, thereby leaving a portion of the metal layer within the border at the connection locations; and providing a microvia through each solder pad penetrating the dielectric layer and terminating at the metal of the printed circuit.
- 2. The method of claim 1, wherein the one or more printed circuits comprise at least two printed circuits, including the step of providing a metal-plated trench-like opening between two printed circuits with the trench-like opening surrounding the at least two printed circuits being electrically connected to the metal plated trench-like opening between the two printed circuits.
- 3. The method of claim 1, including the steps of providing one or more gaps in the metal deposited in the trench-like openings and routing a circuit trace through each of the one or more gaps.
- 4. The method of claim 3, including the step of soldering an electrical component to one or more of the solder pads.
- 5. A method for shielding one or more circuits of a printed circuit board, comprising the steps of:
depositing a first layer of metal on a substrate of the printed circuit board; depositing a first layer of dielectric material on the first layer of metal; printing one or more circuits on the first dielectric layer; depositing a second dielectric layer over the first dielectric layer and over the one or more printed circuits thereon; forming a trench-like opening in the two layers of dielectric material such that the trench-like opening surrounds the one or more printed circuits, and the metal of the first layer is exposed by the trench-like opening; and depositing a second layer of metal over the second layer of dielectric material such that the second layer of metal plates the trench-like opening and makes electrical contact with the first metal layer.
- 6. The method of claim 5, including the steps of providing one or more gaps in the metal deposited in the trench-like opening and routing a circuit trace therethrough.
- 7. The method of claim 5, including the step of creating a solder pad at each location where an electrical connection is to be made to the one or more printed circuits by removing a border of metal from the second layer of metal, the border surrounding each connection location, thereby leaving a portion of the second layer of metal at each connection location.
- 8. The method of claim 7, including the step of providing a microvia in each solder pad, the microvia extending through the second layer of dielectric material to the metal of the one or more printed circuits.
- 9. The method of claim 8, including the step of soldering an electrical component to one or more of the solder pads.
- 10. The method of claim 5, wherein the one or more printed circuits comprise at least two printed circuits, including the steps of providing a metal plated trench-like opening between two printed circuits and electrically connecting the metal plated trench-like opening surrounding the at least two printed circuits to the metal plated trench-like opening between the two printed circuits.
CROSS REFERENCE TO RELATED APPLICATIONS
[0001] This application is a divisional of pending U.S. application Ser. No. 09/775,460, filed Feb. 5, 2001, and assigned to Motorola, Inc., from which priority is hereby claimed under 35 U.S.C. §120.
Divisions (1)
|
Number |
Date |
Country |
Parent |
09775460 |
Feb 2001 |
US |
Child |
10263006 |
Oct 2002 |
US |