This application claims the benefit of priority under 35 U.S.C. §119 to German application serial number 10 2004 031 734.8, filed Jun. 30, 2004, and to German application serial no. 10 2004 044 179.0, filed Sep. 13, 2004.
The invention relates to mounting of semiconductor chips. The continuing trend toward miniaturizing semiconductor chips has made it necessary to develop new mounting methods that are adapted to the special demands generated by the small dimensions of the semiconductor chips to be mounted. To facilitate such mounting methods, the design of the semiconductor chips may have to be altered.
In particular, the difficulties of maintaining precise mounting tolerances increase with the miniaturization of the semiconductor chips. In general, the precision of the mounting processes depends on the precision of the machines used to mount the chips, such as pick-and-place machines, bonding machines or wafer sawing machines. Problems can arise with alignment precision when positioning very small semiconductor chips with pick and place machines. If the dimensions of the semiconductor chips are outside of specific limits, such conventional machines can no longer be used.
Another problem is electrically contacting very small semiconductor chips to a contact site. The positioning precision and the size of the contact site also depends on the tolerances of the mounting device, such as a wire or ball bonder. In addition, short circuits can easily occur given the very small distances between the semiconductor chips.
Furthermore, the mechanical stress experienced by semiconductor chips when handled by conventional machines is not appropriate for very small semiconductor chips. The mechanical stress can lead to breakage or damage during the mounting process.
The tolerances for cutting apart the chips, e.g., dicing, are also determined by the precision of the mounting machine. Importantly, material is lost when smaller semiconductor chips are cut apart with conventional machines, such as a wafer sawing machine.
A method for the simplified manufacture of thin-film LED chips is disclosed in U.S. Publication No. 20040099873. To manufacture thin-film semiconductor chips, a sequence of active epitaxy layers is grown on a substrate with rear contact layers that are reinforced by a reinforcing layer. Then, an auxiliary substrate layer is applied, which enables the active sequence of epitaxy layers to be handled. The reinforcing layer and auxiliary substrate replace the mechanical substrate used in conventional manufacturing methods. However, this document does not provide any approach for mounting the semiconductor chips.
One goal is to present a method for mounting semiconductor chips on a substrate in which the semiconductor chips can be sequentially positioned as desired on the substrate.
In one aspect, the invention is directed to mounting semiconductor chips onto a substrate. Molecules of a first type are applied on the substrate surface on which the semiconductor chips are to be mounted. Molecules of a second type that can bond to the first molecules are applied to the surface of each semiconductor chip. The semiconductor chip is introduced into a liquid. A drop of liquid having no more than one semiconductor chip is positioned on the substrate. The drops of liquid on the substrate are evaporated, leaving the semiconductor chip on the substrate.
Particular implementations of the invention may include one or more of the following features. The semiconductor chip can be electrically contacted to the substrate with an electrically conductive structure. The semiconductor chip can be applied to a soluble auxiliary substrate and introduced into the liquid by dissolving the auxiliary substrate. The liquid can contain the molecules and the molecules can adsorb onto the semiconductor chip after the semiconductor chip is introduced into the liquid. The molecules can be applied to the semiconductor chip or the substrate by stamping, printing or photolithography. The molecules can be adsorbed on the substrate from a solution. The drop with the chips can be deposited on the substrate by an inkjet system. A cell sorting system can ensure that not more than one semiconductor chip is in a drop. Metal-containing particles can be added to the liquid with the semiconductor chip and the particles can electrically connect the semiconductor chips with electrically conductive structures of the substrate after the liquid dries. Parts of the surfaces of the substrate and chip can be modified to be more effectively wetted than other parts of the surface. The semiconductor chip can be a thin-film LED chip.
The method can also include manufacturing thin-film LED chips. An active layer sequence is formed on a substrate suitable to generate electromagnetic radiation. An electrically conductive reflective contact layer is at least partially formed on the active layer sequence. The active layer sequence is structured into separate, active stacks of layers on the substrate, forming gaps. An electrically conductive reinforcing layer is applied on the conductive reflective contact layer. A passivation layer is formed on the side surfaces of the active stacks and the reflective contact layer (the thin-film LED chip) and the electrically-conductive reinforcing layer. The gaps between the thin-film LED chips are filled with a filler. An auxiliary substrate layer is applied on the side of the thin-film LED chips opposite from the substrate. The substrate and filler are removed from between the LED chips. An electrically conductive layer is applied on one side of the thin-film LED chips.
The methods described herein may include one or more of the following advantages. The semiconductor chips may be positioned individually on the substrate, and the position of the respective semiconductor chip can hence be freely selected. The semiconductor chips' position may be finely adjusted on the substrate by short-range forces between the molecules of the first and second type. This can enable high mounting precision.
The method may be particularly suitable for mounting semiconductor chips with edge lengths less than or equal to 200 nm. The smaller the semiconductor chip, the easier it may be to mount the chip using the methods described herein as compared to conventional mounting methods. The methods described herein may be applicable to mounting chips on conventional standard lead frames, as well as on printed circuit boards.
In one implementation, metal-containing particles can be added to the liquid containing the semiconductor chips. The particles are deposited on the sides of the semiconductor chips when the liquid dries, forming electrically conductive structure. These electrically conductive structures then contact the substrate and form an electrical connection between the semiconductor chip and the substrate.
The metal-containing particles can be used for the electrical contacting of the semiconductor chip. Thus, the mounting precision is no longer affected by the precision of the bonding machine. In addition, bond pads need not be used to mount the semiconductor chip. Eliminating bond pads can eliminate shadow effects that can arise with very small chips.
In some implementations, the surface of the substrate is modified so that parts of the surface are wetted more effectively than the rest of the surface by the liquid containing the semiconductor chips. If the drops holding a single semiconductor chip are positioned on this part of the substrate surface, the drops' movement may be largely restricted to this part of the surface. Furthermore, the properties of parts of the semiconductor chip surfaces can be modified to wet more effectively than the rest of the surface by the fluid in which the semiconductor chips are introduced. The semiconductor chips thereby become automatically oriented in the liquid with the mounting side facing the substrate.
a to 1f each show a schematic of the semiconductor chips and/or substrates at different stages in a mounting process.
a to 2c each show a schematic of the semiconductor chips and/or substrates at different stages of the mounting process.
a to 3c show a schematic of an implementation of the method of bonding.
a and 4b show a schematic representation of the surface modification of a semiconductor chip and a substrate.
a to 5i show cross-sectional side views of a thin-film LED chip and/or a substrate at different stages of a manufacturing process.
a shows a cross-sectional side view of the thin-film LED chip.
b shows a plan view of a thin-film LED chip.
In the exemplary embodiments and figures, the same or equivalent components are provided with the same reference number. The portrayed elements of the figures and especially the sizes of the portrayed molecules or layer thickness are not to scale. For the sake of clarity, they can in fact be partially enlarged.
a shows a section of a substrate 2, such as a printed circuit board, whose surface is coated with molecules of a first type 1 at sites where a semiconductor chip 3 is to be mounted. The semiconductor chips 3 and molecules of a second type 4 are shown in
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The molecules of the first type 1 and the second type 4 can be applied to the substrate 2 or the semiconductor chip 3 by being adsorbed from a solution, or by printing, such as screen printing or microcontact printing, or stamping. In some implementations, the second type 4 of molecules are applied onto the semiconductor chips by a printing process, stamping process or photolithographic process. This allows the semiconductor chips 3 to be easily coated with the second type 4 of molecules in a structured manner.
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The molecules of the first type 1 and second type 4 bind to each other.
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In some implementations, the chips 3 are coated with the molecules of the second type 4 by adding the molecule to the liquid 5 containing the semiconductor chips 3. Given a suitable liquid, the second type of molecules disperse in the liquid and are adsorbed at least on parts of the chip surface. The semiconductor chip 3 absorbs the molecules from the liquid 5. The semiconductor chips can be coated quickly and easily with the second type of molecules after the semiconductor chips are introduced into the liquid.
A technique using an auxiliary substrate can eliminate the need for handling the semiconductor chips individually to introduce the chips into the liquid. Thus, the chips may be exposed to reduced or only a small amount of mechanical stress. In addition, this technique may be suitable for virtually any sized semiconductor chip.
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Thin-film light-emitting diode chips (“thin-film LED chips” for short) can be mounted using the techniques described above. A thin-film LED chip is particularly distinguished by the following characteristics. A reflective layer is applied or formed onto a first main surface of an electromagnetic-radiation-generating sequence of epitaxy layers facing the substrate, and the reflective layer reflects at least some of the electromagnetic radiation back to the sequence of epitaxy layers. A basic principle of a thin-film LED is, for example, described in I. Schnitzer et al., Appl. Phys. Lett. 63 (16), Oct. 18, 1993, 2174-2176. In one implementation, the thin-film LED chip is a favorable approximation of a reflective Lambert surface.
The thickness of the sequence of epitaxy layers is 20 μm or less, such as about 10 μm. The sequence of epitaxy layers contains at least one semiconductor layer with at least one surface having a mixed structure which can produce a nearly ergodic distribution of light in the epitactic sequence of epitaxy layers, i.e., the surface manifests highly ergodic stochastic scattering behavior.
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In one implementation, the active sequence of epitaxy layers that can generate electromagnetic radiation is based on nitride compound semiconductors, such as gallium nitride semiconductor. The group of electromagnetic-radiation-generating epitaxy layer sequences based on a nitride compound semiconductor material includes semiconductor layer structures suitable for a radiation-emitting semiconductor component having a layer sequence of different individual layers. One of the layers can be a layer with a nitride compound semiconductor material, such as gallium nitride InxAlYGa1 -x-yN where 0≦x≦1, 0≦y≦1, and x+y≦1. This nitride compound semiconductor material does not necessarily have to have a mathematically precise composition according to the above formula. Rather, the material can have one or more dopants as well as additional components that do not essentially change the physical properties of the material. In addition to N and In, Al and/or Ga, the material can contain other elements.
Such a semiconductor structure can have a conventional pn junction, a double heterostructure, a single quantum well structure (SQW constructor), or a multiple quantum well structure (MQW structure).
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Forming the thin-film LED chip 30 as described above creates a vertical current path running from the top to the bottom of the chip. The passivation layer 12 on the side surfaces of the chip 30 ensures that current runs vertically through the chip 30. Electrical contact with the chip 30 can be made at the top of the chip, where the electrically-conductive layer 34 overlaps the top of the chip. The back side of the chip is electrically conductive.
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In one implementation, the thin-film LED chips 30 are separated by dissolving the auxiliary substrate 61 in a suitable liquid 5. The thin-film LED chips 30 are only exposed to a slight mechanical stress, and there is little to no loss of material as can occur in sawing.
A mounting procedure as described above can seamlessly follow the manufacturing steps for forming the thin-film LED chips.
The thin-film LED chips 30 manufactured by the above described method are suitable for electrical contacting, such as with the method described in
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For the sake of completeness, it is noted that the invention is not restricted to the exemplary embodiments described herein. All embodiments that are based upon the underlying principle explained herein fall within the scope of the invention. The different elements of the various exemplary embodiments can also be combined with each other.
All references disclosed herein are incorporated in their entirety by reference. The disclosures of German Application Serial No. 10 2004 031 734.8, filed Jun. 30, 2004, and German Application Serial No. 10 2004 044 179.0, filed Sep. 13, 2004 are considered part of and are incorporated by reference in the disclosure of this application.
Number | Date | Country | Kind |
---|---|---|---|
10 2004 031 734.8 | Jun 2004 | DE | national |
10 2004 044 179.0 | Sep 2004 | DE | national |