MULTI-STATION PROCESSING TOOLS WITH STATION-VARYING SUPPORT FEATURES FOR BACKSIDE PROCESSING

BACKGROUND

The present disclosure relates to multi-station processing tools for backside processing.

The background description provided herein is for the purposes of generally presenting the context of the disclosure. Work of the presently named inventors, to the extent it is described in this background section, as well as aspects of the description that may not otherwise qualify as prior art at the time of filing, are neither expressly nor impliedly admitted as prior art against the present disclosure.

SUMMARY

In one aspect, a multi-station plasma processing system is provided, wherein the system includes: a first processing station comprising a first set of support features configured to support a substrate at a first set of positions on a backside of the substrate when the substrate is processed at the first processing station; and a second processing station comprising a second set of support features configured to hold the substrate at a second set of positions on the backside of the substrate when the substrate is processed at the second processing station, wherein the first set of positions are non-overlapping with the second set of positions.

In another aspect, a multi-station plasma processing system for processing a substrate having a nominal diameter of D is provided, wherein the system includes: a first processing station having a first set of support features; a second processing station having a second set of support features; and an indexer configured to rotate about a center axis and to thereby transfer the substrate from the first processing station to the second processing station, wherein the first set of support features has a first set of contact surfaces positioned within a first circular region having a first diameter of D and centered on a first center point of the first processing station, wherein the second set of support features has a second set of contact surfaces positioned within a second circular region having a second diameter of D and centered on a second center point of the second processing station, and wherein a rotational transform of the first center point and the first set of contact surfaces about the center axis such that the rotationally transformed first center point aligns with the second center point results in no overlap between the second set of contact surfaces and the rotationally transformed first set of contact surfaces when viewed along the center axis.

In another aspect, a method for processing a backside of a substrate in a multi-station plasma processing system is provided, wherein the system includes a first station with a first set of support features and the system includes a second station with a second set of support features and wherein the method includes: moving a substrate onto the first set of support features; processing the backside of the substrate while the substrate is on the first set of support features, wherein the first set of support features block processing of the backside of the substrate at a first set of locations on the backside of the substrate; moving the substrate onto the second set of support features; and processing the backside of the substrate while the substrate is on the second set of support features, wherein the second set of support features do not block processing of the backside of the substrate at the first set of locations on the backside of the substrate.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a schematic diagram of a substrate processing system in accordance with certain disclosed embodiments.

FIG. 2 is a top view of a multi-station processing tool in accordance with certain disclosed embodiments.

FIG. 3 is a schematic view of a multi-station processing tool in accordance with certain disclosed embodiments.

FIG. 4A is a perspective view of support features a multi-station processing tool.

FIG. 4B is a top-down view of support features in a multi-station processing tool.

FIG. 4C is a side view of support features in a multi-station processing tool.

FIG. 5 is a schematic diagram of an example control module for controlling substrate processing systems in accordance with certain disclosed embodiments.

FIG. 6 illustrates various bottom-up views of a wafer being processed in a multi-station processing tool in accordance with certain disclosed embodiments.

DETAILED DESCRIPTION

In the following description, numerous specific details are set forth to provide a thorough understanding of the presented embodiments. The disclosed embodiments may be practiced without some or all of these specific details. In other instances, well-known process operations have not been described in detail to not unnecessarily obscure the disclosed embodiments. While the disclosed embodiments will be described in conjunction with the specific embodiments, it will be understood that it is not intended to limit the disclosed embodiments.

Portions of the present disclosure relate to plasma-enhanced chemical vapor deposition (PECVD). PECVD is a type of plasma deposition that is used to deposit thin films from a gas state (i.e., vapor) to a solid state on a substrate such as a wafer. PECVD systems convert a liquid precursor into a vapor precursor, which is delivered to a chamber. PECVD systems may include a vaporizer that vaporizes the liquid precursor in a controlled manner to generate the vapor precursor. Typically, chambers used for PECVD use ceramic pedestals for supporting the wafer during processing, which enables processing under high temperatures.

Most PECVD deposition and other processing to form the devices occur on the front face of a wafer, e.g., top-side. As the deposited layers build up, they can introduce stress in the wafer. This stress can cause the wafer to bow, which is undesirable. Where bowing is significant, it can deleteriously affect subsequent processing steps. Sometimes, depositing materials on the back-side of the wafer may counteract wafer bowing and stress. However, to deposit on a back-side of the wafer, the wafer has to be flipped and loaded as back-side up. Flipping the wafer introduces additional problems, such as additional handling, potential exposure to particles, and/or reduction in processing yield.

Embodiments of the disclosure provide implementations of a multi-station processing tools with station-varying support features (sometimes also referred to as lifting features) for backside processing such deposition and etching. During backside deposition, etching, and/or other processing within a single station, a lifting feature may block deposition, etching, and/or other processing on a wafer or other substrate being processed at the point of contact of the lifting feature. In some current designs, a carrier ring has support features that hold the wafer during deposition. As the carrier ring moves from station-to-station within a multi-station reactor, the support features do not more move with respect to the wafer. The carrier ring carries the wafer from station-to-station. In such designs, it is not possible to deposit, etch, and/or perform other processing on all locations of the wafer.

In one implementation, a first station may have a first set of support features that contact wafers or other substrates being processed at a first set of positions, while a second station may have a second set of support features that contact the wafers or other substrates being processed at a second set of positions different from the first set of positions. As a result, areas that are blocked by the first set of support features during deposition, etching, and/or other processing in the first station may be exposed during deposition, etching, and/or other processing in the second station. This allows for control of the deposition profile, etching profile, and/or other processing profile in an azimuthal direction and enables deposition, etching, and/or other processing of a film on all portions of the backside without any full thickness voids or other azimuthal non-uniformities. As an example and during etching, this enables etching of all portions of the backside without portions being completely un-etched. In some implementations, the support features are not part of the carrier ring. Rather, the support features are part of a station, with each station of a multi-station reactor having its own support features.

Multi-level semiconductor processing flows used to manufacture advanced memory and logic chips have caused substrates to warp significantly in compressive and tensile directions. Due to this moderate to severe substrate warpages, processing conditions of various manufacturing processes are compromised causing process control issues, lithography chucking and overlay issues, which sometimes cause increases in yield loss. In one embodiment, one way to control the warpage is to deposit a sacrificial film or multiple films on the opposite side (i.e., back-side) of the substrate to compensate the warpage in opposite direction resulting in flattening of the substrate. The traditional dual electrode radio-frequency (RF) plasma-enhanced chemical vapor deposition (PECVD) systems have one gas-flowing electrode that can be RF or ground. Typically, the gas flowing electrode (also referred to as a showerhead 104) is on the top side of the PECVD reactor causing the reactants to flow on the front-side of the wafer causing deposition only on the front-side of the wafer.

In accordance with one embodiment, an RF PECVD system is disclosed that has dual gas-flowing electrodes. Either one of the electrodes can be an RF electrode to provide AC fields enabling plasma enhancements for CVD film depositions. This dual gas-flowing electrode PECVD system is capable of selectively depositing films on both or only one side of the wafer. In one example, a gas-flowing pedestal (referred to herein as a “shower-pedestal” or “show-ped”) can hold the wafer for transfers within the chamber between adjacent stations or outside the chamber via standard transfer mechanisms based on the equipment setup, yet be able to flow gases from the back-side of the wafer. In some other embodiments, a system configured for backside deposition, etching, or other operations may not include a shower-pedestal and may utilize other structures for flow gases to the back-side of the wafer.

In one embodiment, the back-side gas flow enables the PECVD deposition on the back-side of the wafer while the front-side gas flow can deposit on the front side of the wafer. The system can be setup to selectively enable the side of the deposition by turning on and off the reactants that cause the film deposition and replacing them with non-reacting gases (e.g., inert gases). Another aspect of this system is to be able to control the distance of side of the substrate from the reactant flowing gases. This control enables achieving the deposition profile and film properties that are needed for the applications such as back-side compensation.

In another embodiment, the show-ped and showerhead include configurations that provide showerhead-like features that enable proper reactant mixing and providing appropriate flow dynamics for PECVD deposition processes on the back-side of the wafer, or front side. Additionally, some embodiments enable for a controllable gap that can suppress or allow the plasma on the desired (one or both) sides of the wafer for deposition. The gaps being controlled can include, e.g., a gap spacing between a top side of the wafer and the top surface of the showerhead 104 (as shown in FIG. 1), and a gap spacing between a back side of the wafer and the top surface of the show-ped 106 (as shown in FIG. 1). For example, while the back side of the wafer is being deposited, the gap between the top side of the wafer and the top surface of the showerhead is minimized.

The show-ped 106 is further configured to include a showerhead hole pattern and inner plenums for even distribution of gases. A showerhead hole pattern and inner plenums that provide even distribution of gases allows for process gases to be delivered toward the bottom of the wafer with a suitably even distribution. The embodiments also allow for the gas-flowing pedestal (i.e., show-ped) to have an active heater to get the process gas to the proper temperature. The combination of the show-ped 106 and showerhead 104 allows for the concurrent function of both of key attributes. The show-ped 106 can, in one embodiment, still heat the wafer and provide the wafer transfer features within the reactor chamber or outside the reactor, while the showerhead 104 components allows for process gas flow. The gas-flowing pedestal (i.e., show-ped) disclosed herein therefore enable implementation of traditional PECVD processes to deposit on either side of the wafer, selectively. These configurations are also configured to selectively RF power the top or bottom electrode, and dynamically enable/disable the plasma on the side of the wafer that needs deposition.

Broadly speaking, the show-ped provides several advantages for combating the stress and bowing issues by depositing a film on the back side of the wafer. The back side film counteracts the stress from the front side deposition to result in a neutral stress (or substantially neutral stress, e.g., less than about +/-150 MPa) wafer that shows no bowing (or substantially no bowing, e.g., less than about 150 µm of bow). If the film deposited on the front side is tensile, then the back side film should also be tensile to balance out the overall stress. Likewise, if the front side film is compressive, then the back side film should also be compressive. The back side film may be deposited through various reaction mechanisms (e.g., chemical vapor deposition (CVD), plasma enhanced chemical vapor deposition (PECVD), atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD), low pressure chemical vapor deposition (LPCVD), etc.). In various cases, plasma enhanced chemical vapor deposition is used due to the high deposition rate achieved in this type of reaction.

Certain deposition parameters can be tuned to produce a back side film having a desired stress level. One of these deposition parameters is the thickness of the deposited back side film. Thicker films induce more stress in the wafer, while thinner films (of the same composition and deposited under the same conditions) induce less stress in the wafer. Therefore, in order to minimize the amount of material consumed in forming the back side layer, this layer may be deposited relatively thinly under conditions that promote formation of a highly stressed film.

In some embodiments, a multi-station processing tool may have station-varying support features for backside deposition. During backside deposition within a single station, a support feature may block deposition on a wafer or other substrate being processed at the point of contact of the support feature. In one implementation, a first station may have a first set of support features that contact wafers or other substrates being processed at a first set of positions, while a second station may have a second set of support features that contact the wafers or other substrates being processed at a second set of positions different from the first set of positions. As a result, areas that are blocked by the first set of support features during deposition in the first station may be exposed during deposition in the second station. Thus, a backside layer may be deposited on all portions of the backside without any full thickness voids. While much of the present disclosure references to benefits of station-varying support features (also referred to as support features) for backside deposition, the station-varying support features may also be utilized and provide benefits for other kinds of backside processing such as etching.

As mentioned, stacks of deposited materials are especially likely to result in wafer stress and bowing. One example stack that may cause these problems is a stack having alternating layers of oxide and nitride (e.g., silicon oxide/silicon nitride/silicon oxide/silicon nitride, etc.). Another example stack likely to result in bowing includes alternating layers of oxide and polysilicon (e.g., silicon oxide/polysilicon/silicon oxide/polysilicon, etc.). Other examples of stack materials that may be problematic include, but are not limited to, tungsten and titanium nitride. The materials in the stacks may be deposited through chemical vapor deposition techniques such as plasma enhanced chemical vapor deposition (PECVD), low pressure chemical vapor deposition (LPCVD), metal organic chemical vapor deposition (MOCVD), atomic layer deposition (ALD), plasma enhanced atomic layer deposition (PEALD), or through direct metal deposition (DMD), etc. These examples are not intended to be limiting. Certain disclosed embodiments may be useful whenever wafer stress and/or bowing are induced due to material present on the front side of the wafer.

The front side stacks may be deposited to any number of layers and thicknesses. In a typical example, the stack includes between about 32-72 layers, and has a total thickness between about 2-4 µm. The stress induced in the wafer by the stack may be between about -500 MPa to about +500 MPa, resulting in a bow that is frequently between about 200-400 µm (for a 300 mm wafer), and even greater in some cases.

The material deposited on the back side of the wafer may be a dielectric material in various embodiments. In some cases, an oxide and/or nitride (e.g., silicon oxide/silicon nitride) is used. Examples of silicon-containing reactants that may be used include, but are not limited to, silanes, halosilanes, and aminosilanes. A silane contains hydrogen and/or carbon groups, but does not contain a halogen. Examples of silanes are silane (SiH₄), disilane (Si₂H₆), and organo silanes such as methylsilane, ethylsilane, isopropylsilane, t-butylsilane, dimethylsilane, diethylsilane, dit-butylsilane, allylsilane, sec-butylsilane, thexylsilane, isoamylsilane, t-butyldisilane, di-t-butyldisilane, and the like. A halosilane contains at least one halogen group and may or may not contain hydrogens and/or carbon groups. Examples of halosilanes are iodosilanes, bromosilanes, chlorosilanes and fluorosilanes. Although halosilanes, particularly fluorosilanes, may form reactive halide species that can etch silicon materials, in certain embodiments described herein, the silicon-containing reactant is not present when a plasma is struck. Specific chlorosilanes are tetrachlorosilane (SiCl₄), trichlorosilane (HSiCl₃), dichlorosilane (H₂SiCl₂), monochlorosilane (ClSiH₃), chloroallylsilane, chloromethylsilane, dichloromethylsilane, chlorodimethylsilane, chloroethylsilane, t-butylchlorosilane, di-t-butylchlorosilane, chloroisopropylsilane, chloro-sec-butylsilane, t-butyldimethylchlorosilane, thexyldimethylchlorosilane, and the like. An aminosilane includes at least one nitrogen atom bonded to a silicon atom, but may also contain hydrogens, oxygens, halogens and carbons. Examples of aminosilanes are mono-, di-, tri- and tetra-aminosilane (H₃Si(NH₂)₄, H₂Si(NH₂)₂, HSi(NH₂)₃ and Si(NH₂)₄, respectively), as well as substituted mono-, di-, tri- and tetra-aminosilanes, for example, t-butylaminosilane, methylaminosilane, tert-butylsilanamine, bis(tertiarybutylamino)silane (SiH₂(NHC(CH₃)₃)₂ (BTBAS), tert-butyl silylcarbamate, SiH(CH₃)—(N(CH₃)₂)₂, SiHCl—(N(CH₃)₂)₂, (Si(CH₃)₂NH)₃ and the like. A further example of an aminosilane is trisilylamine (N(SiH₃)). Other potential silicon-containing reactants include tetraethyl orthosilicate (TEOS), and cyclic and non-cyclic TEOS variants such as tetramethoxysilane (TMOS), fluorotriethoxysilane (FTES), Trimethylsilane (TMS), octamethyltetracyclosiloxane (OMCTS), tetramethylcyclotetrasiloxane (TMCTSO), dimethyldimethoxysilane (DMDS), hexamethyldisilazane (HMDS), hexamethyldisiloxane (HMDSO), hexamethylcyclotrisiloxane (HMCTSO), dimethyldiethoxysilane (DMDEOS), methyltrimethoxysilane (MTMOS), tetramethyldisiloxane (TMDSO), divinyltetramethyldisiloxane (VSI₂), methyltriethoxysilane (MTEOS), dimethyltetramethoxydisiloxane (DMTMODSO), ethyltriethoxysilane (ETEOS), ethyltrimethoxysilane (ETMOS), hexamethoxydisilane (HMODS), bis(triehtoxysilyl)ethane (BTEOSE), bis(trimethoxysilyl)ethane (BTMOSE), dimethylethoxysilane (DMEOS), tetraethoxydimethyldisiloxane (TEODMDSO), tetrakis(trimehtylsiloxy)silane (TTMSOS), tetramethyldiethoxydisiloxane (TMDEODSO), triethoxysilane (TIEOS), trimethoxysilane (TIMEOS), or tetrapropoxysilane (TPOS).

Example nitrogen-containing reactants include, but are not limited to, ammonia, hydrazine, amines (e.g., amines bearing carbon) such as methylamine, dimethylamine, ethylamine, isopropylamine, t-butylamine, di-t-butylamine, cyclopropylamine, sec-butylamine, cyclobutylamine, isoamylamine, 2-methylbutan-2-amine, trimethylamine, diisopropylamine, diethylisopropylamine, di-t-butylhydrazine, as well as aromatic containing amines such as anilines, pyridines, and benzylamines. Amines may be primary, secondary, tertiary or quaternary (for example, tetraalkylammonium compounds). A nitrogen-containing reactant can contain heteroatoms other than nitrogen, for example, hydroxylamine, t-butyloxycarbonyl amine and N-t-butyl hydroxylamine are nitrogen-containing reactants.

Examples of oxygen-containing co-reactants include oxygen, ozone, nitrous oxide, carbon monoxide, nitric oxide, nitrogen dioxide, sulfur oxide, sulfur dioxide, oxygen-containing hydrocarbons (CxHyOz), water, mixtures thereof, etc.

The flow rate of these reactants will depend greatly on the type of reaction through which the back side layer is deposited. Where CVD/PECVD are used to deposit the back side layer, the flow rate of the silicon-containing reactant may be between about 0.5-10 mL/min (before atomization), for example between about 0.5-5 ml/min. The flow rate of a nitrogen-containing reactant, oxygen-containing reactant, or other co-reactant may be between about 3-25 standard liters per minute (SLM), for example between about 3-10 SLM.

In certain implementations the back side layer may be removed after further processing. Where this is the case, the composition of the back side layer should be chosen such that it can be easily removed from the substrate at an appropriate time. In this regard, there should be a high selectivity between the material of the back side layer (e.g., the dielectric) and the material of the underlying substrate (e.g., silicon) in the desired removal chemistry.

The optimal thickness of the back side layer will depend on the amount of stress induced by the deposition on the front side of the wafer, as well as the conditions under which the back side layer is deposited. The back side layer may be deposited to a thickness at which the stress in the wafer becomes negligible (e.g., less than about 150 MPa). In these or other embodiments, the back side layer may be deposited to a thickness at which the wafer bow becomes negligible (e.g., less than about 150 µm of bow). In some cases, this corresponds to a back side layer thickness between about 0.1-2 µm, for example between about 0.3-2 µm, or between about 0.1-1 µm, or between about 0.3-1 µm. Where silicon nitride is used to form the back side layer, a film having a thickness of about 0.3 µm is sufficient to mitigate a bow of about 50-200 µm. As mentioned above, a higher stress back side layer may be used to reduce the required thickness of the layer. This helps conserve materials and reduce costs.

It should be appreciated that the present embodiments can be implemented in numerous ways, such as a process, an apparatus, a system, a device, or a method. Several embodiments are described below.

Deposition of films is in one embodiment implemented in a plasma enhanced chemical vapor deposition (PECVD) system. The PECVD system may take many different forms. The PECVD system includes one or more chambers or “reactors” (sometimes including multiple stations) that house one or more wafers and are suitable for wafer processing. Each chamber may house one or more wafers for processing. The one or more chambers maintain the wafer in a defined position or positions (with or without motion within that position, e.g. rotation, vibration, or other agitation). A wafer undergoing deposition may be transferred from one station to another within a reactor chamber during the process. Of course, the film deposition may occur entirely at a single station or any fraction of the film may be deposited at any number of stations.

While in process, each wafer is held in place by a pedestal, wafer chuck and/or other wafer holding apparatus. For certain operations, the apparatus may include a heater such as a heating plate to heat the wafer.

FIG. 1 illustrates a substrate processing system 100, which is used to process a wafer 128. The system includes a chamber 102. A center column is configured to support a pedestal for when a top surface of the substrate 128 is being processed, e.g., a film is being formed on the top surface. The pedestal, in accordance with embodiments disclosed herein, is referred to as a showerhead-pedestal (“show-ped”) 106. A showerhead 104 is disposed over the show-ped 106. In one embodiment, the showerhead 104 is electrically coupled to power supply 122 via a match network 125. The power supply 122 is controlled by a control module 120, e.g., a controller. In other embodiments, it is possible to provide power to the show-ped 106 instead of the showerhead 104. The control module 120 is configured to operate the substrate processing system 100 by executing process input and control for specific recipes. Depending on whether the top surface of the substrate 128 is receiving a deposited film or the bottom surface of the substrate 128 is receiving a deposited film, the controller module 120 sets various operational inputs, for a process recipe, e.g., such as power levels, timing parameters, process gasses, mechanical movement of the wafer 128, height of the wafer 128 off of the show-ped 106, etc. In implementations having multiple processing chambers 102 (such as the examples of FIGS. 2 and 3), the system 100 may include power supplies 122 and associated elements such as match networks 125, each of which is coupled to a shower-ped 106 and/or a showerhead 104 in a respective one of the chambers 102. In other embodiments, a single power supply 122 may be coupled to shower-peds 106 and/or showerheads 104 in multiple chambers 102. One or more of the control module 120, gas sources 114, gas manifold 112, gas manifold 108, gas sources 110, match network 125, RF power supply 112, show-ped 106, showerhead 104, and processing chamber may form equipment for depositing a film on a backside of a substrate. As discussed in further detail below, a multi-station processing tool may include multiple two or more processing stations including the aforementioned equipment for depositing a film on a backside of a substrate. Some of the aforementioned equipment may be shared by multiple processing stations in the multi-station processing tool. Additionally, a single wafer may be processed by multiple stations in a multi-station processing tool. Therefore, a first processing station in the multi-station processing tool may have first equipment for depositing a firm film on a backside of a substrate and a second processing station in the multi-station processing tool may have second equipment for depositing a second film on the backside of the substrate.

The center column can also include lift pins, which are controlled by a lift pin control. The lift pins are used to raise the wafer 128 from the show-ped 106 to allow an end-effector to pick the wafer and to lower the wafer 128 after being placed by the end end-effector. The end effector (not shown), can also place the wafer 128 over spacers 130. As will be described below, the spacers 130 are sized to provide a controlled separation of the wafer 128 between a top surface of the showerhead 104 (facing the wafer) and a top surface of the show-ped 106 (facing the wafer).

The substrate processing system 100 further includes a gas manifold 108 that is connected to gas sources 110, e.g., gas chemistry supplies from a facility and/or inert gases. Depending on the processing being performed over a top surface of the substrate, the control module 120 controls the delivery of gas sources 110 via the gas manifold 108. The chosen gases are then flown into the showerhead 104 and distributed in a space volume defined between a face of the showerhead 104 that faces that wafer 128 when the wafer is resting over the pedestal 140.

The substrate processing system 100 further includes a gas manifold 112 that is connected to gas sources 114, e.g., gas chemistry supplies from a facility and/or inert gases. Depending on the processing being performed over a bottom surface of the substrate, the control module 120 controls the delivery of gas sources 114 via the gas manifold 112. The chosen gases are then flown into the showerhead 104 and distributed in a space volume defined between a face of the show-ped 106 that faces an under surface/side of the wafer 128 when the wafer is resting over on the spacers 130. The spacers 130 provide for a separation that optimizes deposition to the under surface of the wafer 128, while reducing deposition over the top surface of the wafer. In one embodiment, while deposition is targeted for the under surface of the wafer 128, an inert gas is flown over the top surface of the wafer 128 via the showerhead 104, which pushes reactant gas away from the top surface and enables reactant gases provided from the show-ped 106 to be directed to the under surface of the wafer 128. In implementations having multiple processing chambers 102 (such as the examples of FIGS. 2 and 3), the system 100 may include multiple gas manifolds 112, each of which is coupled to a show-ped 106 in a respective one of the chambers 102; and/or may include multiple gas manifolds 108, each of which is coupled to a showerhead 104 in a respective one of the chambers 102.

Further, the gases may be premixed or not. Appropriate valving and mass flow control mechanisms may be employed to ensure that the correct gases are delivered during the deposition and plasma treatment phases of the process. Process gases exit chamber via an outlet. A vacuum pump (e.g., a one or two stage mechanical dry pump and/or a turbomolecular pump) draws process gases out and maintains a suitably low pressure within the reactor by a close loop controlled flow restriction device, such as a throttle valve or a pendulum valve.

Also shown is a carrier ring 124 that encircles an outer region of the show-ped 106. When the top surface of the wafer 128 is being processed, e.g., a material is being deposited thereon, the carrier ring 124 is configured to sit over a carrier ring support region that is a step down from a wafer support region in the center of the pedestal show-ped 106. The carrier ring 124 includes an outer edge side of its disk structure, e.g., outer radius, and a wafer edge side of its disk structure, e.g., inner radius, that is closest to where the wafer 128 sits. The wafer edge side of the carrier ring 124 includes a plurality of contact support structures which are configured to support the wafer 128. The spacers 130 may include carrier ring support features that support the carrier ring 124. The spacers 130 may include wafer support features that support the wafer 128 off of the carrier ring 124 when the carrier ring 124 is held by the spacers 130.

In some implementations, the chamber 102 may be a processing chamber in a multi-station processing tool and the wafer support features of the spacers 130 may engage with wafers at different azimuthal locations on the wafers depending on which station the wafers are in. As an example, the spacers 130 in a first processing station may include wafer support features that support the wafer 128 by engaging with the wafer at a first set of positions (e.g., three or more positions arranged evenly or unevenly around the circumference of the wafer), while the spacers 130 in a second processing station may include wafer support features that support the wafer 128 by engaging with the wafer at a second set of positions (e.g., three or more positions arranged evenly or unevenly around the circumference of the wafer). The first and second sets of positions may be non-overlapping or may only partially overlap. With arrangements of this type, backside deposition within the first station may result in voids in the backside film applied to wafer 128 at the first set of positions, due to physical occlusion at the first set of positions by the wafer support features of spacers 130. However, backside deposition within the second station can at least partially fill those voids, since the wafer support features in the second station engage with the wafer 128 at the second set of positions, which don’t overlap, or only partially overlap, with the first set of positions.

In some other implementations, the wafer 128 may be rotated when moving from one station to the next, such that the wafer 128 engages the spacers 130 or other wafer support features at different azimuthal positions on the wafer when resting in each of the stations. Rotation of the wafer between stations may be sufficient to ensure that a backside film is deposited in a desired manner (e.g., that the backside film is free of full thickness voids). In such implementations, the spacers 130 or other wafer support features may be at the same azimuthal locations across multiple stations.

FIG. 2 illustrates a top view of a multi-station processing tool, wherein four processing stations are provided. The embodiment of FIG. 1 illustrates a chamber 102, which can be implemented in chamber 102 of FIGS. 2 and 3, which have four chamber stations. FIGS. 2 and 3 provide top views of a chamber portion (e.g., with a top chamber portion removed for illustration), wherein four stations are accessed by spider forks 132. Each spider fork 132, or fork includes a first and second arm, each of which is positioned around a portion of each side of the show-ped 106. In this view, the spider forks 132 are drawn in dash-lines, to convey that they are below the carrier ring 124. The spider forks 132, using an engagement and rotation mechanism 220 are configured to raise up and support the carrier rings 124 (i.e., from a lower surface of the carrier rings 124) from the stations simultaneously, and then rotate at least one or more stations before lowering the carrier rings 124 (where at least one of the carrier rings supports a wafer 128) to a next location so that further plasma processing, treatment and/or film deposition can take place on respective wafers 128. As noted above, in one embodiment, the spider forks 132 can be used to lower the wafer 128 onto (and raise the wafer 128 off of) wafer support features such as spacers 130. Spacers 130 may hold the wafer 128 at a height that enables deposition on a backside of the wafer 128, while substantially preventing deposition on a topside of the wafer 128, e.g., as shown in FIG. 1.

FIG. 3 shows a schematic view of an embodiment of a multi-station processing tool with an inbound load lock 148 and an outbound load lock 140. A robot 142, at atmospheric pressure, is configured to move substrates 128 from a cassette loaded through a pod 150 into inbound load lock 148 via an atmospheric port 144. Inbound load lock 148 is coupled to a vacuum source (not shown) so that, when atmospheric port 144 is closed, inbound load lock 148 may be pumped down. Inbound load lock 148 also includes a chamber transport port 146 interfaced with processing chamber 102. Thus, when chamber transport 146 is opened, another robot (not shown) may move the substrate from inbound load lock 148 to a show-ped 106 of a first process station for processing.

The depicted processing chamber 102 comprises four process stations, numbered from 1 to 4 in the embodiment shown in FIG. 3. In some embodiments, processing chamber 102 may be configured to maintain a low pressure environment so that substrates may be transferred using a carrier ring 124 among the process stations without experiencing a vacuum break and/or air exposure. Each process station depicted in FIG. 3 a show-ped 106 that is configured to deliver a process gas when backside deposition is to occur. During backside deposition, when spacers having wafer support features are used to hold the wafer off of the show-ped 106, the showerhead 104 may be configured to supply an inert gas over the top surface of the substrate to prevent or reduce deposition over the top surface of the wafer 106.

FIG. 3 also depicts spider forks 132 for transferring wafers within processing chamber 102. As will be described in more detail below, the spider forks 132 can also rotate and enable transfer of wafers from one station to another. The transfer occurs by enabling the spider forks 132 to lift carrier rings 124 from an outer undersurface, which then lifts the wafer, and then rotates the wafer and carrier 124 together to the next station. In one configuration, the spider forks 132 are made from a ceramic material to withstand high levels of heat during processing.

In other embodiments, instead of using spider forks 132 to lift and transfer the wafers, a paddle type structure can also function to lift and transfer the wafers. Paddles can be disposed between the stations, similar to the way the spider forks 132 sit, and can function in the same way. Thus, for easy of understanding, references to spider forks 132 should be understood to also apply to paddle configurations, which can provide the control lifting (e.g., during backside wafer deposition) and transfers between stations. In some cases, structures configured to lift, support, and/or transfer wafers (such as spider forks 132) may be referred to as “indexers” or “rotational indexers.” These structures may be part of a rotational carousel for moving wafers between stations. Thus, for easy of understanding, references to spider forks 132 should be understood to also refer to “indexers” or “rotational indexers”, even when such structures differ from “spider forks” (e.g., have different structural arrangements, utilize different techniques for supporting and/or moving wafers, etc.).

Broadly speaking, the embodiments disclosed herein are for a system to deposit PECVD films on the selective side of the wafer (front and/or back) with dynamic control. One embodiment includes a dual gas-flowing electrode for defining a capacitively-coupled PECVD system. The system will include a gas-flowing showerhead 104 and a show-ped 106. In one embodiment, the gas-flowing pedestal (i.e., show-ped) is a combination showerhead and pedestal, which enables deposition on a back-side of the wafer. The electrode geometry combines features of a showerhead, e.g., such as a gas mixing plenum, holes, hole-pattern, gas jet preventing baffle, and features of a pedestal, e.g., such as embedded controlled heater, wafer-lift mechanisms (also referred to as wafer support features and wafer support structures), ability to hold plasma suppression rings, and movability. This enables the transfer of wafers and the processing of gasses with or without RF power from the pedestal.

In one embodiment, the system has wafer support features that include station-varying support features. As an example, the system may have spacers such as the spacers 130 of FIG. 1 with station-varying support features. In one embodiment, the wafer support features of a first process station engage with the underside, also referred to as the backside, of a wafer at a first plurality of locations (e.g., three or more) along the periphery of the wafer. As a result, the wafer support features of the first process station may physically occlude the underside of the wafer, thus preventing backside deposition, at the first plurality of locations. If the backside deposition in this first station was the only backside deposition performed, the wafer would have full-thickness voids in the backside film at the first plurality of locations (e.g., at the locations where the wafer support features engage with and hold up the wafer). Thus, in at least some embodiments, the wafer support features of a second process station are configured to engage with the underside of the wafer at a second plurality of locations along the periphery of the wafer. The second plurality of locations may not overlap, or only partially overlap, with the first plurality of locations. Thus, when a backside deposition is performed in the second process station, the portions having full-thickness voids (e.g., the regions occluded by the wafer support features of the first process station) may be at least partially filled in with a deposited backside layer. As a result, the multi-station processing system may be able to deposit a backside film that is free of full-thickness voids.

If desired, the multi-station processing system may have any number of processing stations (e.g., two, three, four, five, or more). In such embodiments, each processing station may have wafer support features that engage with the wafer at a set of locations on the underside of wafers that are unique to that particular processing station. Alternatively, two or more processing stations may have wafer support features that engage with the wafer at a common set of locations, while one or more other processing stations have wafer support features that engage with the wafer at a different set of locations. In general, increasing the number of processing stations having different engagement locations may help to reduce variations in backside depositions.

In one embodiment, the system has a wafer lift mechanism that allows tight control of parallelism of the substrates against the electrodes. In one embodiment, this is achieved by setting up the lift mechanism parallel to the two electrodes and controlling manufacturing tolerances, e.g., spindle or lift pins mechanisms. Another embodiment is defined by raising the wafer lift parts, but this option does not allow dynamic control of the side that gets deposited.

In one configuration, the lift mechanism allows controlling of the distance dynamically during the process (before plasma, during plasma, after plasma) to control the side of the deposition, profile of the deposition, and deposition film properties. The system further allows selective enabling/disabling of the side where reactants are flown. One side can flow the reactant and the other side can flow inert gases to suppress the deposition and plasma.

In one embodiment, the gap between the side of the wafer that does not need plasma or film deposition may be tightly controlled to suppress plasma (e.g., to reduce or eliminate plasma damage). In one example, this system allows minimal gap from about 2 mm to about 0.5 mm, and in another embodiment from about 1 mm to about 0.05 (limited by the wafer bow), and such gap can be controlled. In one embodiment, this gap depends upon the process conditions.

In one embodiment, the gas-flowing pedestal (i.e., show-ped) enables, without limitation: (a) thermal stabilization of the wafer to processing temperature prior to processing; (b) selective design of hole patterns on the show-ped to selectively deposition film in different areas of the back-side of the wafer; (c) swappable rings can be attached to achieve appropriate plasma confinement, hole pattern, and edge impedance (which may help achieve a desired radial-distribution of film properties); (d) stable wafer transfer mechanisms within chamber and for transferring wafer outside to another chamber or cassette-such as lift pins, RF-coupling features, minimum-contact arrays; (e) implement gas mixing features, e.g., such as inner plenum, baffle and manifold lines openings; and (f) add compartments in the gas-flowing pedestal (i.e., show-ped) to enable selective gas flow to different regions of the back side of the wafer and control flow rates via flow controllers and/or multiple plenums.

In another embodiment, dynamic gap control using wafer lift mechanism enables: (a) control of the distance from deposition or reactant flowing electrode to the side of the wafer that needs deposition or in the middle so that both sides can be deposited; and (b) the lift mechanism to control the distance dynamically during the process (before plasma, during plasma, after plasma) to control the side of the deposition, profile of the deposition, and deposition film properties. In another embodiment, for a deposition mode used to deposit on the back-side of the wafer, film edge exclusion control is highly desirable to avoid lithography-related overlay problems. The lift mechanism used in this system is done via a carrier ring 124 that has a design feature to shadow the deposition on the edge. This specifies the edge exclusion control via the design and shape of the carrier ring.

FIGS. 4A, 4B, and 4C respectively show bottom perspective views, bottom-up views, and side views of a wafer carrier ring 400 and station-varying support features 402a and 402b. As shown in FIG. 4A, a first processing station may have an element 401a having a first support feature 402a. FIG. 4A also shows how a second processing station may have an element 401b having a second support feature 402b. Elements 401a and 402b may be implementations of the spacers 130 of FIG. 1. Elements 401a and 401b and their associated support features 402a and 402b may be part of different processing stations in a multi-station processing tool such as the tools of FIGS. 2 and 3 (e.g., feature 402a may be present in a first station, while feature 402b may be present in a second station). In some embodiments, each processing station may have three or more support features to provide stability. Additionally, any number (all or just one, two, three, four, etc.) of the support features may be station-varying (e.g., engaging with the underside of the wafer at different locations, depending upon which station the wafer is at).

FIGS. 4A, 4B, and 4C also illustrate that, in some embodiments, wafer carrier ring 400 includes a plurality of wafer holding features 406 that supports a wafer or other substrate. When the wafer carrier ring 400 is lifted (e.g., for movement between stations or for a processing operation), the wafer holding features 406 may engage with the underside of a wafer. The wafer holding features 406 may be disposed along the inner perimeter of the wafer carrier ring 400 in sufficient number and with appropriate spacing to hold the wafer in a stable manner. In particular, there may be at least three wafer holding features 406 spaced sufficiently apart to maintain stability of a wafer. In other embodiments, an inner perimeter of the topside of the wafer carrier ring 400 may serve as a wafer holding feature (and features 406 may be optionally omitted).

As part of a backside deposition, the wafer carrier ring 400 may transport a wafer into a first processing station in a multi-station processing system. The wafer carrier ring 400 may be conveyed within the system by spider forks 132, paddles, or the like. The wafer carrier ring 400 may then be lowered (e.g., by lowering the spider forks) within the first station until the wafer rests upon a first set of wafer support features including feature 402a. A backside deposition process may then be performed within the first processing station. Subsequently, the wafer carrier ring 400 and wafer can be lifted, transported to a second processing station, and lowered within the second station until the wafer rests upon a second set of wafer support features including feature 402b. In such embodiments, the carrier ring 400 travels with the wafer from station-to-station and particular portions of station-specific support features, such as the support features 402a and 402b, contact the wafer apart from the carrier ring.

As shown in FIGS. 4A, 4B, and 4C; the support features such as feature 402a of the first processing station may be configured to hold a wafer at a first set of positions (which may be just to the left of the wafer holding feature 406 of the wafer carrier ring 400, in the manner of feature 402a). In contrast, the support features such as feature 402b of the second processing station may be configured to hold the wafer at a second set of positions (which may be just to the right of the wafer holding feature 406, in the manner of feature 402b). Because of this arrangement, backside deposition within the first processing station may be blocked at the first set of positions and backside deposition within the second processing station may be blocked at the second set of positions. However, because the first and second sets of positions are non-overlapping, backside deposition within the second processing station can at least partially fill any voids left by the blockage of support features such as feature 402a. Similarly, if backside deposition occurs in the first station after backside deposition in the second station, then backside deposition within the first station can at least partially fill any voids left by the blockage of support features such as feature 402b. With arrangements of these types, a backside film can be formed that is free of full-thickness voids. An example of these benefits is illustrated in FIG. 6.

FIG. 6 includes bottom-up images 600-604 of a wafer being processed in two stations of a multi-station processing tool. FIG. 6 is equally applicable to deposition processes, etch processes, and other fabrication processes, however the following discussion is described in terms of deposition for the sake of clarity and expediency.

Image 600 shows a wafer 610 supported by three or more support features 402a of a first processing station in a multi-station processing tool. Image 600 shows the wafer 610 prior to initial deposition of a film in the first processing station.

Image 601 shows the wafer 610 after the initial deposition of the film in the first processing station. The initial deposition of the film is indicated by a relatively light shading or stippling of wafer 610, relative to image 603.

Image 602 shows the wafer 610 after the wafer is transferred to a second processing station in the multi-station processing tool. Image 602 shows the wafer 610 prior to an additional deposition of a film in the second processing station. In the second processing station, the wafer 610 is supported by three or more support features 402b, which engage with the wafer 610 at different locations than support features 402a. Thus, the portions 612 of wafer 610 previously in contact with support features 402a are now uncovered and exposed when the wafer 610 is in the second processing station. As can be seen in image 602, the film deposited between images 600 and 601 was not deposited onto portions 612 of the wafer 610, as the support features 402 were blocking deposition onto portions 612.

Image 603 shows the wafer 610 after the additional deposition of the film in the second processing station. The additional deposition of the film is indicated by a relatively dark shading or stippling of wafer 610, relative to image 601. As shown in image 603, at least some thickness of film is deposited onto the portions 612, which were previously obscured by support features 402a. As indicated by the relatively light shading or stippling of portions 612 in image 603, the amount (e.g., thickness) of film deposited in portions 612 may be slightly less than the average amount (e.g., thickness) of film deposited across the wafer 610.

Image 604 shows the wafer 610 after the additional deposition of the film in the second processing station and with the support features 401b and other components removed for clarity. As shown in image 604, a relatively smaller (e.g., thinner) amount of film has been deposited on the portions 612 and 614 than was deposited across the remainder of the wafer 610. Images 600-604 thus illustrate how station-varying support features can avoid any full-thickness voids during deposition process. It is noted that similar results can be achieved in etching and other fabrication operations. As an example, when the techniques disclosed herein are applied in the etching context, the station-varying support features can avoid any areas from being completely unetched. Images 600-604 also illustrate how the support features 402a of the first processing station support the wafer 610 at a first set of positions, the support features 402a of the second processing station support the wafer at a second set of positions, and the first and second sets of positions are non-overlapping.

FIG. 5 shows a control module 500 for controlling the systems described above. In one embodiment, the control module 110 of FIG. 1 may include some of the example components. For instance, the control module 500 may include a processor, memory and one or more interfaces. The control module 500 may be employed to control devices in the system based in part on sensed values. For example only, the control module 500 may control one or more of valves 502, filter heaters 504, pumps 506, and other devices 508 based on the sensed values and other control parameters. The control module 500 receives the sensed values from, for example only, pressure manometers 510, flow meters 512, temperature sensors 514, and/or other sensors 516. The control module 500 may also be employed to control process conditions during precursor delivery and deposition of the film. The control module 500 will typically include one or more memory devices and one or more processors.

The control module 500 may control activities of the precursor delivery system and deposition apparatus. The control module 500 executes computer programs including sets of instructions for controlling process timing, delivery system temperature, pressure differentials across the filters, valve positions, mixture of gases, chamber pressure, chamber temperature, wafer temperature, RF power levels, wafer chuck or pedestal position, and other parameters of a particular process. The control module 500 may also monitor the pressure differential and automatically switch vapor precursor delivery from one or more paths to one or more other paths. Other computer programs stored on memory devices associated with the control module 500 may be employed in some embodiments.

Typically there will be a user interface associated with the control module 500. The user interface may include a display 518 (e.g. a display screen and/or graphical software displays of the apparatus and/or process conditions), and user input devices 520 such as pointing devices, keyboards, touch screens, microphones, etc.

Computer programs for controlling delivery of precursor, deposition and other processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program.

The control module parameters relate to process conditions such as, for example, filter pressure differentials, process gas composition and flow rates, temperature, pressure, plasma conditions such as RF power levels and the low frequency RF frequency, cooling gas pressure, and chamber wall temperature.

The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the inventive deposition processes. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, heater control code, and plasma control code.

A substrate positioning program may include program code for controlling chamber components that are used to load the substrate onto a pedestal or chuck and to control the spacing between the substrate and other parts of the chamber such as a gas inlet and/or target. A process gas control program may include code for controlling gas composition and flow rates and optionally for flowing gas into the chamber prior to deposition in order to stabilize the pressure in the chamber. A filter monitoring program includes code comparing the measured differential(s) to predetermined value(s) and/or code for switching paths. A pressure control program may include code for controlling the pressure in the chamber by regulating, e.g., a throttle valve in the exhaust system of the chamber. A heater control program may include code for controlling the current to heating units for heating components in the precursor delivery system, the substrate and/or other portions of the system. Alternatively, the heater control program may control delivery of a heat transfer gas such as helium to the wafer chuck.

Examples of sensors that may be monitored during deposition include, but are not limited to, mass flow control modules, pressure sensors such as the pressure manometers 510, and thermocouples located in delivery system, the pedestal or chuck (e.g. the temperature sensors 514). Appropriately programmed feedback and control algorithms may be used with data from these sensors to maintain desired process conditions. The foregoing describes implementation of embodiments of the invention in a single or multi-chamber semiconductor processing tool.

In some embodiments, the plasma may be monitored in-situ by one or more plasma monitors. In one scenario, plasma power may be monitored by one or more voltage, current sensors (e.g., VI probes). In another scenario, plasma density and/or process gas concentration may be measured by one or more optical emission spectroscopy sensors (OES). In some embodiments, one or more plasma parameters may be programmatically adjusted based on measurements from such in-situ plasma monitors. For example, an OES sensor may be used in a feedback loop for providing programmatic control of plasma power. It will be appreciated that, in some embodiments, other monitors may be used to monitor the plasma and other process characteristics. Such monitors may include, but are not limited to, infrared (IR) monitors, acoustic monitors, and pressure transducers.

Any suitable chamber may be used to implement the disclosed embodiments. Example deposition apparatuses include, but are not limited to, apparatus from the ALTUS® product family, the VECTOR® product family, and/or the SPEED® product family, each available from Lam Research Corp., of Fremont, California, or any of a variety of other commercially available processing systems. Two or more of the stations may perform the same functions. Similarly, two or more stations may perform different functions. Each station can be designed/configured to perform a particular function/method as desired.

System control logic may be configured in any suitable way. In general, the logic can be designed or configured in hardware and/or software. The instructions for controlling the drive circuitry may be hard coded or provided as software. The instructions may be provided by “programming.” Such programming is understood to include logic of any form, including hard coded logic in digital signal processors, application-specific integrated circuits, and other devices which have specific algorithms implemented as hardware. Programming is also understood to include software or firmware instructions that may be executed on a general purpose processor. System control software may be coded in any suitable computer readable programming language.

The computer program code for controlling processes in a process sequence can be written in any conventional computer readable programming language: for example, assembly language, C, C++, Pascal, Fortran, or others. Compiled object code or script is executed by the processor to perform the tasks identified in the program. Also as indicated, the program code may be hard coded.

The controller parameters relate to process conditions, such as, for example, process gas composition and flow rates, temperature, pressure, cooling gas pressure, substrate temperature, and chamber wall temperature. These parameters are provided to the user in the form of a recipe, and may be entered utilizing the user interface. Signals for monitoring the process may be provided by analog and/or digital input connections of the system controller. The signals for controlling the process are output on the analog and digital output connections of the deposition apparatus.

The system software may be designed or configured in many different ways. For example, various chamber component subroutines or control objects may be written to control operation of the chamber components necessary to carry out the deposition processes (and other processes, in some cases) in accordance with the disclosed embodiments. Examples of programs or sections of programs for this purpose include substrate positioning code, process gas control code, pressure control code, and heater control code.

In some implementations, a controller is part of a system, which may be part of the above-described examples. Such systems can include semiconductor processing equipment, including a processing tool or tools, chamber or chambers, a platform or platforms for processing, and/or specific processing components (a wafer pedestal, a gas flow system, etc.). These systems may be integrated with electronics for controlling their operation before, during, and after processing of a semiconductor wafer or substrate. The electronics may be referred to as the “controller,” which may control various components or subparts of the system or systems. The controller, depending on the processing requirements and/or the type of system, may be programmed to control any of the processes disclosed herein, including the delivery of processing gases, temperature settings (e.g., heating and/or cooling), pressure settings, vacuum settings, power settings, radio frequency (RF) generator settings in some systems, RF matching circuit settings, frequency settings, flow rate settings, fluid delivery settings, positional and operation settings, wafer transfers into and out of a tool and other transfer tools and/or load locks connected to or interfaced with a specific system.

Broadly speaking, the controller may be defined as electronics having various integrated circuits, logic, memory, and/or software that receive instructions, issue instructions, control operation, enable cleaning operations, enable endpoint measurements, and the like. The integrated circuits may include chips in the form of firmware that store program instructions, digital signal processors (DSPs), chips defined as application specific integrated circuits (ASICs), and/or one or more microprocessors, or microcontrollers that execute program instructions (e.g., software). Program instructions may be instructions communicated to the controller in the form of various individual settings (or program files), defining operational parameters for carrying out a particular process on or for a semiconductor wafer or to a system. The operational parameters may, in some embodiments, be part of a recipe defined by process engineers to accomplish one or more processing steps during the fabrication of one or more layers, materials, metals, oxides, silicon, silicon dioxide, surfaces, circuits, and/or dies of a wafer.

The controller, in some implementations, may be a part of or coupled to a computer that is integrated with, coupled to the system, otherwise networked to the system, or a combination thereof. For example, the controller may be in the “cloud” or all or a part of a fab host computer system, which can allow for remote access of the wafer processing. The computer may enable remote access to the system to monitor current progress of fabrication operations, examine a history of past fabrication operations, examine trends or performance metrics from a plurality of fabrication operations, to change parameters of current processing, to set processing steps to follow a current processing, or to start a new process. In some examples, a remote computer (e.g. a server) can provide process recipes to a system over a network, which may include a local network or the Internet. The remote computer may include a user interface that enables entry or programming of parameters and/or settings, which are then communicated to the system from the remote computer. In some examples, the controller receives instructions in the form of data, which specify parameters for each of the processing steps to be performed during one or more operations. It should be understood that the parameters may be specific to the type of process to be performed and the type of tool that the controller is configured to interface with or control. Thus as described above, the controller may be distributed, such as by comprising one or more discrete controllers that are networked together and working towards a common purpose, such as the processes and controls described herein. An example of a distributed controller for such purposes would be one or more integrated circuits on a chamber in communication with one or more integrated circuits located remotely (such as at the platform level or as part of a remote computer) that combine to control a process on the chamber.

Without limitation, example systems may include a plasma etch chamber or module, a deposition chamber or module, a spin-rinse chamber or module, a metal plating chamber or module, a clean chamber or module, a bevel edge etch chamber or module, a physical vapor deposition (PVD) chamber or module, a chemical vapor deposition (CVD) chamber or module, an atomic layer deposition (ALD) chamber or module, an atomic layer etch (ALE) chamber or module, an ion implantation chamber or module, a track chamber or module, and any other semiconductor processing systems that may be associated or used in the fabrication and/or manufacturing of semiconductor wafers.

In this application, the terms “semiconductor wafer,” “wafer,” “substrate,” “wafer substrate,” and “partially fabricated integrated circuit” are used interchangeably. One of ordinary skill in the art would understand that the term “partially fabricated integrated circuit” can refer to a silicon wafer during any of many stages of integrated circuit fabrication thereon. A wafer or substrate used in the semiconductor device industry typically has a diameter of 200 or 300 mm, though the industry is moving toward adoption of 450 mm diameter substrates. The description herein uses the terms “front” and “back” to describe the different sides of a wafer substrate. It is understood that the front side is where most deposition and processing occurs, and where the semiconductor devices themselves are fabricated. The back side is the opposite side of the wafer, which typically experiences minimal or no processing during fabrication.

The flow rates and power levels provided herein are appropriate for processing on 300 mm substrate, unless otherwise specified. One of ordinary skill in the art would appreciate that these flows and power levels may be adjusted as necessary for substrates of other sizes. The following detailed description assumes the invention is implemented on a wafer. However, the invention is not so limited. The work piece may be of various shapes, sizes, and materials. In addition to semiconductor wafers, other work pieces that may take advantage of this invention include various articles such as printed circuit boards and the like.

The apparatus/process described herein may be used in conjunction with lithographic patterning tools or processes, for example, for the fabrication or manufacture of semiconductor devices, displays, LEDs, photovoltaic panels and the like. Typically, though not necessarily, such tools/processes will be used or conducted together in a common fabrication facility. Lithographic patterning of a film typically includes some or all of the following operations, each operation enabled with a number of possible tools: (1) application of photoresist on a workpiece, i.e., substrate, using a spin-on or spray-on tool; (2) curing of photoresist using a hot plate or furnace or UV curing tool; (3) exposing the photoresist to visible or UV or x-ray light with a tool such as a wafer stepper; (4) developing the resist so as to selectively remove resist and thereby pattern it using a tool such as a wet bench; (5) transferring the resist pattern into an underlying film or workpiece by using a dry or plasma-assisted etching tool; and (6) removing the resist using a tool such as an RF or microwave plasma resist stripper.

CONCLUSION

Although the foregoing embodiments have been described in some detail for purposes of clarity of understanding, it will be apparent that certain changes and modifications may be practiced within the scope of the appended claims. It should be noted that there are many alternative ways of implementing the processes, systems, and apparatus of the present embodiments. Accordingly, the present embodiments are to be considered as illustrative and not restrictive, and the embodiments are not to be limited to the details given herein.

MULTI-STATION PROCESSING TOOLS WITH STATION-VARYING SUPPORT FEATURES FOR BACKSIDE PROCESSING

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