This application claims the priority benefit of Taiwan application serial no. 97136721, filed on Sep. 24, 2008. The entirety of the above-mentioned patent application is hereby incorporated by reference herein and made a part of specification.
1. Technical Field
The disclosure relates to a package structure and a substrate with at least one alignment pattern. More particularly, analysing the bonding quality of the package structure can be assisted by fabricating alignment patterns on a substrate.
2. Background Art
With development of semiconductor fabrication technology, structure of integrated circuits (ICs) is increasingly delicate and functions thereof are increasingly complicated. Therefore, development of semiconductor package technology also has a general trend of delicacy. A conventional wire bonding technique is no longer suitable for a package process of high-density and small-size ICs. Therefore, package techniques for a chip and a carrier and for the carrier and a circuit board are required to be improved.
A flip chip (FC) bonding package technique is widely applied to devices requiring a high performance, high density and small size package. According to such package technique, corresponding contacts are formed on conductive structures of two substrates to be bonded. Then, one of the substrates is turned over for bonding all of the corresponding contacts on the two substrates, so as to complete a FC package structure. Therefore, the package structure is conceptually formed based on a ball grid array (BGA) structure.
However, contact microstructures of the FC package and the BGA device are generally analysed via a substrate polishing method, and the bonding quality thereof are analysed by observing the contact microstructures. However, the contacts of the FC package are located between two substrates, and correct positions of the contacts cannot be identified from an appearance of the product. A current method is only to identify the contact positions via the substrate polishing method before the bonding quality analysis. In detail, according to the conventional substrate polishing method, the substrate is slowly polished from the most peripheral line of contacts towards a contact position to be observed, so as to avoid excessive polishing, and then the contact microstructures are identified. However, since the method of polishing the substrate towards the contact position to be observed is not easy to be accurately controlled, and whether a central portion of the contact to be observed is approached is not easily confirmed, a difficulty of bonding quality analysis of the package structure is greatly increased.
The embodiment is directed to a package structure and a substrate with an alignment pattern and a bonding quality analysis method of the package structure for resolving a problem of a conventional method that when a substrate is polished for observing a contact, whether a central portion of a contact microstructure to be observed is approached cannot be accurately controlled.
The embodiment provides a package structure with an alignment pattern, which includes a first substrate, a second substrate and at least one contact. At least one first conductive structure and at least one first alignment pattern are disposed on the first substrate. The second substrate is disposed opposite to the first substrate, and at least one second conductive structure is disposed on the second substrate. The at least one contact is located between the first conductive structure of the first substrate and the second conductive structure of the second structure. Particular, the at least one first alignment pattern has at least one widest part and at least one narrowest part, and the widest part or the narrowest part is aligned or close to a central portion of the at least one contact.
Another embodiment provides a substrate structure with an alignment pattern, which includes a substrate and at least one contact. At least one conductive structure and at least one first alignment pattern are disposed on the substrate. The at least one contact is located on the conductive structure of the substrate. Moreover, the at least one first alignment pattern has at least one widest part and at least one narrowest part, and the widest part or the narrowest part is aligned or close to a central portion of the at least one contact.
Another embodiment provides a package structure with an alignment pattern, which includes a substrate, at least a chip and at least one contact. The substrate has at least one conductive structure. The chip is embedded in the substrate, and is electrically connected to the conductive structure in the substrate, wherein a surface of the chip has at least one alignment pattern. The at least one contact is disposed on an outer surface of the substrate. The at least one alignment pattern has at least one widest part and at least one narrowest part, and the widest part or the narrowest part is aligned or close to a central portion of the at least one contact.
Since the alignment pattern is designed on the package structure or the chip, when the substrate is polished for analysing the bonding quality of the package structure, whether the polishing process reaches the central portion of the contact can be accurately determined by observing the alignment pattern.
The accompanying drawings are included to provide a further understanding of the embodiment, and are incorporated in and constitute a part of this specification. The drawings illustrate embodiments and, together with the description, serve to explain the principles of the embodiment.
In the following, a plurality of embodiments is provided to describe a package structure with an alignment pattern and a bonding quality analysis method of the package structure with reference of figures, so that those skilled in the art can understand the concept of the embodiment.
As shown in
Moreover, the first alignment patterns 116a-116e are formed on the first substrate 111, which can be, for example, defined together with the first conductive structure 114. In other words, during fabrication of the outermost layer of metal of the integrated circuit, the outermost layer of metal of the RDL, or the surface copper wiring of the PCB, the alignment patterns can be simultaneously fabricated on the substrate.
In the embodiment, the widest part or the narrowest part of each of the first alignment patterns 116a-116e is aligned or close to a central portion of each of the contacts 113. The central portion of the contact can be totally aligned to the widest part or the narrowest part of the alignment pattern, or the central portion of the contact can be close to the widest part or the narrowest part of the alignment pattern, which is not totally aligned thereto, directly. In the following content, the central portion of the contact totally aligned to the widest part or the narrowest part of the alignment pattern is first taken as an example.
For example, the narrowest part of the alignment pattern 116a is aligned to the central portion of the contact 113. The widest part of the alignment pattern 116b is aligned to the central portion of the contact 113. A purpose of aligning the widest parts or the narrowest parts of the alignment patterns 116a-116e to the central portions of the contacts 113 is that when a substrate polishing is performed for analysing the contacts, as polished positions of the substrate are varied, exposed positions of the alignment patterns are also varied. Therefore, by determining the positions of the widest parts or the narrowest parts of the alignment patterns, whether the central portion of the contact is approached can be determined, so that the alignment patterns can serve as reference patterns for the substrate polishing.
Moreover, in the embodiment, as shown in
Moreover, the first alignment patterns 116a-116e can be consecutively arranged, which is shown as the arrangement of the alignment patterns 116a and 116b; or can be inconsecutively arranged, which is shown as the arrangement of the alignment patterns 116c. Moreover, sizes of the first alignment patterns 116a-116e can be different, for example, the size of the alignment pattern 116a is greater than that of the alignment pattern 116b. In addition, shapes of the first alignment patterns 116a-116e are for example, diamonds, though the present invention is not limited thereto. In other embodiments, the shapes of the first alignment patterns 116a-116e can also be other geometric patterns such as diamonds, rounds, ovals, parallelograms, squares, triangles or polygons.
Besides, as shown in
It should be noted that in the embodiment, the contacts 113 arranged on the first conductive structure 114 of the first substrate 111 are for example, a ball grid array (BGA) structure, which is for example a solder BGA. However, the embodiment is not limited thereto, and in other embodiments, the contacts 113 can also be metal bumps, or can be formed by polymer bumps and a metal layer covering the polymer bumps.
Referring to
Moreover, in the embodiment, at least one second alignment pattern 117a-117e is disposed on the surface of the second substrate 112, and shapes thereof can be the same or different to that of the first alignment patterns 116a-116e. Similarly, each of the second alignment patterns 117a-117e has at least one widest part and at least one narrowest part, and after the second substrate 112 is bonded to the first substrate 111, the widest parts or the narrowest parts of the second alignment patterns 117a-117e are aligned or close to the central portions of the contacts 113. The design and arrangement of the second alignment patterns 117a-117e are all similar to that of the first alignment patterns 116a-116e, and therefore detailed descriptions thereof are not repeated.
A method for analysing a bonding quality of the package structure having the alignment pattern is described in detail. First, after the first substrate 111 of
When the polishing process is just started, the widest parts or the narrowest parts of the alignment patterns 116a-116e are still not exposed, and now a fast polishing process can be performed. Then, when the widest part or the narrowest part of the alignment pattern 116a is about to be exposed, it represents that the first conductive structure 114 and the contact 113 are approached. Therefore, the polishing process can be slowed down to a slow polishing process.
As the slow polishing process continues, shapes of the alignment patterns on the substrate are varied. Next, referring to
Next, the polishing process is continued. Referring to
It should be noted that when the polishing process continues, if the exposed parts of the first alignment patterns 116a-116e and the second alignment patterns 117a-117e are not the widest parts or the narrowest parts, it represent that the substrate polishing still not approaches the central portions of the contacts 113, which is shown as a position c-c′ on the first substrate 111 and the second substrate 112 in
In the following content, the method of analysing the bonding quality of the package structure via polishing is further described in form of a flowchart.
Next, in step S315, when the widest parts or the narrowest parts of the alignment patterns are exposed, or when a position close to the widest parts or the narrowest parts of the alignment patterns is exposed, the polishing process is stopped. Now, the polishing process approaches the central portions of the contacts. Therefore, a detection and analysis device can be used to analyse the bonding quality of the package structure of the contacts (step S316), wherein the detection and analysis device includes an optical microscope (OM) or a scanning electron microscope (SEM). Finally, after an analysis result is obtained, the polishing process can be continued or stopped (step S317). In detail, after the bonding quality of the contacts is analysed in step S316, it represents that analysing of such row or column of the contacts is completed. Next, the polishing can be continued according to actual requirements for performing analysis to the contacts of a next row or a next column. If the polishing is selected to be continued in the step S317, the step S312 is then repeated, and if the polishing is selected to be stopped in the step S317, the flowchart is then ended.
The aforementioned package structure and the method for analysing the bonding quality of the package structure are all based on the package structure that the alignment patterns are designed on both two substrates, though the present invention is not limited thereto. In other embodiments, the alignment patterns can be disposed on only one of the substrate of the package structure, as that shown in
Moreover, in the aforementioned embodiment, the package structure includes two face-to-face bonded substrates, though the embodiment is not limited thereto. In other embodiment, the package structure can also include a plurality of stacked substrates shown in
It should be noted that in the embodiment, the widest part or the narrowest part of each of the first alignment patterns 116a-116e is aligned to the central portion of each of the contacts 113, as shown in
The package structure 130 of the embodiment includes a substrate 132 having a multi-layer structure and the chip 134 embedded in the substrate 132. The substrate 132 has at least one conductive structure 115′. The chip 134 is embedded in the substrate 132 and is electrically connected to the conductive structure 115′ in the substrate 132, and the surface of the chip 134 has at least one alignment pattern 118. Moreover, the contacts 113 are located at an outer surface of the substrate 132, wherein the alignment pattern 118 has at least one widest part and at least one narrowest part, and the widest part or the narrowest part is aligned or close to the central portion of the contact 113. A shape and an arrangement of the alignment pattern 118 on the surface of the chip 134 are the same or similar to that of the alignment patterns described in the aforementioned embodiments. The alignment pattern 118 can be any of the alignment patterns 116a-116e shown in
Similar to the package structure of the aforementioned embodiment, when the substrate polishing is performed for analysing the contacts, as polished positions of the substrate are varied, exposed positions of the alignment patterns on the chip are also varied. Therefore, by determining the positions of the widest parts or the narrowest parts of the alignment patterns on the chip, whether the central portion of the contact is approached can be determined, so that the alignment patterns can serve as reference patterns for the substrate polishing.
In summary, the embodiment provides a package structure with the alignment patterns and a method for analysing the bonding quality of the package structure. During analysing the bonding quality of the package structure, as the polishing process continues, the positions of the substrate can be identified by observing variations of the alignment patterns on the substrate or the chip, so as to avoid excessive substrate polishing.
It will be apparent to those skilled in the art that various modifications and variations can be made to the structure of the embodiment without departing from the scope or spirit of embodiment. In view of the foregoing, it is intended that the embodiment cover modifications and variations of this embodiment provided they fall within the scope of the following claims and their equivalents.
Number | Date | Country | Kind |
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97136721 | Sep 2008 | TW | national |