The present application relates to the field of panel-level package technologies, and in particular, to a panel-level package structure and a method for preparing the same.
As mobile consumption electronic products such as mobile phones, computers, or digital cameras have higher and higher requirements on functional integration, large storage space, high reliability and miniaturization package, a high-density micro-electronic package technology has become a mainstream of a new generation of electronic products. In order to cooperate with the development of the electronic products, chips used in the electronic products are developing towards a relatively high density, a relatively fast speed, a relatively small size and a relatively low cost. However, with the increasing variety of functions in current electronic products, the number of Input/Output (I/O) ports of a fan-in package structure cannot meet the requirements of the electronic products. Therefore, it is necessary to provide a new package structure to accommodate more numbers of I/O ports, reduce a size and a thickness of a chip, and integrate more heterogeneous chips.
In order to solve the forgoing technical problems, the present application provides a panel-level package structure and a method for preparing the same, so that integral package with a relatively large area can be achieved, which further improves package efficiency, thus reducing a package cost. During a package process, adopting a package structure with a double-sided symmetrical design may make products evenly stressed, which not only effectively solves problems of warping in products, but also greatly improves preparing efficiency, thus reducing a cost.
In order to achieve the foregoing purposes, a first aspect of the present application provides a panel-level package structure. The panel-level package structure includes a bonding layer; and a first temporary carrier and a second temporary carrier oppositely disposed on both sides of the bonding layer. Both the first temporary carrier and the second temporary carrier are connected to the bonding layer, and at least one bonding cavity is jointly formed by the bonding layer, the first temporary carrier and the second temporary carrier.
In at least one embodiment of the present application, the first temporary carrier is connected to the second temporary carrier through the bonding layer, to form an integral composite panel, and the integral composite panel is flat.
In at least one embodiment of the present application, the bonding layer adopts a closed structure, and an interior of the at least one bonding cavity has a vacuum negative pressure.
In the panel-level package structure provided by the present application, integral package with a relatively large area can be achieved, which further improves package efficiency, thus reducing a package cost. During a package process, adopting a package structure with a double-sided symmetrical design may make products evenly stressed, which not only effectively solves problems of warping in products, but also greatly improves preparing efficiency, thus reducing a cost.
In at least one embodiment of the present application, the bonding layer is circumferentially disposed along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier, to bond the first temporary carrier and the second temporary carrier into an integral composite panel.
In at least one embodiment of the present application, the bonding layer includes a first bonding layer, and the first bonding layer adopts a closed pattern.
In at least one embodiment of the present application, the bonding layer further includes a second bonding layer, the second bonding layer is disposed at an interior enclosed by the first bonding layer, and a cavity located at the interior enclosed by the first bonding layer is divided into regions by the second bonding layer.
In at least one embodiment of the present application, the cavity located at the interior enclosed by the first bonding layer is equally divided into at least four equally-divided bonding cavities by the second bonding layer.
In at least one embodiment of the present application, the cavity located at the interior enclosed by the first bonding layer is equally divided into two equally-divided bonding cavities by the second bonding layer along a direction of a diagonal of the interior enclosed by the first bonding layer.
In at least one embodiment of the present application, at least one rectangular second bonding layer is disposed centered on a center point of the interior enclosed by the first bonding layer.
In at least one embodiment of the present application, four corners of the interior enclosed by the first bonding layer are respectively disposed with the second bonding layer having a rectangular shape.
In at least one embodiment of the present application, the first temporary carrier and the second temporary carrier respectively include a plastic package layer, a chip is disposed on the plastic package layer, and a plurality of chip conductive bumps are connected to the chip.
In at least one embodiment of the present application, an exhaust part is disposed on the bonding layer, to form a non-closed bonding layer, so that an air pressure inside the at least one bonding cavity and an air pressure outside the at least one bonding cavity are consistent.
In at least one embodiment of the present application, the exhaust part includes a plurality of exhaust grooves, and the plurality of exhaust grooves are disposed at four corners of the non-closed bonding layer or at a middle position of the non-closed bonding layer.
In at least one embodiment of the present application, the exhaust part includes a plurality of exhaust holes, and the plurality of exhaust holes are evenly disposed on the non-closed bonding layer.
In at least one embodiment of the present application, the non-closed bonding layer is circumferentially disposed along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier, to bond the first temporary carrier and the second temporary carrier into an integral composite panel enclosed on all sides.
In at least one embodiment of the present application, the non-closed bonding layer includes a first non-closed bonding layer and a second non-closed bonding layer, the first non-closed bonding layer is circumferentially disposed along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier, the second non-closed bonding layer is disposed at an interior enclosed by the first non-closed bonding layer, and the interior enclosed by the first non-closed bonding layer is divided into regions by the second non-closed bonding layer, to bond the first temporary carrier and the second temporary carrier into an integral composite panel.
In at least one embodiment of the present application, a cavity located at the interior enclosed by the first non-closed bonding layer is equally divided into at least four equally-divided bonding cavities by the second non-closed bonding layer, and the exhaust part is disposed at a center position of an interior of the first non-closed bonding layer.
In at least one embodiment of the present application, at least one rectangular second non-closed bonding layer is disposed centered on a center point of the interior enclosed by the first non-closed bonding layer.
In at least one embodiment of the present application, the first temporary carrier and the second temporary carrier respectively include a plastic package layer, an insulating layer and a carrier sheet are sequentially disposed on the plastic package layer, and at least two chips are disposed between the insulating layer and the plastic package layer.
In at least one embodiment of the present application, the first temporary carrier and the second temporary carrier respectively include a plurality of chip conductive bumps, and the at least two chips are connected to the plurality of chip conductive bumps.
In at least one embodiment of the present application, a structure of the first temporary carrier and a structure of the second temporary carrier are the same, the first temporary carrier and the second temporary carrier are disposed in parallel, and the first temporary carrier and the second temporary carrier are symmetric relative to the bonding layer.
The present application further provides a method for preparing a panel-level package structure, the method for preparing the panel-level package structure includes coating a bonding layer on a first temporary carrier or a second temporary carrier, and pressing the first temporary carrier and the second temporary carrier into an integral composite panel, an interior of the integral composite panel comprising at least one bonding cavity jointly formed by the bonding layer, the first temporary carrier and the second temporary carrier; separating carrier sheets oppositely disposed on surfaces of the integral composite panel, to form a bonding board; and after preparation of the bonding board is finished, separating, by a cutting manner, temporary bonding layers on the bonding board, to obtain the panel-level package structure.
In at least one embodiment of the present application, an interior of the at least one bonding cavity has a vacuum negative pressure; and the coating a bonding layer on a first temporary carrier or a second temporary carrier includes: coating the bonding layer circumferentially along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier; or coating a first bonding layer circumferentially along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier, and disposing a second bonding layer at an interior enclosed by the first bonding layer, the interior enclosed by the first bonding layer being divided into regions by the second bonding layer.
In at least one embodiment of the present application, an exhaust part is disposed on the bonding layer; and the coating a bonding layer on a first temporary carrier or a second temporary carrier includes: coating a non-closed bonding layer circumferentially along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier; or coating a first non-closed bonding layer circumferentially along a position of a periphery of the first temporary carrier or a position of a periphery of the second temporary carrier, and disposing a second non-closed bonding layer at an interior enclosed by the first non-closed bonding layer, the interior enclosed by the first non-closed bonding layer being divided into regions by the second non-closed bonding layer.
In at least one embodiment of the present application, the pressing the first temporary carrier and the second temporary carrier into an integral composite panel includes: closing and pressing the first temporary carrier and the second temporary carrier by a vacuum bonding device, so that the at least one bonding cavity can be formed between the first temporary carrier and the second temporary carrier.
It should be noted that words such as “first” and “second” are used to define parts, which are merely intended to distinguish corresponding parts, and unless otherwise stated, the above words have no special meaning, and therefore, the above words cannot be understood as a limitation to the protection scope of the present application.
A Fan-out (FO) package structure as a type of wafer-level package has many advantages such as a large number of input/output ports and high integration flexibility (such as the ability to achieve multi-chip integration in a vertical direction and in a horizontal direction), and therefore, the Fan-out package structure is commonly used for multi-chip package, ultra-thin package, three-dimensional system-level package or the like. The appearance of Wafer-level Fan-out package (WLFOP) greatly increases the number of I/O ports of a package body, and matches with a development direction of multifunctionality of a chip. Due to an increasing demand of the market, in order to break a size limitation of an existing wafer, a PCB-level preparation concept is combined with a semiconductor wafer-level package method, so as to package consumer, high-speed computing and professional electronic products, so that the requirement for package miniaturization is achieved, and preparing efficiency is improved, thus effectively reducing a preparing cost.
In order to further reduce a cost, manufacturers start to use a panel with a relatively large size as a carrier. The appearance of a panel-level fan-out package technology can effectively achieve integral package with a relatively large area, which further improves package efficiency, thus reducing a package cost, so that there is a relatively wide development prospect. At present, a silicon wafer of 300*300 mm2 may be used to produce approximately 600 ICs, and if the panel-level fan-out package technology is used, the number of ICs packaged on a panel of 500*500 mm2 may be up to 2600, i.e., package yield on the panel of 500*500 mm2 is more than four times fan-out package yield on the wafer of 300*300 mm2. Therefore, a cost may be effectively reduced, and competitiveness of products is increased. The panel-level fan-out package technology has many advantages such as a relatively low cost, a flexible design, a good electric heating property, diverse commercial models and wide application fields. However, a package structure with a single-sided design is used in an existing panel-level fan-out package technology. Since during a preparing process, products may have problems of warping due to uneven stress distribution in the panel-level fan-out package structure with the single-sided design, preparing efficiency is greatly reduced, thus increasing a preparing cost.
In view of this, at least one embodiment of the present application provides a panel-level package structure, to solve the technical problems of uneven stress distribution in a panel-level fan-out package structure with a single-sided design. The panel-level package structure includes a bonding layer; and a first temporary carrier and a second temporary carrier oppositely disposed on both sides of the bonding layer. The bonding layer is connected to the first temporary carrier and the second temporary carrier, respectively, and at least one bonding cavity is jointly formed by the bonding layer, the first temporary carrier and the second temporary carrier.
In at least one embodiment of the present application, the bonding cavity adopts a closed structure, and an interior of the bonding cavity has a vacuum negative pressure. The panel-level package structure is described below with reference to
As shown in
As shown in
As shown in
As shown in
The first bonding layer 20 is circumferentially disposed along the position of the periphery 22 of the first temporary carrier 8 or the position of the periphery 22 of the second temporary carrier 9, and the second bonding layer 21 is disposed at the interior enclosed by the first bonding layer 20, to divide the interior enclosed by the first bonding layer 20 into regions. The second bonding layer 21 is disposed at the interior enclosed by the first bonding layer 20, so that a bonding area may be increased, thus making the bonding between the first temporary carrier 8 and the second temporary carrier 9 relatively stable. Manners of disposing the second bonding layer 21 are not limited to the manners shown in
At least one embodiment of the present application provides a method for preparing a panel-level package structure. As shown in
S1: coating a bonding layer 15 on a first temporary carrier 8 or a second temporary carrier 9, and pressing the first temporary carrier 8 and the second temporary carrier 9 into an integral composite panel, a bonding cavity whose interior has a vacuum negative pressure being formed in the integral composite panel.
S2: separating carrier sheets 10 oppositely disposed on surfaces of the integral composite panel, to form a bonding board.
S3: after preparation of the bonding board is finished, separating, by a cutting manner, temporary bonding layers 11 on the bonding board, to obtain the panel-level package structure.
The coating a bonding layer 15 on a first temporary carrier 8 or a second temporary carrier 9 in the step S1 further includes the following step:
The pressing the first temporary carrier 8 and the second temporary carrier 9 into an integral composite panel in the step S1 further includes the following step:
In a vacuum negative pressure environment, the first temporary carrier 8 and the second temporary carrier 9 are closed and pressed by the vacuum bonding device, which can make the interior of the bonding cavity have the vacuum negative pressure during a pressing process.
At least one embodiment of the present application provides a method for preparing a panel-level package structure. As shown in
S21: coating a bonding layer 15 on a first temporary carrier 8 or a second temporary carrier 9, and pressing the first temporary carrier 8 and the second temporary carrier 9 into an integral composite panel, a bonding cavity 23 whose interior has a vacuum negative pressure being formed in the integral composite panel.
S22: separating carrier sheets 10 oppositely disposed on surfaces of the integral composite panel, to form a bonding board.
S23: after preparation of the bonding board is finished, separating, by a cutting manner, temporary bonding layers 11 on the bonding board, to obtain the panel-level package structure.
S24: forming, by a re-wiring process, multiple circuit layers on the panel-level package structure. A first insulating layer 16 and a second insulating layer 18 are sequentially disposed on a plastic package layer 14. A first line layer 17 is connected to a chip conductive bump 13, and a second line layer 19 is connected to the first line layer 17, to obtain a structure obtained after the multiple circuit layers are formed on the panel-level package structure.
S25: separating, along the bonding cavity 23, the structure obtained after the multiple circuit layers are formed on the panel-level package structure, to obtain two fan-out structures.
In order to solve technical problems of explosion of a vacuum cavity and bulging of a vacuum cavity in a high-temperature baking environment, at least one embodiment of the present application provides a panel-level package structure with a connection between an interior and an exterior. A bonding cavity between a first bonding carrier and a second bonding carrier is connected to the exterior. The panel-level package structure is described below with reference to
As shown in
As shown in
A shape of the non-closed bonding layer 24 is substantially the same as a shape of the periphery 22 of the first temporary carrier 8 or a shape of the periphery 22 of the second temporary carrier 9. Both the shape of the non-closed bonding layer 24 and one of the shape of the periphery 22 of the first temporary carrier 8 and the shape of the periphery 22 of the second temporary carrier 9 are square. A perimeter of the periphery 22 of the first temporary carrier 8 or a perimeter of the periphery 22 of the second temporary carrier 9 is greater than a perimeter of the non-closed bonding layer 24, and a center and a center line of the first temporary carrier 8 or a center and a center line of the second temporary carrier 9 are substantially coincides with a center and a center line of an interior enclosed by the non-closed bonding layer 24, respectively. Setting the non-closed bonding layer 24 with a symmetrical structure may facilitate even stress distribution on surfaces of the first temporary carrier 8 and the second temporary carrier 9. In addition, a difference between the perimeter of the non-closed bonding layer 24 and one of the perimeter of the periphery 22 of the first temporary carrier 8 or the perimeter of the periphery 22 of the second temporary carrier 9 is less than a preset value, i.e., the non-closed bonding layer 24 is close to the position of the periphery 22 of the first temporary carrier 8 or the position of the periphery 22 of the second temporary carrier 9 as much as possible. In this way, warping in the periphery of the first temporary carrier 8 and warping in the periphery of the second temporary carrier 9 may be further avoided.
The plurality of exhaust grooves 27 are disposed at four corners of the non-closed bonding layer 24, and distances of any two pairs of adjacent exhaust grooves 27 are basically equal, which may make stress distribution on the surfaces of the first temporary carrier 8 and the second temporary carrier 9 relatively even, so as to avoid the warping on the surfaces of the first temporary carrier 8 and the second temporary carrier 9.
The non-closed bonding layer 24 is disposed circumferentially along the position of the periphery 22 of the first temporary carrier 8 or the position of the periphery 22 of the second temporary carrier 9, to bond the first temporary carrier 8 and the second temporary carrier 9 into the integral composite panel. In this way, integral package with a relatively large area can be achieved, which further improves package efficiency, thus reducing a package cost, and problems of warping in products are effectively solved while solving the technical problems of easy bulging of a package structure and explosion of a vacuum bonding cavity, thus improving security of chip package and yield of products.
As shown in
The plurality of exhaust grooves 27 are disposed at a midpoint of each of four edges of the non-closed bonding layer 24, so that stress distribution on surfaces of the first temporary carrier 8 and the second temporary carrier 9 may be relatively even, thus effectively solving problems of warping in products.
As shown in
The plurality of exhaust holes 28 are evenly disposed on the bonding layer 15 in
As shown in
The first non-closed bonding layer 25 is circumferentially disposed along the position of the periphery 22 of the first temporary carrier 8 or the position of the periphery 22 of the second temporary carrier 9, the second non-closed bonding layer 26 is disposed at the interior enclosed by the first non-closed bonding layer 25, and the interior enclosed by the first non-closed bonding layer 25 is divided into regions by the second non-closed bonding layer 26, so as to bond the first temporary carrier 8 and the second temporary carrier 9 into the integral composite panel. The cavity located at the interior enclosed by the first non-closed bonding layer 25 is equally divided into at least four equally-divided bonding cavities 23 by the second non-closed bonding layer 26 along the direction parallel to the sidewall of the first non-closed bonding layer 25, and the exhaust groove 27 is disposed at a center position of an interior of the first non-closed bonding layer 25, so that integral package with a relatively large area can be achieved, which further improves package efficiency, thus reducing a package cost, and problems of warping in products are effectively solved while solving the technical problems of easy bulging of a package structure and explosion of a vacuum bonding cavity, thus improving security of chip package and yield of products.
As shown in
As shown in
Manners of disposing the second non-closed bonding layer 26 are not limited to the manners shown in
At least one embodiment of the present application provides a method for preparing a panel-level package structure, and referring to
S31: disposing an exhaust part on a bonding layer, to form a non-closed bonding layer 24, and coating the non-closed bonding layer 24 on a first temporary carrier 8 or a second temporary carrier 9, to coat a discontinuous bonding adhesive pattern on the first temporary carrier 8 or the second temporary carrier 9; and pressing the first temporary carrier 8 and the second temporary carrier 9, to bond the first temporary carrier 8 and the second temporary carrier 9 into an integral composite panel, the bonding cavity 23 connected to an exterior being formed in the integral composite panel. The exhaust part is disposed on the non-closed bonding layer 24, so that an air pressure inside the bonding cavity 23 and an air pressure outside the bonding cavity 23 are consistent.
S32: separating carrier sheets 10 disposed oppositely on surfaces of the integral composite panel, to form a bonding board.
S33: after preparation of the bonding board is finished, separating, by a cutting manner, temporary bonding layers 11 on the bonding board, to obtain the panel-level package structure.
The step S21 in the method shown in
In a vacuum negative pressure environment, the first temporary carrier 8 and the second temporary carrier 9 are pressed by a vacuum bonding device, which can make an interior of a bonding cavity 23 have a vacuum negative pressure during a pressing process, and an exhaust part is disposed on the bonding layer 15, which makes an air pressure inside the bonding cavity 23 and an air pressure outside the bonding cavity 23 consistent.
The panel-level package structure with a connection between an interior and an exterior and the method for preparing the same provided by the present application have the following beneficial effects.
Firstly, according to the panel-level package structure provided by at least one embodiment of the present application, the bonding layer is disposed between the first temporary carrier and the second temporary carrier, so that integral package with a relatively large area can be achieved by the first temporary carrier, the second temporary carrier and the bonding layer, which further improves package efficiency, thus reducing a package cost.
Secondly, according to the panel-level package structure provided by at least one embodiment of the present application, the panel-level fan-out package structure with a double-sided symmetrical design is adopted, so that during a preparing process, products are evenly stressed, which not only effectively solves problems of warping in products, but also greatly improves preparing efficiency, thus reducing a cost.
Thirdly, according to the panel-level package structure provided by at least one embodiment of the present application, every two temporary carriers are bonded together, to obtain an integral composite panel enclosed on all sides. Each side of the first temporary carrier and each side of the second temporary carrier have tension after the first temporary carrier and the second temporary carrier are bonded together, so that the integral composite panel has a good flatness, which further improves problems of warping in products.
Fourthly, according to the panel-level package structure provided by at least one embodiment of the present application, the bonding layer is connected to both the first temporary carrier and the second temporary carrier, so that the bonding cavity may be formed in the integral composite panel. The structure obtained after the multiple circuit layers are formed on the panel-level fan-out package structure is separated along the bonding cavity, and therefore, disposal of the bonding cavity not only makes a separation effect good, but also improves separation efficiency.
Lastly, according to the panel-level package structure with a connection between an interior and an exterior provided by at least one embodiment of the present application, the non-closed bonding layer enclosed on all sides and having an exhaust part is disposed between two temporary carriers, so that the integral composite panel with a connection between an interior and an exterior and with an equivalent pressure is formed by the two temporary carriers, which solves the technical problems of explosion of a bonding cavity and bulging of a bonding cavity in a high-temperature baking environment, thus improving security of chip package and yield of products.
It should be understood that the present application is described by some embodiments, as a person skilled in the art knows, without departing from the spirit and scope of the present application, various changes or equivalent replacements can be made to these features and embodiments. In addition, under the teaching of the present application, these features and embodiments may be modified to adapt to specific situations and materials without departing from the spirit and scope of the present application. Therefore, the present application is not limited by the specific embodiments disclosed herein, various changes or equivalent replacements may fall within the scope of the claims of the present application, and all the embodiments falling within the scope of the claims of the present application fall within the protection scope of the present application.
Number | Date | Country | Kind |
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202111537150.2 | Dec 2021 | CN | national |
202123150765.8 | Dec 2021 | CN | national |
202221291175.9 | May 2022 | CN | national |
The present application is a continuation of International Application No. PCT/CN2022/118688, filed on Sep. 14, 2022, which claims priority to Chinese Patent Application No. 202111537150.2, filed on Dec. 15, 2021, Chinese Patent Application No. 202123150765.8, filed on Dec. 15, 2021, and Chinese Patent Application No. 202221291175.9, filed on May 27, 2022. The aforementioned applications are hereby incorporated by reference in their entireties.
Number | Date | Country | |
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Parent | PCT/CN2022/118688 | Sep 2022 | WO |
Child | 18743604 | US |