In a chemical synaptic connection, neurotransmitters are released from the pre-synaptic neuron into the synaptic cleft upon arrival of an action potential. These neurotransmitters diffuse across the synaptic cleft, couple with the receptors in the post-synaptic neuron, and trigger a subsequent action potential in the post-synaptic neuron. After firing, the pre-synaptic neuron runs out of neurotransmitters for release into the synaptic cleft upon the arrival of a subsequent action potential. As a consequence, the action potential is not transmitted to the post-synaptic neuron. This temporary interruption of the synaptic connection is referred to as short-term depression (STD). STD is an important form of signal modulation in the brain.
With the recent physical demonstration of memristive-based devices, low-power two terminal devices with memory and learning functions have advanced electronics and neuromorphic computing. In neuromorphic computing, CMOS and transistor circuits are designed to mimic architectures in the brain and synaptic connections between neurons whose conductivity is influenced by prior events. In memristive devices, typically slow moving ions are coupled with fast moving electrons. Ionic motion affords memory, with electronic current as the output signal.
Despite recent development of certain resistive devices having memory, improved architectures that facilitate improved characteristics and simplified operation are desirable.
This summary is provided to introduce a selection of concepts in a simplified form that are further described below in the Detailed Description. This summary is not intended to identify key features of the claimed subject matter, nor is it intended to be used as an aid in determining the scope of the claimed subject matter.
In one aspect, a memory device is provided. In one embodiment, the memory device operates based on proton resistivity and is capable of switching a device state between a high conductivity state and a low conductivity state, the memory device comprising:
a source electrode comprising palladium, palladium hydride, or a combination thereof;
a drain electrode comprising palladium, palladium hydride, or a combination thereof; and
a proton-conducting layer separating the source electrode and the drain electrode, wherein the proton-conducting layer blocks electron transport;
wherein the memory device is configured to operate by applying a first voltage between the source electrode and the drain electrode, thereby causing hydrogen ion transport from the source electrode into the proton-conducting layer and from the proton-conducting layer into the drain electrode to provide a hydrogen-depleted source electrode and a hydrogen-rich drain electrode; and
wherein the device state has memory, based on conductivity of the source electrode and the drain electrode, that depends on the amount of charge as H+ ions that has been transferred through the proton-conducting layer.
In another aspect, a memory element is provided. In one embodiment, the memory element includes at least one memory device according to the disclosed embodiments incorporated into an integrated circuit.
In another aspect, a method of operating a memory device according to any of the disclosed embodiments is provided. In one embodiment, the method includes:
providing the memory device in a loaded state, wherein the source electrode comprises palladium hydride and wherein the source electrode and the drain electrode are in electrical communication with a voltage source; and
applying a first positive voltage from the voltage source between the source electrode and the drain electrode, thereby causing hydrogen ion transport from the source electrode into the proton-conducting layer and from the proton-conducting layer into the drain electrode to provide a discharged state that includes a hydrogen-depleted source electrode and a hydrogen-rich drain electrode, wherein applying the first voltage results in a discharge current due to hydrogen ion transport between the source electrode and the drain electrode.
The foregoing aspects and many of the attendant advantages of this invention will become more readily appreciated as the same become better understood by reference to the following detailed description, when taken in conjunction with the accompanying drawings, wherein:
The equilibrium current measured well after ISD pulse is used as baseline to normalize the data. The total charge flux across the device for full depletion is proportional to the Pd thickness as thicker PdHx source contact contains more H to be depleted. VSD has a minimal effect on the total charge, although lower voltages correspond to smaller ISD and longer tspike.
Disclosed herein is a memory device operating based on proton conduction between a source electrode and a drain electrode through a proton-conducting layer. As the memory device operates, protons from the source migrate through the proton-conducting layer and into the drain electrode. The memory device exhibits memory, in the form of changing net conductivity, based on the amount of protons conducted from source to drain. The memory device can be reset by regenerating the source electrode (e.g., through electrical or chemical action). The memory device can be incorporated into an integrated circuit as a memory element. Related methods of using the memory device are also disclosed.
In one aspect, a memory device is provided. In one embodiment, the memory device operates based on proton resistivity and is capable of switching a device state between a high conductivity state and a low conductivity state, the memory device comprising:
a source electrode comprising palladium, palladium hydride, or a combination thereof;
a drain electrode comprising palladium, palladium hydride, or a combination thereof; and
a proton-conducting layer separating the source electrode and the drain electrode, wherein the proton-conducting layer blocks electron transport;
wherein the memory device is configured to operate by applying a first voltage between the source electrode and the drain electrode, thereby causing hydrogen ion transport from the source electrode into the proton-conducting layer and from the proton-conducting layer into the drain electrode to provide a hydrogen-depleted source electrode and a hydrogen-rich drain electrode; and
wherein the device state has memory, based on conductivity of the source electrode and the drain electrode, that depends on the amount of charge as H+ ions that has been transferred through the proton-conducting layer.
The memory device can be arranged in any configuration that disposes the proton-conducting layer between the source electrode and the drain electrode. Representative embodiments include horizontal devices (e.g.,
The operation of the memory devices will now be described in relation to a horizontal configuration. However, the descriptions and operating principles of horizontal devices are also applicable to vertical devices, unless otherwise specified. As used herein, the term “about” indicates that the subject number can vary plus or minus 5% and remain within the described embodiment.
In one embodiment, the memory device further comprises an insulating substrate upon which the source electrode, the drain electrode, and the proton-conducting layer are disposed. Referring now to
The memory device 100 operates (“ON”) by applying a voltage (VSD) between the source electrode 105 and the drain electrode 110. The voltage is applied by a voltage source 120 through electrical connections 121 and 123 to the source electrode 105 and the drain electrode 110, respectively. A positive voltage applied to the source electrode 105 operates the memory device to “discharge” by driving protons from the source electrode 105 into the proton-conducting layer 115 and then from the proton-conducting layer 115 to the drain electrode 110. The movement of protons through the memory device 100 results in a “net conductivity” between the source electrode 105 and the drain electrode 110 through the proton-conducting layer. Net conductivity indicates that the device properties change, although the fundamental conductivities of the electrodes and proton-conducting layer do not change—only the relationship between them changes in a way that affects the total device conductivity. The net conductivity allows electrons to flow in the opposite direction within the circuit, thereby allowing the electronic/protonic characteristics to be measured.
Referring now to
Therefore, the memory device 100 exhibits device memory by changing net conductivity as the device is operated. By interrogating the net conductivity of the memory device 100, its “state” can be determined. The memory device state can be ON, OFF, or any number of intermediate states, based on predetermined net conductivity characteristics.
In order to “reset” the memory device 100, the source electrode 105 is regenerated. This process can be accomplished by applying an opposite voltage than was used to discharge the device. Typically a positive voltage at the source electrode 105 drives the device 100 in the ON state and a negative voltage resets the device 100. Resetting the device 100 electrically provides the benefit of simply moving the protons back to the source electrode 105 from the drain electrode 110.
The ON, OFF, and RESET states are all illustrated schematically in
Furthermore, chemical regeneration can be used to reset the source electrode 105. Chemical regeneration includes exposing the source electrode 105 to hydrogen gas to form palladium hydride. The chemical reset does not transform the drain electrode 110 back to palladium, but it instead remains palladium hydride. Therefore, if the device 100 is run in a mode where both the source electrode 105 and drain electrode 110 are palladium hydride, hydrogen gas is generated at the drain electrode 110 to dispose of excess hydrogen in the system. Given the dangerous properties of hydrogen gas, the chemical recharging method may be disfavored in certain contexts.
In one embodiment, the memory device does not operate by an electrode other than the source electrode and the drain electrode. In such an embodiment, only the source electrode and drain electrode affect operation of the memory device. Certain prior art device architectures require a third (e.g., gate) electrode to operate a memory device. The present memory devices are superior by not requiring a third electrode to operate. Furthermore, it will be appreciated that vertical stack memory devices as disclosed herein have dimensions that would make a gate electrode impossible to integrate into the device, due to the thinness of the exposed edges of the proton-conducting layer within the stack. Accordingly, in one embodiment, the memory device does not include a gate electrode disposed on a side of the insulating substrate opposite from the proton-conducting layer.
In the horizontal configuration, a representative electrode thickness is about 10 nm to 100 nm thick and the proton-conducting layer is about 100 nm to 1 micron thick.
The geometry of the device can be tailored to the desired device characteristics. Because the device charge capacity is based on the amount of palladium hydride in the source electrode, the size of the source electrode is a primary defining device parameter. In one embodiment the source electrode has an area of 1 micron2 to 10 mm2. In one embodiment the source electrode has an area of 100 microns2 to 1 mm2. Exemplary electrode sizes include 30 microns×10 microns and 20 microns×500 microns (areas of 200 microns2 and 1500 microns2, respectively). The drain electrode can be sized similarly to the source electrode, although the dimensions of the two are not necessarily the same. Generally, the source electrode is the same volume or larger than the drain electrode, due the desire to maximize charge capacity of the device (in the form of palladium hydride).
The gap between the electrodes is filled with the proton-conducting layer. The size of the gap (linear distance from source to drain electrode) affects switching speed (the time required to turn the device OFF. Devices gain speed linearly with gap size and contact length (in the horizontal configuration).
An illustrative example is based on a device with electrodes of width 10 μm, length 10 μm, and thickness 10 nm, with a 1 μm gap between source and drain. Therefore, a 10 nm gap produces a 100× decrease in switching time, while an electrode that is 10 nm long gives a 1000× increase in speed. The width of the contacts affects only the current. Reducing the contact width to 10 nm reduces the current by 1000×. In total, reducing the contact volume by 106 reduces the switching charge by 106. Electrode width is measured in the direction parallel to the electrode gap in horizontal devices (see
The size of the electrode gap is limited on the upper end by resistance in the proton-conducting layer, as a large gap size will not facility proton transfer. In one embodiment, the electrode gap is 1 nm to 100 microns. In one embodiment, the electrode gap is 10 nm to 10 microns. In one embodiment, the electrode gap is 500 nm to 5 microns.
The turn-on voltage required to operate the horizontal device varies based on device configuration and the composition of the proton-conducting layer. In one embodiment, the turn-on voltage is 0.5 V to 5 V. Voltages operated at greater than 1.5 V (“high voltage”) result in hydrolysis and device failure. Therefore, any high-voltage operation is performed in a water-free environment. Such a controlled environment can be achieved using known microelectronics packaging techniques. In one embodiment, the turn-on voltage is 0.5 V to 1.5 V. In one embodiment, the turn-on voltage is 0.75 V to 1.4 V.
Exemplary horizontal devices have source and drain contacts of size 10 μm×10 μm×10 m, and are separated by a 1 μm gap. Such devices, formed with Nafion as the proton-conducting layer, require 1.0-1.3 V to turn off within 25 ms, with a current of about 10 μA. Reading the device uses 0.5-0.8 V, drives 100 nA of current, and is limited in time only by external measurement equipment.
In one embodiment, the source electrode, the drain electrode, and the proton-conducting layer are arranged vertically in a stack. As mentioned above, the operation of a vertical memory device is similar to that of a horizontal memory device, such as that described above with reference to
An optional substrate 125 is a foundation for the device 200. A voltage source 120 is connected by leads 121 and 123 to the source electrode 105 and drain electrode 110 in order to drive the device 200. In one embodiment, the memory device further comprises electrical leads configured to connect the source electrode and the drain electrode to a voltage source.
In certain embodiments, the memory device 200 is integrated into an integrated circuit. In one embodiment, the electrical leads 121 and 123 are electrical vias. Accordingly, electrical connections are made to the electrodes 105 and 110 in the form of electrical vias of the types known in the microelectronics industry.
While the device 200 illustrated in
In the vertical configuration, a representative electrode thickness is about 10 nm to 100 nm thick and the proton-conducting layer is about 100 nm to 1 micron thick.
The geometry of the vertical device can be tailored to the desired device characteristics. Because the device charge capacity is based on the amount of palladium hydride in the source electrode, the size of the source electrode is a primary defining device parameter. In one embodiment the source electrode has an area of 1 micron2 to 1 cm2. In one embodiment the source electrode has an area of 100 micron2 to 1 mm2. The drain electrode can be sized similarly to the source electrode, although the dimensions of the two are not necessarily the same. Generally, the source electrode is the same volume or larger than the drain electrode, due the desire to maximize charge capacity of the device (in the form of palladium hydride).
The turn-on voltage required to operate the vertical device varies based on device configuration and the composition of the proton-conducting layer. In one embodiment, the turn-on voltage is 0.5 V to 5 V. In one embodiment, the turn-on voltage is 0.5 V to 1.5 V. In one embodiment, the turn-on voltage is 0.75 V to 1.4 V.
In one embodiment, the vertical electrode gap is 1 nm to 1 micron. In one embodiment, the electrode gap is 5 nm to 100 nm. In one embodiment, the electrode gap is 5 nm to 20 nm.
Exemplary vertical devices have source and drain contacts of size 1 mm×1 mm×50 nm, and are separated by a 5 μm gap. Such devices, formed with Nafion as the proton-conducting layer, require 1.0-1.3 V to turn off within 0.25 sec, with a current of about 100 μA. Reading the device uses 0.5-0.8 V, drives 100 nA of current, and is limited in time only by external measurement equipment.
If the device parameters are the same for vertical and horizontal devices, the performance will be similar.
The memory device includes a source electrode and a drain electrode. Both electrodes are based on a palladium/palladium hydride system in which the source electrode comprises palladium hydride and transfers protons to the drain electrode during operation of the device. When the palladium hydride is exhausted, the device is in the OFF state until regenerated. In one embodiment, the source electrode and the drain electrode both comprise palladium. In one embodiment, the source electrode and the drain electrode both comprise palladium hydride. In one embodiment, the source electrode comprises at least 90% palladium hydride, by weight. In one embodiment, the source electrode comprises at least 99% palladium hydride, by weight.
In one embodiment, the drain electrode comprises a palladium mass that is greater than or equal to a palladium hydride mass in the source electrode, on a molar basis. Charge transfer in the device is limited by whichever contact is smaller: the source or drain. Given that the source and drain are based on the same material, the naming conventions are defined primarily based on how the device is wired and which electrode has the larger molar mass (capacity to contain the hydride form).
The electrodes are defined by any methods known to those of skill in the art, including lithographic methods.
The proton-conducting layer provides a material that allows proton transport but blocks electron transport. This property enables the device to operate based solely on proton movement.
Any material capable of facilitating proton transport while blocking electron transport can be used in the memory devices. In one embodiment, the proton-conducting layer comprises a proton-conducting material selected from the group consisting of proton-conducting ionomers, electronic insulators functionalized with proton-conducting compounds, biopolymers, metal organic frameworks, molten salts, and solid state electrolytes. Generally, ionomers developed for fuel cell membranes can be used at the proton-conducting ionomer. In one embodiment, the proton-conducting ionomer is selected from the group consisting of Nafion Aciplex, and Flemion.
In one embodiment, the proton-conducting layer is an electronic insulator functionalized with a proton-conducting compound. In one embodiment, the electronic insulator is selected from the group consisting of a porous oxide, such as silicon oxide, a metal organic framework, yttria, and organic and inorganic porous materials. In one embodiment, the proton-conducting compounds comprise sulfonate moieties or other acid or base moieties coupled to the electronic insulator.
In one embodiment, the porous semiconductor is porous silicon comprising an oxide layer and wherein the proton-conducting compound is a sulfonate terminated silane coupled to the porous silicon oxide layer. Porous silicon is an insulating material that is well-established in the microelectronics industry and would be particularly compatible with vertical stack memory devices, due to the ease and cost of manufacturing a vertical stack of two electrodes having a porous silicon layer between them. Given the surface area of porous silicon, ample area exists for surface functionalization that would provide proton-conducting properties. For example, attaching a sulfonate moiety to the porous silicon (e.g., via an alkyl-silane coupling) would provide the necessary proton transport properties while blocking electron transport.
As noted above, the disclosed memory devices can be integrated into integrated circuits. Therefore, in another aspect, a memory element is provided. In one embodiment, the memory element includes at least one memory device according to the disclosed embodiments incorporated into an integrated circuit.
In one embodiment, the memory element is defined in a semiconductor package. As used herein, the term “semiconductor package” refers to an integrated circuit that can be formed using traditional semiconductor processing methods and materials.
In one embodiment, the memory element further comprises electrical vias providing electronic communication from the integrated circuit to the source electrode and the drain electrode of the memory device.
In one embodiment, the electrical vias connect a voltage source to the source electrode and the drain electrode.
In another aspect, a method of operating a memory device according to any of the disclosed embodiments is provided. In one embodiment, the method includes:
providing the memory device in a loaded state, wherein the source electrode comprises palladium hydride and wherein the source electrode and the drain electrode are in electrical communication with a voltage source; and
applying a first positive voltage from the voltage source between the source electrode and the drain electrode, thereby causing hydrogen ion transport from the source electrode into the proton-conducting layer and from the proton-conducting layer into the drain electrode to provide a discharged state that includes a hydrogen-depleted source electrode and a hydrogen-rich drain electrode, wherein applying the first voltage results in a discharge current due to hydrogen ion transport between the source electrode and the drain electrode.
By applying a positive voltage, the device operates in the ON state until proton transfer stops and the OFF discharged state begins.
In one embodiment, the memory device in the discharged state has a lower net conductivity between the source electrode and the drain electrode than in the loaded state.
In one embodiment, the discharge current ceases after the hydrogen-depleted source electrode contain no palladium hydride.
In one embodiment, the method further comprises a step of reloading the memory device by forming palladium hydride on the source electrode.
In one embodiment, reloading comprises applying a second voltage from the voltage source, opposite in polarity from the first voltage, between the source electrode and the drain electrode.
In one embodiment, reloading comprises exposing the source electrode to hydrogen gas.
In one embodiment, the method further comprises a step of determining a state of the memory device by testing the net conductivity between the source electrode and the drain electrode, wherein the conductivity is indicative of the amount of palladium hydride in the source electrode. This step relates to “reading” the state of the device. The device cannot be “read”—have its state determined—without operating the device, at least to a small extent. This is because protons must flow in order to observe a net conductivity. However, in order to read the device state without substantively impacting the state of the device, the read voltage is much smaller than the drive voltage. This greatly reduces the charge transferred. The current transport reduces non-linearly with voltage, meaning that a very small voltage reduction dramatically reduces the current.
The “read” voltage is less than the “drive” or “ON” voltage (i.e., the first positive voltage). In one embodiment, the read voltage is about 0.1 V to about 1 V. In one embodiment, the read voltage is about 0.4 V to about 0.8 V.
In one embodiment, the state of the memory device is considered to be ON if the conductivity is in a first conductivity range. In one embodiment, the first conductivity range is from about 1.4 S/m to about 2.1 S/m. This range is for a device with electrode width 30 μm, thickness 10 nm, and gap 1 μm.
In one embodiment, the state of the memory device is considered to be OFF if the conductivity is in a second conductivity range that is distinct from the first conductivity range. In one embodiment, the second conductivity range is from about 0.05 S/m to about 0.12 S/m. This range is for a device with electrode width 30 μm, thickness 10 nm, and gap 1 μm.
In one embodiment, the memory device comprises at least one other state than ON and OFF, wherein the at least one other state is in a third conductivity range that is distinct from the first conductivity range and the second conductivity range. In one embodiment, the third conductivity range is from about 0.28 S/m to about 0.42 S/m. This range is for a device with electrode width 30 μm, thickness 10 nm, and gap 1 μm.
The following example is included for the purpose of illustrating, not limiting, the described embodiments.
In this example, we disclose fully ionic two-terminal devices in which protons provide both memory and output signal. These devices exhibit synaptic-like reversible short-term depression, device memory, and, in certain embodiments, can be turned “ON” and “OFF” with as little as 30 nJ of energy per bit.
In the protonic two-terminal device (
For each H+ injected into the Nafion, an excess electron is collected by the leads, which complete the circuit. The source and drain contacts in the protonic two-terminal devices are analogous to the pre- and post-synaptic neurons in a chemical synapse. Nafion is a proton-conducting and electron insulating polymer widely used as proton exchange membrane in fuel cells, with a proton conductivity of 0.078 S cm−1. An applied voltage (VSD) causes an H+ current (ISD) to flow between source and drain contacts in the protonic device (
Q=∫t=0t=tspikeISDdt (1)
Integrating ISD as a function of time gives the total number of H+ ions that flow across the channel, and therefore the total number of H atoms stored in the contact. The measured Q is constant as a function of VSD and increases with PdHx thickness (
The equilibrium current measured well after ISD pulse is used as baseline to normalize the data. The total charge flux across the device for full depletion is proportional to the Pd thickness as thicker PdHx source contact contains more H to be depleted. VSD has a minimal effect on the total charge, although lower voltages correspond to smaller ISD and longer tspike.
The conservation of charge as calculated in Equation 1 means that a larger ISD results in a shorter tspike. For the same VSD, ISD depends on channel resistance, which is linearly depended on channel length. For a device with 3 μm channel length ISD=4 μA and tspike=1.5 s, while an equivalent device with a 1 μm channel ISD=15 μA and tspike=0.6 s. Devices with a shorter channel, and thus lower channel resistance, are expected to show a higher ISD for the same VSD, and a faster tspike. Overall, the STD behavior observed in the two-terminal protonic devices (
In this work, we instead focus on the potential of creating a two-terminal device memory with reconfigurable “ON” and “OFF” states (e.g., as illustrated in
A positive VSD=1.25 V turns the protonic memory OFF (
ISD is the same in either direction, which is similar to unipolar resistive switching. Cycling is performed 22 times indicating reasonable reproducibility. Starting at VSD=0 V and increasing VSD, the device is in the ON state and turns OFF at up to VSD=1V, at which point the source contact is fully depleted of H and is no longer capable of injecting H+ into the Nafion channel. The device stays OFF for VSD>0 until the polarity of VSD is reversed. A device in the OFF state for VSD>0 V is in the ON state for VSD<0 V because the PdHx drain contact is not depleted of H and is capable of injecting H+ into the Nafion channel. A VSD<0 V depletes the drain contact of H and the device eventually turns OFF for VSD=−1 V. At the same time, VSD<0 V moves H+ back into the source contact. This replenishes the H in the PdHx source and puts the device is in the ON state for VSD>0 V. The state of these devices is governed by the amount of charge flux that has gone through the device, specifically the amount of H30 that is shuttled back and forth in the Nafion channel. As such, these protonic devices may have similar characteristics to memristors with the charge flux being the state variable. In these devices the protons that regulate the state of the device also provide the output signal, unlike in most memristors where ions control the state of the device and electrons are the output signal. However, in these protonic devices the hysteresis loop is not pinched with zero crossing, which is characteristic of memristors. The behavior of the protonic devices can be qualitatively described as two memristive diodes (the source and drain contacts) arranged back to back.
To better illustrate the workings of protonic devices, we developed a simple one-dimensional physical model using equations (2) and (3) to predict the current behavior of the devices, as illustrated in
wherein:
DH=4×1011 m2s−1 and is the diffusion coefficient for H in palladium hydride;
nH=4×1022 cm−3 and is the density of H in palladium hydride; and
x=from 0 to 10 μm and is the distance from the surface of the contact.
In this model the diffusion flux (JH) of hydrogen inside the PdHx contact follows Fick's first law of diffusion and conservation of mass. For this simple model, we neglect any exchange of hydrogen between the PdHx and the surrounding H2 atmosphere. Assuming continuity across the PdHx Nafion boundary, we postulate that the current of H+ in the Nafion channel (IH+ or ISD) is equal to JH in the last PdHx cell in contact with the Nafion times the charge of a proton (e) and the contact area of the device (A). Therefore, the hydrogen diffusion in the PdHx is driven by the induced electric drift of H+ from the contact-Nafion interface and along the Nafion channel, in a fashion similar to the transfer of H+ to an acidic water solution in the palladium hydrogen reversible electrode. This model does not include any trap states, or the accurate 2D device geometry, which likely affects the ISD characteristics in the experimental protonic devices. Nonetheless, by setting ISD=0.2 μA for t=0 we reproduce an ISD time dependence that is consistent with the experimental results of our faster protonic devices (
Current devices (
Protonic micro devices are fabricated on p-type Si (Addison Engineering, B-doped, ρ=0.001 ohm cm−1) with thermally grown silicon oxide (100 nm). Standard photolithography is used to define the metal contacts. Pd (thickness from 1 mm to 30 nm) with a 15 nm Cr adhesion layer is deposited via e-beam evaporation (Balzers PLS 500). To ensure consistency, contacts are kept at a 100 nm total thickness by adding Au between the Cr and Pd layers as needed. SU-8 is used to confine the Nafion covered area. 2 μL Nafion 117 solution (5% concentration) from Sigma Aldrich is drop-cast on top of the patterned silicon wafer and the solution is dried in a fume hood. For protonic sandwich devices, Pd (50 nm) is evaporated on glass slides with 5 mm contacts defined by shadow masking with tape. A porous cellulose membrane (VWR Tissue Wipe) immersed in the Nafion solution is sandwiched between the two Pd contacts. The cellulose membrane prevents short circuit and improves the connection. Measurements are performed with a semiconductor parameter analyzer (Agilent 4155C). A Rigol DG4062 function generator is used to create a pulse sequence and sinusoidal inputs. Device testing is performed on a Signatone H-100 probe station in a controlled atmosphere of 5% H2, 95% N2, at 75% relative humidity (RH). In 5% H2 atmosphere, Pd absorbs H2 to form PdHx (x=0.6). A finite difference model implemented in Matlab is used to calculate the diffusive flow of H within the contact. The simulated contacts are 30 μm wide by 10 nm thick, and are partitioned in 10 nm segments along a total contact length of 60 μm. DH=4×10−11 m2 s−1. Simulations are performed by repeating a two-step algorithm. First, the momentary inter-cell fluxes are computed based on the existing concentration in each cell. Second, the time is incremented by 1 μs, and new cell concentrations are computed from the given fluxes and conservation of mass.
The total energy required for a switching operation (E) is proportional the amount of charge (Q) displaced across the device according to equation (4):
E=QVSD (4)
We calculate Q as equation (5):
Q=∫t=0t=tspikeISDdt (5)
where tspike is the duration of a “OFF” or “RESET” pulse. OFF or RESET pulses are equal in magnitude and length.
For the device in
While illustrative embodiments have been illustrated and described, it will be appreciated that various changes can be made therein without departing from the spirit and scope of the invention.
This application claims the benefit of U.S. Provisional Application No. 61/982193, filed Apr. 21, 2014, the disclosure of which is hereby incorporated by reference in its entirety.
This invention was made with Government support under DE-SC0010441 awarded by the U.S. Department of Energy; and under DMR 1150630, awarded by the National Science Foundation. The Government has certain rights in the invention.
Filing Document | Filing Date | Country | Kind |
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PCT/US2015/026942 | 4/21/2015 | WO | 00 |
Number | Date | Country | |
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61982193 | Apr 2014 | US |