BRIEF DESCRIPTION OF THE DRAWINGS
FIG. 1 is a cross section of a semiconductor device according to a first embodiment.
FIG. 2 is an enlarged cross section of a neighborhood of a contact portion.
FIG. 3 is an enlarged cross section of a neighborhood of a contact portion.
FIG. 4 is a cross section of the semiconductor device at a cross-sectional position different from that shown in FIG. 2.
FIG. 5 is an enlarged cross section of an nMOS transistor and a pMOS transistor.
FIG. 6 is a cross section showing a first step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 7 is a cross section showing a second step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 8 is a cross section showing a third step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 9 is a cross section showing a fourth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 10 is a cross section showing a fifth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 11 is a cross section showing a sixth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 12 is a cross section showing a seventh step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 13 is a cross section showing an eighth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 14 is a cross section showing a ninth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 15 is a cross section showing a tenth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 16 is a cross section showing an eleventh step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 17 is a cross section at a position different from that in FIG. 16.
FIG. 18 is a cross section showing a twelfth step of the steps of manufacturing the semiconductor device according to the first embodiment.
FIG. 19 is a cross section at a position different from that in FIG. 18.
FIG. 20 is a graph showing a distribution of oxygen elements permeating into a semiconductor substrate.
FIG. 21 is a cross section showing a modification of the semiconductor device according to the first embodiment.
FIG. 22 is a cross section of a portion of the semiconductor device according to a second embodiment, where an nMOS transistor is located.
FIG. 23 is a cross section of a portion of the semiconductor device according to the second embodiment, where a pMOS transistor is located.
FIG. 24 is cross section showing in detail a conducting film that forms a barrier metal.
FIG. 25 is a cross section showing a step of manufacturing the semiconductor device according to the second embodiment, after a step corresponding to the tenth step for the semiconductor device according to the first embodiment.
FIG. 26 is a cross section of the portion where the pMOS transistor is located, in the manufacturing step shown in FIG. 25.
FIG. 27 is a cross section showing a step of manufacturing the semiconductor device according to the second embodiment, after the manufacturing step shown in FIG. 25.
FIG. 28 is a cross section showing a step of manufacturing the semiconductor device according to the second embodiment, after the manufacturing step shown in FIG. 26.
FIG. 29 is a cross section showing a step of manufacturing the semiconductor device according to the second embodiment, after the manufacturing step shown in FIG. 27.
FIG. 30 is a cross section showing a step of manufacturing the semiconductor device according to the second embodiment, after the manufacturing step shown in FIG. 28.